1*c83a76b0SSuyog Pawar /****************************************************************************** 2*c83a76b0SSuyog Pawar * 3*c83a76b0SSuyog Pawar * Copyright (C) 2018 The Android Open Source Project 4*c83a76b0SSuyog Pawar * 5*c83a76b0SSuyog Pawar * Licensed under the Apache License, Version 2.0 (the "License"); 6*c83a76b0SSuyog Pawar * you may not use this file except in compliance with the License. 7*c83a76b0SSuyog Pawar * You may obtain a copy of the License at: 8*c83a76b0SSuyog Pawar * 9*c83a76b0SSuyog Pawar * http://www.apache.org/licenses/LICENSE-2.0 10*c83a76b0SSuyog Pawar * 11*c83a76b0SSuyog Pawar * Unless required by applicable law or agreed to in writing, software 12*c83a76b0SSuyog Pawar * distributed under the License is distributed on an "AS IS" BASIS, 13*c83a76b0SSuyog Pawar * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. 14*c83a76b0SSuyog Pawar * See the License for the specific language governing permissions and 15*c83a76b0SSuyog Pawar * limitations under the License. 16*c83a76b0SSuyog Pawar * 17*c83a76b0SSuyog Pawar ***************************************************************************** 18*c83a76b0SSuyog Pawar * Originally developed and contributed by Ittiam Systems Pvt. Ltd, Bangalore 19*c83a76b0SSuyog Pawar */ 20*c83a76b0SSuyog Pawar /*! 21*c83a76b0SSuyog Pawar ****************************************************************************** 22*c83a76b0SSuyog Pawar * \file ihevce_enc_structs.h 23*c83a76b0SSuyog Pawar * 24*c83a76b0SSuyog Pawar * \brief 25*c83a76b0SSuyog Pawar * This file contains structure definations of Encoder 26*c83a76b0SSuyog Pawar * 27*c83a76b0SSuyog Pawar * \date 28*c83a76b0SSuyog Pawar * 18/09/2012 29*c83a76b0SSuyog Pawar * 30*c83a76b0SSuyog Pawar * \author 31*c83a76b0SSuyog Pawar * Ittiam 32*c83a76b0SSuyog Pawar * 33*c83a76b0SSuyog Pawar ****************************************************************************** 34*c83a76b0SSuyog Pawar */ 35*c83a76b0SSuyog Pawar 36*c83a76b0SSuyog Pawar #ifndef _IHEVCE_ENC_STRUCTS_H_ 37*c83a76b0SSuyog Pawar #define _IHEVCE_ENC_STRUCTS_H_ 38*c83a76b0SSuyog Pawar 39*c83a76b0SSuyog Pawar /*****************************************************************************/ 40*c83a76b0SSuyog Pawar /* Constant Macros */ 41*c83a76b0SSuyog Pawar /*****************************************************************************/ 42*c83a76b0SSuyog Pawar #define HEVCE_MAX_WIDTH 1920 43*c83a76b0SSuyog Pawar #define HEVCE_MAX_HEIGHT 1088 44*c83a76b0SSuyog Pawar 45*c83a76b0SSuyog Pawar #define HEVCE_MIN_WIDTH 64 46*c83a76b0SSuyog Pawar #define HEVCE_MIN_HEIGHT 64 47*c83a76b0SSuyog Pawar 48*c83a76b0SSuyog Pawar #define MAX_CTBS_IN_FRAME (HEVCE_MAX_WIDTH * HEVCE_MAX_HEIGHT) / (MIN_CTB_SIZE * MIN_CTB_SIZE) 49*c83a76b0SSuyog Pawar #define MAX_NUM_CTB_ROWS_FRM (HEVCE_MAX_HEIGHT) / (MIN_CTB_SIZE) 50*c83a76b0SSuyog Pawar 51*c83a76b0SSuyog Pawar #define MIN_VERT_PROC_UNIT (8) 52*c83a76b0SSuyog Pawar #define MAX_NUM_VERT_UNITS_FRM (HEVCE_MAX_HEIGHT) / (MIN_VERT_PROC_UNIT) 53*c83a76b0SSuyog Pawar 54*c83a76b0SSuyog Pawar #define HEVCE_MAX_REF_PICS 8 55*c83a76b0SSuyog Pawar #define HEVCE_MAX_DPB_PICS (HEVCE_MAX_REF_PICS + 1) 56*c83a76b0SSuyog Pawar 57*c83a76b0SSuyog Pawar #define PAD_HORZ 80 58*c83a76b0SSuyog Pawar #define PAD_VERT 80 59*c83a76b0SSuyog Pawar 60*c83a76b0SSuyog Pawar #define DEFAULT_MAX_REFERENCE_PICS 4 61*c83a76b0SSuyog Pawar 62*c83a76b0SSuyog Pawar #define BLU_RAY_SUPPORT 231457 63*c83a76b0SSuyog Pawar 64*c83a76b0SSuyog Pawar /** @brief max number of parts in minCU : max 4 for NxN */ 65*c83a76b0SSuyog Pawar #define NUM_PU_PARTS 4 66*c83a76b0SSuyog Pawar /** @brief max number of parts in Inter CU */ 67*c83a76b0SSuyog Pawar #define NUM_INTER_PU_PARTS (MAX_NUM_INTER_PARTS) 68*c83a76b0SSuyog Pawar #define SEND_BI_RDOPT 69*c83a76b0SSuyog Pawar #ifdef SEND_BI_RDOPT 70*c83a76b0SSuyog Pawar /** @brief */ 71*c83a76b0SSuyog Pawar #define MAX_INTER_CU_CANDIDATES 4 72*c83a76b0SSuyog Pawar #else 73*c83a76b0SSuyog Pawar /** @brief */ 74*c83a76b0SSuyog Pawar #define MAX_INTER_CU_CANDIDATES 3 75*c83a76b0SSuyog Pawar #endif 76*c83a76b0SSuyog Pawar /** @brief */ 77*c83a76b0SSuyog Pawar #define MAX_INTRA_CU_CANDIDATES 3 78*c83a76b0SSuyog Pawar 79*c83a76b0SSuyog Pawar #define MAX_INTRA_CANDIDATES 35 80*c83a76b0SSuyog Pawar 81*c83a76b0SSuyog Pawar /** For each resolution & bit-rate instance, one entropy thread is created */ 82*c83a76b0SSuyog Pawar #define NUM_ENTROPY_THREADS (IHEVCE_MAX_NUM_RESOLUTIONS * IHEVCE_MAX_NUM_BITRATES) 83*c83a76b0SSuyog Pawar 84*c83a76b0SSuyog Pawar /* Number of buffers between Decomp and HME layers 1 : Seq mode >1 parallel mode */ 85*c83a76b0SSuyog Pawar #define NUM_BUFS_DECOMP_HME 1 86*c83a76b0SSuyog Pawar 87*c83a76b0SSuyog Pawar /** Macro to indicate pre me and L0 ipe stagger in pre enc*/ 88*c83a76b0SSuyog Pawar /** Implies MAX_PRE_ENC_STAGGER - 1 max stagger*/ 89*c83a76b0SSuyog Pawar #define MAX_PRE_ENC_STAGGER (NUM_LAP2_LOOK_AHEAD + 1 + MIN_L1_L0_STAGGER_NON_SEQ) 90*c83a76b0SSuyog Pawar 91*c83a76b0SSuyog Pawar #define NUM_ME_ENC_BUFS (MAX_NUM_ENC_LOOP_PARALLEL) 92*c83a76b0SSuyog Pawar 93*c83a76b0SSuyog Pawar #define MIN_L0_IPE_ENC_STAGGER 1 94*c83a76b0SSuyog Pawar 95*c83a76b0SSuyog Pawar /*stagger between L0 IPE and enc*/ 96*c83a76b0SSuyog Pawar #define MAX_L0_IPE_ENC_STAGGER (NUM_ME_ENC_BUFS + (MIN_L0_IPE_ENC_STAGGER)) 97*c83a76b0SSuyog Pawar 98*c83a76b0SSuyog Pawar #define MAX_PRE_ENC_RC_DELAY (MAX_L0_IPE_ENC_STAGGER + 1 + NUM_BUFS_DECOMP_HME) 99*c83a76b0SSuyog Pawar 100*c83a76b0SSuyog Pawar #define MIN_PRE_ENC_RC_DELAY (MIN_L0_IPE_ENC_STAGGER + 1 + NUM_BUFS_DECOMP_HME) 101*c83a76b0SSuyog Pawar 102*c83a76b0SSuyog Pawar /** @brief number of ctb contexts maintained at frame level b/w encode : entropy */ 103*c83a76b0SSuyog Pawar #define NUM_FRMPROC_ENTCOD_BUFS 1 104*c83a76b0SSuyog Pawar 105*c83a76b0SSuyog Pawar /** @brief number of extra recon buffs required for stagger design*/ 106*c83a76b0SSuyog Pawar #define NUM_EXTRA_RECON_BUFS 0 107*c83a76b0SSuyog Pawar 108*c83a76b0SSuyog Pawar /** recon picture buffer size need to be increased to support EncLoop Parallelism **/ 109*c83a76b0SSuyog Pawar #define NUM_EXTRA_RECON_BUFS_FOR_ELP 0 110*c83a76b0SSuyog Pawar 111*c83a76b0SSuyog Pawar /** @brief maximum number of bytes in 4x4 afetr scanning */ 112*c83a76b0SSuyog Pawar #define MAX_SCAN_COEFFS_BYTES_4x4 (48) 113*c83a76b0SSuyog Pawar 114*c83a76b0SSuyog Pawar /** @brief maximum number of luma coeffs bytes after scan at CTB level */ 115*c83a76b0SSuyog Pawar #define MAX_LUMA_COEFFS_CTB ((MAX_SCAN_COEFFS_BYTES_4x4) * (MAX_TU_IN_CTB)*4) 116*c83a76b0SSuyog Pawar 117*c83a76b0SSuyog Pawar /** @brief maximum number of chroma coeffs bytes after scan at CTB level */ 118*c83a76b0SSuyog Pawar #define MAX_CHRM_COEFFS_CTB ((MAX_SCAN_COEFFS_BYTES_4x4) * ((MAX_TU_IN_CTB >> 1)) * 4) 119*c83a76b0SSuyog Pawar 120*c83a76b0SSuyog Pawar /** @brief maximum number of coeffs bytes after scan at CTB level */ 121*c83a76b0SSuyog Pawar #define MAX_SCAN_COEFFS_CTB ((MAX_LUMA_COEFFS_CTB) + (MAX_CHRM_COEFFS_CTB)) 122*c83a76b0SSuyog Pawar 123*c83a76b0SSuyog Pawar /** @breif PU map CTB buffer buyes for neighbour availibility */ 124*c83a76b0SSuyog Pawar #define MUN_PU_MAP_BYTES_PER_CTB (MAX_PU_IN_CTB_ROW * MAX_PU_IN_CTB_ROW) 125*c83a76b0SSuyog Pawar 126*c83a76b0SSuyog Pawar /** @brief tottal system memory records */ 127*c83a76b0SSuyog Pawar #define TOTAL_SYSTEM_MEM_RECS 120 128*c83a76b0SSuyog Pawar 129*c83a76b0SSuyog Pawar /** @brief number of input async command buffers */ 130*c83a76b0SSuyog Pawar #define NUM_AYSNC_CMD_BUFS 4 131*c83a76b0SSuyog Pawar 132*c83a76b0SSuyog Pawar /** @brief Comand buffers size */ 133*c83a76b0SSuyog Pawar #define ENC_COMMAND_BUFF_SIZE 512 /* 512 bytes */ 134*c83a76b0SSuyog Pawar 135*c83a76b0SSuyog Pawar /** @brief Number of output buffers */ 136*c83a76b0SSuyog Pawar #define NUM_OUTPUT_BUFS 4 137*c83a76b0SSuyog Pawar 138*c83a76b0SSuyog Pawar /** @brief Lamda for SATD cost estimation */ 139*c83a76b0SSuyog Pawar #define LAMDA_SATD 1 140*c83a76b0SSuyog Pawar 141*c83a76b0SSuyog Pawar /** @brief Maximum number of 1s in u2_sig_coeff_abs_gt1_flags */ 142*c83a76b0SSuyog Pawar #define MAX_GT_ONE 8 143*c83a76b0SSuyog Pawar 144*c83a76b0SSuyog Pawar /** MAX num ipntra pred modes */ 145*c83a76b0SSuyog Pawar #define MAX_NUM_IP_MODES 35 146*c83a76b0SSuyog Pawar 147*c83a76b0SSuyog Pawar /** Number of best intra modes used for intra mode refinement */ 148*c83a76b0SSuyog Pawar #define NUM_BEST_MODES 3 149*c83a76b0SSuyog Pawar 150*c83a76b0SSuyog Pawar /** Maximim number of parallel frame processing threads in pre enocde group */ 151*c83a76b0SSuyog Pawar #define MAX_NUM_FRM_PROC_THRDS_PRE_ENC MAX_NUM_CORES 152*c83a76b0SSuyog Pawar 153*c83a76b0SSuyog Pawar /** Maximim number of parallel frame processing threads in encode group */ 154*c83a76b0SSuyog Pawar #define MAX_NUM_FRM_PROC_THRDS_ENC MAX_NUM_CORES 155*c83a76b0SSuyog Pawar 156*c83a76b0SSuyog Pawar /** Macro to indicate teh PING_PONG buffers for stagger*/ 157*c83a76b0SSuyog Pawar #define PING_PONG_BUF 2 158*c83a76b0SSuyog Pawar 159*c83a76b0SSuyog Pawar /** Max number of layers in Motion estimation 160*c83a76b0SSuyog Pawar * should be greater than or equal to MAX_NUM_LAYERS defined in hme_interface.h 161*c83a76b0SSuyog Pawar */ 162*c83a76b0SSuyog Pawar 163*c83a76b0SSuyog Pawar #define MAX_NUM_HME_LAYERS 5 164*c83a76b0SSuyog Pawar /** 165*c83a76b0SSuyog Pawar ****************************************************************************** 166*c83a76b0SSuyog Pawar * @brief Maximum number of layers allowed 167*c83a76b0SSuyog Pawar ****************************************************************************** 168*c83a76b0SSuyog Pawar */ 169*c83a76b0SSuyog Pawar #define MAX_NUM_LAYERS 4 170*c83a76b0SSuyog Pawar 171*c83a76b0SSuyog Pawar #define NUM_RC_PIC_TYPE 9 172*c83a76b0SSuyog Pawar 173*c83a76b0SSuyog Pawar #define MAX_NUM_NODES_CU_TREE (85) 174*c83a76b0SSuyog Pawar 175*c83a76b0SSuyog Pawar /* macros to control Dynamic load balance */ 176*c83a76b0SSuyog Pawar #define DYN_LOAD_BAL_UPPER_LIMIT 0.80 177*c83a76b0SSuyog Pawar 178*c83a76b0SSuyog Pawar #define DYN_LOAD_BAL_LOWER_LIMIT 0.20 179*c83a76b0SSuyog Pawar 180*c83a76b0SSuyog Pawar #define NUM_SUB_GOP_DYN_BAL 1 181*c83a76b0SSuyog Pawar 182*c83a76b0SSuyog Pawar #define MIN_NUM_FRMS_DYN_BAL 4 183*c83a76b0SSuyog Pawar 184*c83a76b0SSuyog Pawar #define CORES_SRES_OR_MRES 2 185*c83a76b0SSuyog Pawar 186*c83a76b0SSuyog Pawar #define HME_HIGH_SAD_BLK_THRESH 35 187*c83a76b0SSuyog Pawar 188*c83a76b0SSuyog Pawar /* Enable to compare cabac states of final entropy thread with enc loop states */ 189*c83a76b0SSuyog Pawar #define VERIFY_ENCLOOP_CABAC_STATES 0 190*c83a76b0SSuyog Pawar 191*c83a76b0SSuyog Pawar #define MAX_NUM_BLKS_IN_MAX_CU 64 /* max cu size is 64x64 */ 192*c83a76b0SSuyog Pawar 193*c83a76b0SSuyog Pawar /*****************************************************************************/ 194*c83a76b0SSuyog Pawar /* Function Macros */ 195*c83a76b0SSuyog Pawar /*****************************************************************************/ 196*c83a76b0SSuyog Pawar 197*c83a76b0SSuyog Pawar /*****************************************************************************/ 198*c83a76b0SSuyog Pawar /* Typedefs */ 199*c83a76b0SSuyog Pawar /*****************************************************************************/ 200*c83a76b0SSuyog Pawar typedef void (*pf_iq_it_rec)( 201*c83a76b0SSuyog Pawar WORD16 *pi2_src, 202*c83a76b0SSuyog Pawar WORD16 *pi2_tmp, 203*c83a76b0SSuyog Pawar UWORD8 *pu1_pred, 204*c83a76b0SSuyog Pawar WORD16 *pi2_dequant_coeff, 205*c83a76b0SSuyog Pawar UWORD8 *pu1_dst, 206*c83a76b0SSuyog Pawar WORD32 qp_div, /* qpscaled / 6 */ 207*c83a76b0SSuyog Pawar WORD32 qp_rem, /* qpscaled % 6 */ 208*c83a76b0SSuyog Pawar WORD32 src_strd, 209*c83a76b0SSuyog Pawar WORD32 pred_strd, 210*c83a76b0SSuyog Pawar WORD32 dst_strd, 211*c83a76b0SSuyog Pawar WORD32 zero_cols, 212*c83a76b0SSuyog Pawar WORD32 zero_rows); 213*c83a76b0SSuyog Pawar 214*c83a76b0SSuyog Pawar typedef void (*pf_intra_pred)( 215*c83a76b0SSuyog Pawar UWORD8 *pu1_ref, WORD32 src_strd, UWORD8 *pu1_dst, WORD32 dst_strd, WORD32 nt, WORD32 mode); 216*c83a76b0SSuyog Pawar 217*c83a76b0SSuyog Pawar typedef UWORD32 (*pf_res_trans_luma)( 218*c83a76b0SSuyog Pawar UWORD8 *pu1_src, 219*c83a76b0SSuyog Pawar UWORD8 *pu1_pred, 220*c83a76b0SSuyog Pawar WORD32 *pi4_tmp, 221*c83a76b0SSuyog Pawar WORD16 *pi2_dst, 222*c83a76b0SSuyog Pawar WORD32 src_strd, 223*c83a76b0SSuyog Pawar WORD32 pred_strd, 224*c83a76b0SSuyog Pawar WORD32 dst_strd, 225*c83a76b0SSuyog Pawar CHROMA_PLANE_ID_T e_chroma_plane); 226*c83a76b0SSuyog Pawar 227*c83a76b0SSuyog Pawar typedef WORD32 (*pf_quant)( 228*c83a76b0SSuyog Pawar WORD16 *pi2_coeffs, 229*c83a76b0SSuyog Pawar WORD16 *pi2_quant_coeff, 230*c83a76b0SSuyog Pawar WORD16 *pi2_dst, 231*c83a76b0SSuyog Pawar WORD32 qp_div, /* qpscaled / 6 */ 232*c83a76b0SSuyog Pawar WORD32 qp_rem, /* qpscaled % 6 */ 233*c83a76b0SSuyog Pawar WORD32 q_add, 234*c83a76b0SSuyog Pawar WORD32 src_strd, 235*c83a76b0SSuyog Pawar WORD32 dst_strd, 236*c83a76b0SSuyog Pawar UWORD8 *pu1_csbf_buf, 237*c83a76b0SSuyog Pawar WORD32 csbf_strd, 238*c83a76b0SSuyog Pawar WORD32 *zero_cols, 239*c83a76b0SSuyog Pawar WORD32 *zero_row); 240*c83a76b0SSuyog Pawar 241*c83a76b0SSuyog Pawar /*****************************************************************************/ 242*c83a76b0SSuyog Pawar /* Enums */ 243*c83a76b0SSuyog Pawar /*****************************************************************************/ 244*c83a76b0SSuyog Pawar /// supported partition shape 245*c83a76b0SSuyog Pawar typedef enum 246*c83a76b0SSuyog Pawar { 247*c83a76b0SSuyog Pawar SIZE_2Nx2N = 0, ///< symmetric motion partition, 2Nx2N 248*c83a76b0SSuyog Pawar SIZE_2NxN = 1, ///< symmetric motion partition, 2Nx N 249*c83a76b0SSuyog Pawar SIZE_Nx2N = 2, ///< symmetric motion partition, Nx2N 250*c83a76b0SSuyog Pawar SIZE_NxN = 3, ///< symmetric motion partition, Nx N 251*c83a76b0SSuyog Pawar SIZE_2NxnU = 4, ///< asymmetric motion partition, 2Nx( N/2) + 2Nx(3N/2) 252*c83a76b0SSuyog Pawar SIZE_2NxnD = 5, ///< asymmetric motion partition, 2Nx(3N/2) + 2Nx( N/2) 253*c83a76b0SSuyog Pawar SIZE_nLx2N = 6, ///< asymmetric motion partition, ( N/2)x2N + (3N/2)x2N 254*c83a76b0SSuyog Pawar SIZE_nRx2N = 7 ///< asymmetric motion partition, (3N/2)x2N + ( N/2)x2N 255*c83a76b0SSuyog Pawar } PART_SIZE_E; 256*c83a76b0SSuyog Pawar 257*c83a76b0SSuyog Pawar /** @brief Interface level Queues of Encoder */ 258*c83a76b0SSuyog Pawar 259*c83a76b0SSuyog Pawar typedef enum 260*c83a76b0SSuyog Pawar { 261*c83a76b0SSuyog Pawar IHEVCE_INPUT_DATA_CTRL_Q = 0, 262*c83a76b0SSuyog Pawar IHEVCE_ENC_INPUT_Q, 263*c83a76b0SSuyog Pawar IHEVCE_INPUT_ASYNCH_CTRL_Q, 264*c83a76b0SSuyog Pawar IHEVCE_OUTPUT_DATA_Q, 265*c83a76b0SSuyog Pawar IHEVCE_OUTPUT_STATUS_Q, 266*c83a76b0SSuyog Pawar IHEVCE_RECON_DATA_Q, // /*que for holding recon buffer */ 267*c83a76b0SSuyog Pawar 268*c83a76b0SSuyog Pawar IHEVCE_FRM_PRS_ENT_COD_Q, /*que for holding output buffer of enc_loop |input buffer of entropy */ 269*c83a76b0SSuyog Pawar 270*c83a76b0SSuyog Pawar IHEVCE_PRE_ENC_ME_Q, /*que for holding input buffer to ME | output of pre-enc */ 271*c83a76b0SSuyog Pawar 272*c83a76b0SSuyog Pawar IHEVCE_ME_ENC_RDOPT_Q, /* que for holding output buffer of ME or input buffer of Enc-RDopt */ 273*c83a76b0SSuyog Pawar 274*c83a76b0SSuyog Pawar IHEVCE_L0_IPE_ENC_Q, /* Queue for holding L0 ipe data to enc loop*/ 275*c83a76b0SSuyog Pawar 276*c83a76b0SSuyog Pawar /* should be last entry */ 277*c83a76b0SSuyog Pawar IHEVCE_MAX_NUM_QUEUES 278*c83a76b0SSuyog Pawar 279*c83a76b0SSuyog Pawar } IHEVCE_Q_DESC_T; 280*c83a76b0SSuyog Pawar 281*c83a76b0SSuyog Pawar /*****************************************************************************/ 282*c83a76b0SSuyog Pawar /* Structure */ 283*c83a76b0SSuyog Pawar /*****************************************************************************/ 284*c83a76b0SSuyog Pawar 285*c83a76b0SSuyog Pawar /** 286*c83a76b0SSuyog Pawar RC_QP_QSCALE conversion structures 287*c83a76b0SSuyog Pawar **/ 288*c83a76b0SSuyog Pawar typedef struct 289*c83a76b0SSuyog Pawar { 290*c83a76b0SSuyog Pawar WORD16 i2_min_qp; 291*c83a76b0SSuyog Pawar 292*c83a76b0SSuyog Pawar WORD16 i2_max_qp; 293*c83a76b0SSuyog Pawar 294*c83a76b0SSuyog Pawar WORD16 i2_min_qscale; 295*c83a76b0SSuyog Pawar 296*c83a76b0SSuyog Pawar WORD16 i2_max_qscale; 297*c83a76b0SSuyog Pawar 298*c83a76b0SSuyog Pawar WORD32 *pi4_qscale_to_qp; 299*c83a76b0SSuyog Pawar 300*c83a76b0SSuyog Pawar WORD32 *pi4_qp_to_qscale_q_factor; 301*c83a76b0SSuyog Pawar 302*c83a76b0SSuyog Pawar WORD32 *pi4_qp_to_qscale; 303*c83a76b0SSuyog Pawar 304*c83a76b0SSuyog Pawar WORD8 i1_qp_offset; 305*c83a76b0SSuyog Pawar 306*c83a76b0SSuyog Pawar } rc_quant_t; 307*c83a76b0SSuyog Pawar 308*c83a76b0SSuyog Pawar /** 309*c83a76b0SSuyog Pawar ****************************************************************************** 310*c83a76b0SSuyog Pawar * @brief 4x4 level structure which contains all the parameters 311*c83a76b0SSuyog Pawar * for neighbour prediction puopose 312*c83a76b0SSuyog Pawar ****************************************************************************** 313*c83a76b0SSuyog Pawar */ 314*c83a76b0SSuyog Pawar typedef struct 315*c83a76b0SSuyog Pawar { 316*c83a76b0SSuyog Pawar /** PU motion vectors */ 317*c83a76b0SSuyog Pawar pu_mv_t mv; 318*c83a76b0SSuyog Pawar /** Intra or Inter flag for each partition - 0 or 1 */ 319*c83a76b0SSuyog Pawar UWORD16 b1_intra_flag : 1; 320*c83a76b0SSuyog Pawar /** CU skip flag - 0 or 1 */ 321*c83a76b0SSuyog Pawar UWORD16 b1_skip_flag : 1; 322*c83a76b0SSuyog Pawar /** CU depth in CTB tree (0-3) */ 323*c83a76b0SSuyog Pawar UWORD16 b2_cu_depth : 2; 324*c83a76b0SSuyog Pawar 325*c83a76b0SSuyog Pawar /** Y Qp for loop filter */ 326*c83a76b0SSuyog Pawar WORD16 b8_qp : 8; 327*c83a76b0SSuyog Pawar 328*c83a76b0SSuyog Pawar /** Luma Intra Mode 0 - 34 */ 329*c83a76b0SSuyog Pawar UWORD16 b6_luma_intra_mode : 6; 330*c83a76b0SSuyog Pawar 331*c83a76b0SSuyog Pawar /** Y CBF for BS compute */ 332*c83a76b0SSuyog Pawar UWORD16 b1_y_cbf : 1; 333*c83a76b0SSuyog Pawar /** Pred L0 flag of current 4x4 */ 334*c83a76b0SSuyog Pawar UWORD16 b1_pred_l0_flag : 1; 335*c83a76b0SSuyog Pawar 336*c83a76b0SSuyog Pawar /** Pred L0 flag of current 4x4 */ 337*c83a76b0SSuyog Pawar UWORD16 b1_pred_l1_flag : 1; 338*c83a76b0SSuyog Pawar } nbr_4x4_t; 339*c83a76b0SSuyog Pawar 340*c83a76b0SSuyog Pawar typedef struct 341*c83a76b0SSuyog Pawar { 342*c83a76b0SSuyog Pawar /** Bottom Left availability flag */ 343*c83a76b0SSuyog Pawar UWORD8 u1_bot_lt_avail; 344*c83a76b0SSuyog Pawar 345*c83a76b0SSuyog Pawar /** Left availability flag */ 346*c83a76b0SSuyog Pawar UWORD8 u1_left_avail; 347*c83a76b0SSuyog Pawar 348*c83a76b0SSuyog Pawar /** Top availability flag */ 349*c83a76b0SSuyog Pawar UWORD8 u1_top_avail; 350*c83a76b0SSuyog Pawar 351*c83a76b0SSuyog Pawar /** Top Right availability flag */ 352*c83a76b0SSuyog Pawar UWORD8 u1_top_rt_avail; 353*c83a76b0SSuyog Pawar 354*c83a76b0SSuyog Pawar /** Top Left availability flag */ 355*c83a76b0SSuyog Pawar UWORD8 u1_top_lt_avail; 356*c83a76b0SSuyog Pawar 357*c83a76b0SSuyog Pawar } nbr_avail_flags_t; 358*c83a76b0SSuyog Pawar 359*c83a76b0SSuyog Pawar typedef struct 360*c83a76b0SSuyog Pawar { 361*c83a76b0SSuyog Pawar /** prev intra flag*/ 362*c83a76b0SSuyog Pawar UWORD8 b1_prev_intra_luma_pred_flag : 1; 363*c83a76b0SSuyog Pawar 364*c83a76b0SSuyog Pawar /** mpm_idx */ 365*c83a76b0SSuyog Pawar UWORD8 b2_mpm_idx : 2; 366*c83a76b0SSuyog Pawar 367*c83a76b0SSuyog Pawar /** reminder pred mode */ 368*c83a76b0SSuyog Pawar UWORD8 b5_rem_intra_pred_mode : 5; 369*c83a76b0SSuyog Pawar 370*c83a76b0SSuyog Pawar } intra_prev_rem_flags_t; 371*c83a76b0SSuyog Pawar 372*c83a76b0SSuyog Pawar /** 373*c83a76b0SSuyog Pawar ****************************************************************************** 374*c83a76b0SSuyog Pawar * @brief calc (T+Q+RDOQ) output TU structure; entropy input TU structure 375*c83a76b0SSuyog Pawar ****************************************************************************** 376*c83a76b0SSuyog Pawar */ 377*c83a76b0SSuyog Pawar typedef struct 378*c83a76b0SSuyog Pawar { 379*c83a76b0SSuyog Pawar /** base tu structure */ 380*c83a76b0SSuyog Pawar tu_t s_tu; 381*c83a76b0SSuyog Pawar 382*c83a76b0SSuyog Pawar /** offset of luma data in ecd buffer */ 383*c83a76b0SSuyog Pawar WORD32 i4_luma_coeff_offset; 384*c83a76b0SSuyog Pawar 385*c83a76b0SSuyog Pawar /** offset of cb data in ecd buffer */ 386*c83a76b0SSuyog Pawar WORD32 ai4_cb_coeff_offset[2]; 387*c83a76b0SSuyog Pawar 388*c83a76b0SSuyog Pawar /** offset of cr data in ecd buffer */ 389*c83a76b0SSuyog Pawar WORD32 ai4_cr_coeff_offset[2]; 390*c83a76b0SSuyog Pawar 391*c83a76b0SSuyog Pawar } tu_enc_loop_out_t; 392*c83a76b0SSuyog Pawar 393*c83a76b0SSuyog Pawar typedef struct 394*c83a76b0SSuyog Pawar { 395*c83a76b0SSuyog Pawar /* L0 Motion Vector */ 396*c83a76b0SSuyog Pawar mv_t s_l0_mv; 397*c83a76b0SSuyog Pawar 398*c83a76b0SSuyog Pawar /* L1 Motion Vector */ 399*c83a76b0SSuyog Pawar mv_t s_l1_mv; 400*c83a76b0SSuyog Pawar 401*c83a76b0SSuyog Pawar /* L0 Ref index */ 402*c83a76b0SSuyog Pawar WORD8 i1_l0_ref_idx; 403*c83a76b0SSuyog Pawar 404*c83a76b0SSuyog Pawar /* L1 Ref index */ 405*c83a76b0SSuyog Pawar WORD8 i1_l1_ref_idx; 406*c83a76b0SSuyog Pawar 407*c83a76b0SSuyog Pawar /* L0 Ref Pic Buf ID */ 408*c83a76b0SSuyog Pawar WORD8 i1_l0_pic_buf_id; 409*c83a76b0SSuyog Pawar 410*c83a76b0SSuyog Pawar /* L1 Ref Pic Buf ID */ 411*c83a76b0SSuyog Pawar WORD8 i1_l1_pic_buf_id; 412*c83a76b0SSuyog Pawar 413*c83a76b0SSuyog Pawar /** intra flag */ 414*c83a76b0SSuyog Pawar UWORD8 b1_intra_flag : 1; 415*c83a76b0SSuyog Pawar 416*c83a76b0SSuyog Pawar /* Pred mode */ 417*c83a76b0SSuyog Pawar UWORD8 b2_pred_mode : 2; 418*c83a76b0SSuyog Pawar 419*c83a76b0SSuyog Pawar /* reserved flag can be used for something later */ 420*c83a76b0SSuyog Pawar UWORD8 u1_reserved; 421*c83a76b0SSuyog Pawar 422*c83a76b0SSuyog Pawar } pu_col_mv_t; 423*c83a76b0SSuyog Pawar 424*c83a76b0SSuyog Pawar /*****************************************************************************/ 425*c83a76b0SSuyog Pawar /* Encoder uses same structure as pu_t for prediction unit */ 426*c83a76b0SSuyog Pawar /*****************************************************************************/ 427*c83a76b0SSuyog Pawar 428*c83a76b0SSuyog Pawar /** 429*c83a76b0SSuyog Pawar ****************************************************************************** 430*c83a76b0SSuyog Pawar * @brief Encode loop (T+Q+RDOQ) output CU structure; entropy input CU structure 431*c83a76b0SSuyog Pawar ****************************************************************************** 432*c83a76b0SSuyog Pawar */ 433*c83a76b0SSuyog Pawar typedef struct 434*c83a76b0SSuyog Pawar { 435*c83a76b0SSuyog Pawar /* CU X position in terms of min CU (8x8) units */ 436*c83a76b0SSuyog Pawar UWORD32 b3_cu_pos_x : 3; 437*c83a76b0SSuyog Pawar 438*c83a76b0SSuyog Pawar /* CU Y position in terms of min CU (8x8) units */ 439*c83a76b0SSuyog Pawar UWORD32 b3_cu_pos_y : 3; 440*c83a76b0SSuyog Pawar 441*c83a76b0SSuyog Pawar /** CU size in terms of min CU (8x8) units */ 442*c83a76b0SSuyog Pawar UWORD32 b4_cu_size : 4; 443*c83a76b0SSuyog Pawar 444*c83a76b0SSuyog Pawar /** transquant bypass flag ; 0 for this encoder */ 445*c83a76b0SSuyog Pawar UWORD32 b1_tq_bypass_flag : 1; 446*c83a76b0SSuyog Pawar 447*c83a76b0SSuyog Pawar /** cu skip flag */ 448*c83a76b0SSuyog Pawar UWORD32 b1_skip_flag : 1; 449*c83a76b0SSuyog Pawar 450*c83a76b0SSuyog Pawar /** intra / inter CU flag */ 451*c83a76b0SSuyog Pawar UWORD32 b1_pred_mode_flag : 1; 452*c83a76b0SSuyog Pawar 453*c83a76b0SSuyog Pawar /** indicates partition information for CU 454*c83a76b0SSuyog Pawar * For intra 0 : for 2Nx2N / 1 for NxN iff CU=minCBsize 455*c83a76b0SSuyog Pawar * For inter 0 : @sa PART_SIZE_E 456*c83a76b0SSuyog Pawar */ 457*c83a76b0SSuyog Pawar UWORD32 b3_part_mode : 3; 458*c83a76b0SSuyog Pawar 459*c83a76b0SSuyog Pawar /** 0 for this encoder */ 460*c83a76b0SSuyog Pawar UWORD32 b1_pcm_flag : 1; 461*c83a76b0SSuyog Pawar 462*c83a76b0SSuyog Pawar /** only applicable for intra cu */ 463*c83a76b0SSuyog Pawar UWORD32 b3_chroma_intra_pred_mode : 3; 464*c83a76b0SSuyog Pawar 465*c83a76b0SSuyog Pawar /** no residue flag for cu */ 466*c83a76b0SSuyog Pawar UWORD32 b1_no_residual_syntax_flag : 1; 467*c83a76b0SSuyog Pawar 468*c83a76b0SSuyog Pawar /* flag to indicate if current CU is the first 469*c83a76b0SSuyog Pawar CU of the Quantisation group*/ 470*c83a76b0SSuyog Pawar UWORD32 b1_first_cu_in_qg : 1; 471*c83a76b0SSuyog Pawar 472*c83a76b0SSuyog Pawar /** Intra prev and reminder flags 473*c83a76b0SSuyog Pawar * if part is NxN the tntries 1,2,3 will be valid 474*c83a76b0SSuyog Pawar * other wise only enry 0 will be set. 475*c83a76b0SSuyog Pawar */ 476*c83a76b0SSuyog Pawar intra_prev_rem_flags_t as_prev_rem[NUM_PU_PARTS]; 477*c83a76b0SSuyog Pawar 478*c83a76b0SSuyog Pawar /** 479*c83a76b0SSuyog Pawar * Access valid number of pus in this array based on u1_part_mode 480*c83a76b0SSuyog Pawar * Moiton vector differentials and reference idx should be 481*c83a76b0SSuyog Pawar * populated in this structure 482*c83a76b0SSuyog Pawar * @remarks shall be accessed only for inter pus 483*c83a76b0SSuyog Pawar */ 484*c83a76b0SSuyog Pawar pu_t *ps_pu; 485*c83a76b0SSuyog Pawar 486*c83a76b0SSuyog Pawar /** 487*c83a76b0SSuyog Pawar * pointer to first tu of this cu. Each TU need to be populated 488*c83a76b0SSuyog Pawar * in TU order by calc. Total TUs in CU is given by u2_num_tus_in_cu 489*c83a76b0SSuyog Pawar */ 490*c83a76b0SSuyog Pawar tu_enc_loop_out_t *ps_enc_tu; 491*c83a76b0SSuyog Pawar 492*c83a76b0SSuyog Pawar /** total TUs in this CU; shall be 0 if b1_no_residual_syntax_flag = 1 */ 493*c83a76b0SSuyog Pawar UWORD16 u2_num_tus_in_cu; 494*c83a76b0SSuyog Pawar 495*c83a76b0SSuyog Pawar /** Coeff bufer pointer */ 496*c83a76b0SSuyog Pawar /* Pointer to transform coeff data */ 497*c83a76b0SSuyog Pawar /*************************************************************************/ 498*c83a76b0SSuyog Pawar /* Following format is repeated for every coded TU */ 499*c83a76b0SSuyog Pawar /* Luma Block */ 500*c83a76b0SSuyog Pawar /* num_coeffs : 16 bits */ 501*c83a76b0SSuyog Pawar /* zero_cols : 8 bits ( 1 bit per 4 columns) */ 502*c83a76b0SSuyog Pawar /* sig_coeff_map : ((TU Size * TU Size) + 31) >> 5 number of WORD32s */ 503*c83a76b0SSuyog Pawar /* coeff_data : Non zero coefficients */ 504*c83a76b0SSuyog Pawar /* Cb Block (only for last TU in 4x4 case else for every luma TU) */ 505*c83a76b0SSuyog Pawar /* num_coeffs : 16 bits */ 506*c83a76b0SSuyog Pawar /* zero_cols : 8 bits ( 1 bit per 4 columns) */ 507*c83a76b0SSuyog Pawar /* sig_coeff_map : ((TU Size * TU Size) + 31) >> 5 number of WORD32s */ 508*c83a76b0SSuyog Pawar /* coeff_data : Non zero coefficients */ 509*c83a76b0SSuyog Pawar /* Cr Block (only for last TU in 4x4 case else for every luma TU) */ 510*c83a76b0SSuyog Pawar /* num_coeffs : 16 bits */ 511*c83a76b0SSuyog Pawar /* zero_cols : 8 bits ( 1 bit per 4 columns) */ 512*c83a76b0SSuyog Pawar /* sig_coeff_map : ((TU Size * TU Size) + 31) >> 5 number of WORD32s */ 513*c83a76b0SSuyog Pawar /* coeff_data : Non zero coefficients */ 514*c83a76b0SSuyog Pawar /*************************************************************************/ 515*c83a76b0SSuyog Pawar void *pv_coeff; 516*c83a76b0SSuyog Pawar 517*c83a76b0SSuyog Pawar /** qp used during for CU 518*c83a76b0SSuyog Pawar * @remarks : 519*c83a76b0SSuyog Pawar */ 520*c83a76b0SSuyog Pawar WORD8 i1_cu_qp; 521*c83a76b0SSuyog Pawar 522*c83a76b0SSuyog Pawar } cu_enc_loop_out_t; 523*c83a76b0SSuyog Pawar 524*c83a76b0SSuyog Pawar /** 525*c83a76b0SSuyog Pawar * SAO 526*c83a76b0SSuyog Pawar */ 527*c83a76b0SSuyog Pawar typedef struct 528*c83a76b0SSuyog Pawar { 529*c83a76b0SSuyog Pawar /** 530*c83a76b0SSuyog Pawar * sao_type_idx_luma 531*c83a76b0SSuyog Pawar */ 532*c83a76b0SSuyog Pawar UWORD32 b3_y_type_idx : 3; 533*c83a76b0SSuyog Pawar 534*c83a76b0SSuyog Pawar /** 535*c83a76b0SSuyog Pawar * luma sao_band_position 536*c83a76b0SSuyog Pawar */ 537*c83a76b0SSuyog Pawar UWORD32 b5_y_band_pos : 5; 538*c83a76b0SSuyog Pawar 539*c83a76b0SSuyog Pawar /** 540*c83a76b0SSuyog Pawar * sao_type_idx_chroma 541*c83a76b0SSuyog Pawar */ 542*c83a76b0SSuyog Pawar UWORD32 b3_cb_type_idx : 3; 543*c83a76b0SSuyog Pawar 544*c83a76b0SSuyog Pawar /** 545*c83a76b0SSuyog Pawar * cb sao_band_position 546*c83a76b0SSuyog Pawar */ 547*c83a76b0SSuyog Pawar UWORD32 b5_cb_band_pos : 5; 548*c83a76b0SSuyog Pawar 549*c83a76b0SSuyog Pawar /** 550*c83a76b0SSuyog Pawar * sao_type_idx_chroma 551*c83a76b0SSuyog Pawar */ 552*c83a76b0SSuyog Pawar UWORD32 b3_cr_type_idx : 3; 553*c83a76b0SSuyog Pawar 554*c83a76b0SSuyog Pawar /** 555*c83a76b0SSuyog Pawar * cb sao_band_position 556*c83a76b0SSuyog Pawar */ 557*c83a76b0SSuyog Pawar UWORD32 b5_cr_band_pos : 5; 558*c83a76b0SSuyog Pawar 559*c83a76b0SSuyog Pawar /*SAO Offsets 560*c83a76b0SSuyog Pawar * In all these offsets, 0th element is not used 561*c83a76b0SSuyog Pawar */ 562*c83a76b0SSuyog Pawar /** 563*c83a76b0SSuyog Pawar * luma SaoOffsetVal[i] 564*c83a76b0SSuyog Pawar */ 565*c83a76b0SSuyog Pawar WORD8 u1_y_offset[5]; 566*c83a76b0SSuyog Pawar 567*c83a76b0SSuyog Pawar /** 568*c83a76b0SSuyog Pawar * chroma cb SaoOffsetVal[i] 569*c83a76b0SSuyog Pawar */ 570*c83a76b0SSuyog Pawar WORD8 u1_cb_offset[5]; 571*c83a76b0SSuyog Pawar 572*c83a76b0SSuyog Pawar /** 573*c83a76b0SSuyog Pawar * chroma cr SaoOffsetVal[i] 574*c83a76b0SSuyog Pawar */ 575*c83a76b0SSuyog Pawar WORD8 u1_cr_offset[5]; 576*c83a76b0SSuyog Pawar 577*c83a76b0SSuyog Pawar /** 578*c83a76b0SSuyog Pawar * sao_merge_left_flag common for y,cb,cr 579*c83a76b0SSuyog Pawar */ 580*c83a76b0SSuyog Pawar UWORD32 b1_sao_merge_left_flag : 1; 581*c83a76b0SSuyog Pawar 582*c83a76b0SSuyog Pawar /** 583*c83a76b0SSuyog Pawar * sao_merge_up_flag common for y,cb,cr 584*c83a76b0SSuyog Pawar */ 585*c83a76b0SSuyog Pawar UWORD32 b1_sao_merge_up_flag : 1; 586*c83a76b0SSuyog Pawar 587*c83a76b0SSuyog Pawar } sao_enc_t; 588*c83a76b0SSuyog Pawar 589*c83a76b0SSuyog Pawar /** 590*c83a76b0SSuyog Pawar ****************************************************************************** 591*c83a76b0SSuyog Pawar * @brief ctb output structure; output of Encode loop, input to entropy 592*c83a76b0SSuyog Pawar ****************************************************************************** 593*c83a76b0SSuyog Pawar */ 594*c83a76b0SSuyog Pawar typedef struct 595*c83a76b0SSuyog Pawar { 596*c83a76b0SSuyog Pawar /** 597*c83a76b0SSuyog Pawar * bit0 : depth0 split flag, (64x64 splits) 598*c83a76b0SSuyog Pawar * bits 1-3 : not used 599*c83a76b0SSuyog Pawar * bits 4-7 : depth1 split flags; valid iff depth0 split=1 (32x32 splits) 600*c83a76b0SSuyog Pawar * bits 8-23: depth2 split flags; (if 0 16x16 is cu else 8x8 min cu) 601*c83a76b0SSuyog Pawar 602*c83a76b0SSuyog Pawar * if a split flag of n is set for depth 1, check the following split flags 603*c83a76b0SSuyog Pawar * of [(8 + 4*(n-4)): (8 + 4*(n-4)+ 3)] for depth 2: 604*c83a76b0SSuyog Pawar * 605*c83a76b0SSuyog Pawar */ 606*c83a76b0SSuyog Pawar UWORD32 u4_cu_split_flags; 607*c83a76b0SSuyog Pawar 608*c83a76b0SSuyog Pawar /*************************************************************** 609*c83a76b0SSuyog Pawar * For any given CU position CU_posx, CU_posy access 610*c83a76b0SSuyog Pawar * au4_packed_tu_split_flags[(CU_posx >> 5)[(CU_posy >> 5)] 611*c83a76b0SSuyog Pawar * Note : For CTB size smaller than 64x64 only use u4_packed_tu_split_flags[0] 612*c83a76b0SSuyog Pawar ****************************************************************/ 613*c83a76b0SSuyog Pawar 614*c83a76b0SSuyog Pawar /** 615*c83a76b0SSuyog Pawar * access bits corresponding to actual CU size till leaf nodes 616*c83a76b0SSuyog Pawar * bit0 : (32x32 TU split flag) 617*c83a76b0SSuyog Pawar * bits 1-3 : not used 618*c83a76b0SSuyog Pawar * bits 4-7 : (16x16 TUsplit flags) 619*c83a76b0SSuyog Pawar * bits 8-23: (8x8 TU split flags) 620*c83a76b0SSuyog Pawar 621*c83a76b0SSuyog Pawar * if a split flag of n is set for depth 1, check the following split flags 622*c83a76b0SSuyog Pawar * of [(8 + 4*(n-4)): (8 + 4*(n-4)+ 3)] for depth 2: 623*c83a76b0SSuyog Pawar * 624*c83a76b0SSuyog Pawar * @remarks As tu sizes are relative to CU sizes the producer has to 625*c83a76b0SSuyog Pawar * make sure the correctness of u4_packed_tu_split_flags. 626*c83a76b0SSuyog Pawar * 627*c83a76b0SSuyog Pawar * @remarks au4_packed_tu_split_flags_cu[1]/[2]/[3] to be used only 628*c83a76b0SSuyog Pawar * for 64x64 ctb. 629*c83a76b0SSuyog Pawar */ 630*c83a76b0SSuyog Pawar UWORD32 au4_packed_tu_split_flags_cu[4]; 631*c83a76b0SSuyog Pawar 632*c83a76b0SSuyog Pawar /** 633*c83a76b0SSuyog Pawar * pointer to first CU of CTB. Each CU need to be populated 634*c83a76b0SSuyog Pawar * in CU order by calc. Total CUs in CTB is given by u1_num_cus_in_ctb 635*c83a76b0SSuyog Pawar */ 636*c83a76b0SSuyog Pawar cu_enc_loop_out_t *ps_enc_cu; 637*c83a76b0SSuyog Pawar 638*c83a76b0SSuyog Pawar /** total TUs in this CU; shall be 0 if b1_no_residual_syntax_flag = 1 */ 639*c83a76b0SSuyog Pawar UWORD8 u1_num_cus_in_ctb; 640*c83a76b0SSuyog Pawar 641*c83a76b0SSuyog Pawar /** CTB neighbour availability flags */ 642*c83a76b0SSuyog Pawar nbr_avail_flags_t s_ctb_nbr_avail_flags; 643*c83a76b0SSuyog Pawar 644*c83a76b0SSuyog Pawar /* SAO parameters of the CTB */ 645*c83a76b0SSuyog Pawar sao_enc_t s_sao; 646*c83a76b0SSuyog Pawar 647*c83a76b0SSuyog Pawar } ctb_enc_loop_out_t; 648*c83a76b0SSuyog Pawar 649*c83a76b0SSuyog Pawar /** 650*c83a76b0SSuyog Pawar ****************************************************************************** 651*c83a76b0SSuyog Pawar * @brief cu inter candidate for encoder 652*c83a76b0SSuyog Pawar ****************************************************************************** 653*c83a76b0SSuyog Pawar */ 654*c83a76b0SSuyog Pawar typedef struct 655*c83a76b0SSuyog Pawar { 656*c83a76b0SSuyog Pawar /** base pu structure 657*c83a76b0SSuyog Pawar * access valid number of entries in this array based on u1_part_size 658*c83a76b0SSuyog Pawar */ 659*c83a76b0SSuyog Pawar pu_t as_inter_pu[NUM_INTER_PU_PARTS]; 660*c83a76b0SSuyog Pawar 661*c83a76b0SSuyog Pawar /* TU split flag : tu_split_flag[0] represents the transform splits 662*c83a76b0SSuyog Pawar * for CU size <= 32, for 64x64 each ai4_tu_split_flag corresponds 663*c83a76b0SSuyog Pawar * to respective 32x32 */ 664*c83a76b0SSuyog Pawar /* For a 8x8 TU - 1 bit used to indicate split */ 665*c83a76b0SSuyog Pawar /* For a 16x16 TU - LSB used to indicate winner between 16 and 8 TU's. 4 other bits used to indicate split in each 8x8 quadrant */ 666*c83a76b0SSuyog Pawar /* For a 32x32 TU - See above */ 667*c83a76b0SSuyog Pawar WORD32 ai4_tu_split_flag[4]; 668*c83a76b0SSuyog Pawar 669*c83a76b0SSuyog Pawar /* TU split flag : tu_split_flag[0] represents the transform splits 670*c83a76b0SSuyog Pawar * for CU size <= 32, for 64x64 each ai4_tu_split_flag corresponds 671*c83a76b0SSuyog Pawar * to respective 32x32 */ 672*c83a76b0SSuyog Pawar /* For a 8x8 TU - 1 bit used to indicate split */ 673*c83a76b0SSuyog Pawar /* For a 16x16 TU - LSB used to indicate winner between 16 and 8 TU's. 4 other bits used to indicate split in each 8x8 quadrant */ 674*c83a76b0SSuyog Pawar /* For a 32x32 TU - See above */ 675*c83a76b0SSuyog Pawar WORD32 ai4_tu_early_cbf[4]; 676*c83a76b0SSuyog Pawar 677*c83a76b0SSuyog Pawar /**Pointer to the buffer having predicted data after mc in SATD stage 678*c83a76b0SSuyog Pawar * Since we have 2 buffers for each candidate pred data for best merge candidate 679*c83a76b0SSuyog Pawar * can be in one of the 2 buffers. 680*c83a76b0SSuyog Pawar */ 681*c83a76b0SSuyog Pawar UWORD8 *pu1_pred_data; 682*c83a76b0SSuyog Pawar 683*c83a76b0SSuyog Pawar UWORD16 *pu2_pred_data; 684*c83a76b0SSuyog Pawar 685*c83a76b0SSuyog Pawar UWORD8 *pu1_pred_data_scr; 686*c83a76b0SSuyog Pawar 687*c83a76b0SSuyog Pawar UWORD16 *pu2_pred_data_src; 688*c83a76b0SSuyog Pawar 689*c83a76b0SSuyog Pawar /* Total cost: SATD cost + MV cost */ 690*c83a76b0SSuyog Pawar WORD32 i4_total_cost; 691*c83a76b0SSuyog Pawar 692*c83a76b0SSuyog Pawar /** Stride for predicted data*/ 693*c83a76b0SSuyog Pawar WORD32 i4_pred_data_stride; 694*c83a76b0SSuyog Pawar 695*c83a76b0SSuyog Pawar /** @remarks u1_part_size can be non square only for Inter */ 696*c83a76b0SSuyog Pawar UWORD8 b3_part_size : 3; /* @sa: PART_SIZE_E */ 697*c83a76b0SSuyog Pawar 698*c83a76b0SSuyog Pawar /** evaluate transform for cusize iff this flag is 1 */ 699*c83a76b0SSuyog Pawar /** this flag should be set 0 if CU is 64x64 */ 700*c83a76b0SSuyog Pawar UWORD8 b1_eval_tx_cusize : 1; 701*c83a76b0SSuyog Pawar 702*c83a76b0SSuyog Pawar /** evaluate transform for cusize/2 iff this flag is 1 */ 703*c83a76b0SSuyog Pawar UWORD8 b1_eval_tx_cusize_by2 : 1; 704*c83a76b0SSuyog Pawar 705*c83a76b0SSuyog Pawar /** Skip Flag : ME should always set this 0 for the candidates */ 706*c83a76b0SSuyog Pawar UWORD8 b1_skip_flag : 1; 707*c83a76b0SSuyog Pawar 708*c83a76b0SSuyog Pawar UWORD8 b1_intra_has_won : 1; 709*c83a76b0SSuyog Pawar 710*c83a76b0SSuyog Pawar /* used to mark if this mode needs to be evaluated in auxiliary mode */ 711*c83a76b0SSuyog Pawar /* if 1, this mode will be evaluated otherwise not.*/ 712*c83a76b0SSuyog Pawar UWORD8 b1_eval_mark : 1; 713*c83a76b0SSuyog Pawar 714*c83a76b0SSuyog Pawar } cu_inter_cand_t; 715*c83a76b0SSuyog Pawar 716*c83a76b0SSuyog Pawar /** 717*c83a76b0SSuyog Pawar ****************************************************************************** 718*c83a76b0SSuyog Pawar * @brief cu intra candidate for encoder 719*c83a76b0SSuyog Pawar ****************************************************************************** 720*c83a76b0SSuyog Pawar */ 721*c83a76b0SSuyog Pawar typedef struct 722*c83a76b0SSuyog Pawar { 723*c83a76b0SSuyog Pawar UWORD8 au1_intra_luma_mode_nxn_hash[NUM_PU_PARTS][MAX_INTRA_CANDIDATES]; 724*c83a76b0SSuyog Pawar 725*c83a76b0SSuyog Pawar /** 726*c83a76b0SSuyog Pawar * List of NxN PU candidates in CU for each partition 727*c83a76b0SSuyog Pawar * valid only of if current cusize = mincusize 728*c83a76b0SSuyog Pawar * +1 to signal the last flag invalid value of 255 needs to be stored 729*c83a76b0SSuyog Pawar */ 730*c83a76b0SSuyog Pawar UWORD8 au1_intra_luma_modes_nxn[NUM_PU_PARTS][(MAX_INTRA_CU_CANDIDATES * (4)) + 2 + 1]; 731*c83a76b0SSuyog Pawar 732*c83a76b0SSuyog Pawar /* used to mark if this mode needs to be evaluated in auxiliary mode */ 733*c83a76b0SSuyog Pawar /* if 1, this mode will be evaluated otherwise not.*/ 734*c83a76b0SSuyog Pawar UWORD8 au1_nxn_eval_mark[NUM_PU_PARTS][MAX_INTRA_CU_CANDIDATES + 1]; 735*c83a76b0SSuyog Pawar 736*c83a76b0SSuyog Pawar /** 737*c83a76b0SSuyog Pawar * List of 2Nx2N PU candidates in CU 738*c83a76b0SSuyog Pawar * +1 to signal the last flag invalid value of 255 needs to be stored 739*c83a76b0SSuyog Pawar */ 740*c83a76b0SSuyog Pawar UWORD8 au1_intra_luma_modes_2nx2n_tu_eq_cu[MAX_INTRA_CU_CANDIDATES + 1]; 741*c83a76b0SSuyog Pawar 742*c83a76b0SSuyog Pawar /** 743*c83a76b0SSuyog Pawar * List of 2Nx2N PU candidates in CU 744*c83a76b0SSuyog Pawar * +1 to signal the last flag invalid value of 255 needs to be stored 745*c83a76b0SSuyog Pawar */ 746*c83a76b0SSuyog Pawar UWORD8 au1_intra_luma_modes_2nx2n_tu_eq_cu_by_2[MAX_INTRA_CU_CANDIDATES + 1]; 747*c83a76b0SSuyog Pawar 748*c83a76b0SSuyog Pawar /* used to mark if this mode needs to be evaluated in auxiliary mode */ 749*c83a76b0SSuyog Pawar /* if 1, this mode will be evaluated otherwise not.*/ 750*c83a76b0SSuyog Pawar UWORD8 au1_2nx2n_tu_eq_cu_eval_mark[MAX_INTRA_CU_CANDIDATES + 1]; 751*c83a76b0SSuyog Pawar 752*c83a76b0SSuyog Pawar /* used to mark if this mode needs to be evaluated in auxiliary mode */ 753*c83a76b0SSuyog Pawar /* if 1, this mode will be evaluated otherwise not.*/ 754*c83a76b0SSuyog Pawar UWORD8 au1_2nx2n_tu_eq_cu_by_2_eval_mark[MAX_INTRA_CU_CANDIDATES + 1]; 755*c83a76b0SSuyog Pawar 756*c83a76b0SSuyog Pawar UWORD8 au1_num_modes_added[NUM_PU_PARTS]; 757*c83a76b0SSuyog Pawar 758*c83a76b0SSuyog Pawar /** evaluate transform for cusize iff this flag is 1 */ 759*c83a76b0SSuyog Pawar /** this flag should be set 0 if CU is 64x64 */ 760*c83a76b0SSuyog Pawar UWORD8 b1_eval_tx_cusize : 1; 761*c83a76b0SSuyog Pawar 762*c83a76b0SSuyog Pawar /** evaluate transform for cusize/2 iff this flag is 1 */ 763*c83a76b0SSuyog Pawar UWORD8 b1_eval_tx_cusize_by2 : 1; 764*c83a76b0SSuyog Pawar 765*c83a76b0SSuyog Pawar /** number of intra candidates for SATD evaluation in */ 766*c83a76b0SSuyog Pawar UWORD8 b6_num_intra_cands : 6; 767*c83a76b0SSuyog Pawar 768*c83a76b0SSuyog Pawar } cu_intra_cand_t; 769*c83a76b0SSuyog Pawar 770*c83a76b0SSuyog Pawar /** 771*c83a76b0SSuyog Pawar ****************************************************************************** 772*c83a76b0SSuyog Pawar * @brief cu structure for mode analysis/evaluation 773*c83a76b0SSuyog Pawar ****************************************************************************** 774*c83a76b0SSuyog Pawar */ 775*c83a76b0SSuyog Pawar typedef struct 776*c83a76b0SSuyog Pawar { 777*c83a76b0SSuyog Pawar /** CU X position in terms of min CU (8x8) units */ 778*c83a76b0SSuyog Pawar UWORD8 b3_cu_pos_x : 3; 779*c83a76b0SSuyog Pawar 780*c83a76b0SSuyog Pawar /** CU Y position in terms of min CU (8x8) units */ 781*c83a76b0SSuyog Pawar UWORD8 b3_cu_pos_y : 3; 782*c83a76b0SSuyog Pawar 783*c83a76b0SSuyog Pawar /** reserved bytes */ 784*c83a76b0SSuyog Pawar UWORD8 b2_reserved : 2; 785*c83a76b0SSuyog Pawar 786*c83a76b0SSuyog Pawar /** CU size 2N (width or height) in pixels */ 787*c83a76b0SSuyog Pawar UWORD8 u1_cu_size; 788*c83a76b0SSuyog Pawar 789*c83a76b0SSuyog Pawar /** Intra CU candidates after FAST CU decision (output of IPE) 790*c83a76b0SSuyog Pawar * 8421 algo along with transform size evalution will 791*c83a76b0SSuyog Pawar * be done for these modes in Encode loop pass. 792*c83a76b0SSuyog Pawar */ 793*c83a76b0SSuyog Pawar cu_intra_cand_t s_cu_intra_cand; 794*c83a76b0SSuyog Pawar 795*c83a76b0SSuyog Pawar /** indicates the angular mode (0 - 34) for chroma, 796*c83a76b0SSuyog Pawar * Note : No provision currently to take chroma through RDOPT or SATD 797*c83a76b0SSuyog Pawar */ 798*c83a76b0SSuyog Pawar UWORD8 u1_chroma_intra_pred_mode; 799*c83a76b0SSuyog Pawar 800*c83a76b0SSuyog Pawar /** number of inter candidates in as_cu_inter_cand[] 801*c83a76b0SSuyog Pawar * shall be 0 for intra frames. 802*c83a76b0SSuyog Pawar * These inters are evaluated for RDOPT apart from merge/skip candidates 803*c83a76b0SSuyog Pawar */ 804*c83a76b0SSuyog Pawar UWORD8 u1_num_inter_cands; 805*c83a76b0SSuyog Pawar 806*c83a76b0SSuyog Pawar /** List of candidates to be evalauted (SATD/RDOPT) for this CU 807*c83a76b0SSuyog Pawar * @remarks : all merge/skip candidates not a part of this list 808*c83a76b0SSuyog Pawar */ 809*c83a76b0SSuyog Pawar cu_inter_cand_t as_cu_inter_cand[MAX_INTER_CU_CANDIDATES]; 810*c83a76b0SSuyog Pawar 811*c83a76b0SSuyog Pawar WORD32 ai4_mv_cost[MAX_INTER_CU_CANDIDATES][NUM_INTER_PU_PARTS]; 812*c83a76b0SSuyog Pawar 813*c83a76b0SSuyog Pawar #if REUSE_ME_COMPUTED_ERROR_FOR_INTER_CAND_SIFTING 814*c83a76b0SSuyog Pawar WORD32 ai4_err_metric[MAX_INTER_CU_CANDIDATES][NUM_INTER_PU_PARTS]; 815*c83a76b0SSuyog Pawar #endif 816*c83a76b0SSuyog Pawar 817*c83a76b0SSuyog Pawar /* Flag to convey if Inta or Inter is the best candidate among the 818*c83a76b0SSuyog Pawar candidates populated 819*c83a76b0SSuyog Pawar 0: If inter is the winner and 1: if Intra is winner*/ 820*c83a76b0SSuyog Pawar UWORD8 u1_best_is_intra; 821*c83a76b0SSuyog Pawar 822*c83a76b0SSuyog Pawar /** number of intra rdopt candidates 823*c83a76b0SSuyog Pawar * @remarks : shall be <= u1_num_intra_cands 824*c83a76b0SSuyog Pawar */ 825*c83a76b0SSuyog Pawar UWORD8 u1_num_intra_rdopt_cands; 826*c83a76b0SSuyog Pawar /** qp used during for CU 827*c83a76b0SSuyog Pawar * @remarks : 828*c83a76b0SSuyog Pawar */ 829*c83a76b0SSuyog Pawar WORD8 i1_cu_qp; 830*c83a76b0SSuyog Pawar /** Activity factor used in pre enc thread for deriving the Qp 831*c83a76b0SSuyog Pawar * @remarks : This is in Q format 832*c83a76b0SSuyog Pawar */ 833*c83a76b0SSuyog Pawar WORD32 i4_act_factor[4][2]; 834*c83a76b0SSuyog Pawar 835*c83a76b0SSuyog Pawar } cu_analyse_t; 836*c83a76b0SSuyog Pawar 837*c83a76b0SSuyog Pawar /** 838*c83a76b0SSuyog Pawar ****************************************************************************** 839*c83a76b0SSuyog Pawar * @brief Structure for CU recursion 840*c83a76b0SSuyog Pawar ****************************************************************************** 841*c83a76b0SSuyog Pawar */ 842*c83a76b0SSuyog Pawar typedef struct cur_ctb_cu_tree_t 843*c83a76b0SSuyog Pawar { 844*c83a76b0SSuyog Pawar /** CU X position in terms of min CU (8x8) units */ 845*c83a76b0SSuyog Pawar UWORD8 b3_cu_pos_x : 3; 846*c83a76b0SSuyog Pawar 847*c83a76b0SSuyog Pawar /** CU X position in terms of min CU (8x8) units */ 848*c83a76b0SSuyog Pawar UWORD8 b3_cu_pos_y : 3; 849*c83a76b0SSuyog Pawar 850*c83a76b0SSuyog Pawar /** reserved bytes */ 851*c83a76b0SSuyog Pawar UWORD8 b2_reserved : 2; 852*c83a76b0SSuyog Pawar 853*c83a76b0SSuyog Pawar UWORD8 u1_cu_size; 854*c83a76b0SSuyog Pawar 855*c83a76b0SSuyog Pawar UWORD8 u1_intra_eval_enable; 856*c83a76b0SSuyog Pawar 857*c83a76b0SSuyog Pawar UWORD8 u1_inter_eval_enable; 858*c83a76b0SSuyog Pawar 859*c83a76b0SSuyog Pawar /* Flag that indicates whether to evaluate this node */ 860*c83a76b0SSuyog Pawar /* during RDOPT evaluation. This does not mean that */ 861*c83a76b0SSuyog Pawar /* evaluation of the children need to be abandoned */ 862*c83a76b0SSuyog Pawar UWORD8 is_node_valid; 863*c83a76b0SSuyog Pawar 864*c83a76b0SSuyog Pawar LWORD64 i8_best_rdopt_cost; 865*c83a76b0SSuyog Pawar 866*c83a76b0SSuyog Pawar struct cur_ctb_cu_tree_t *ps_child_node_tl; 867*c83a76b0SSuyog Pawar 868*c83a76b0SSuyog Pawar struct cur_ctb_cu_tree_t *ps_child_node_tr; 869*c83a76b0SSuyog Pawar 870*c83a76b0SSuyog Pawar struct cur_ctb_cu_tree_t *ps_child_node_bl; 871*c83a76b0SSuyog Pawar 872*c83a76b0SSuyog Pawar struct cur_ctb_cu_tree_t *ps_child_node_br; 873*c83a76b0SSuyog Pawar 874*c83a76b0SSuyog Pawar } cur_ctb_cu_tree_t; 875*c83a76b0SSuyog Pawar 876*c83a76b0SSuyog Pawar typedef struct 877*c83a76b0SSuyog Pawar { 878*c83a76b0SSuyog Pawar WORD32 num_best_results; 879*c83a76b0SSuyog Pawar 880*c83a76b0SSuyog Pawar part_type_results_t as_best_results[NUM_BEST_ME_OUTPUTS]; 881*c83a76b0SSuyog Pawar 882*c83a76b0SSuyog Pawar } block_data_32x32_t; 883*c83a76b0SSuyog Pawar 884*c83a76b0SSuyog Pawar /** 885*c83a76b0SSuyog Pawar ****************************************************************************** 886*c83a76b0SSuyog Pawar * @brief Structure for storing data about all the 64x64 887*c83a76b0SSuyog Pawar * block in a 64x64 CTB 888*c83a76b0SSuyog Pawar ****************************************************************************** 889*c83a76b0SSuyog Pawar */ 890*c83a76b0SSuyog Pawar typedef block_data_32x32_t block_data_64x64_t; 891*c83a76b0SSuyog Pawar 892*c83a76b0SSuyog Pawar /** 893*c83a76b0SSuyog Pawar ****************************************************************************** 894*c83a76b0SSuyog Pawar * @brief Structure for storing data about all 16 16x16 895*c83a76b0SSuyog Pawar * blocks in a 64x64 CTB and each of their partitions 896*c83a76b0SSuyog Pawar ****************************************************************************** 897*c83a76b0SSuyog Pawar */ 898*c83a76b0SSuyog Pawar typedef struct 899*c83a76b0SSuyog Pawar { 900*c83a76b0SSuyog Pawar WORD32 num_best_results; 901*c83a76b0SSuyog Pawar 902*c83a76b0SSuyog Pawar /** 903*c83a76b0SSuyog Pawar * mask of active partitions, Totally 17 bits. For a given partition 904*c83a76b0SSuyog Pawar * id, as per PART_ID_T enum the corresponding bit position is 1/0 905*c83a76b0SSuyog Pawar * indicating that partition is active or inactive 906*c83a76b0SSuyog Pawar */ 907*c83a76b0SSuyog Pawar /*WORD32 i4_part_mask;*/ 908*c83a76b0SSuyog Pawar 909*c83a76b0SSuyog Pawar part_type_results_t as_best_results[NUM_BEST_ME_OUTPUTS]; 910*c83a76b0SSuyog Pawar 911*c83a76b0SSuyog Pawar } block_data_16x16_t; 912*c83a76b0SSuyog Pawar 913*c83a76b0SSuyog Pawar typedef struct 914*c83a76b0SSuyog Pawar { 915*c83a76b0SSuyog Pawar WORD32 num_best_results; 916*c83a76b0SSuyog Pawar 917*c83a76b0SSuyog Pawar part_type_results_t as_best_results[NUM_BEST_ME_OUTPUTS]; 918*c83a76b0SSuyog Pawar } block_data_8x8_t; 919*c83a76b0SSuyog Pawar 920*c83a76b0SSuyog Pawar /** 921*c83a76b0SSuyog Pawar ****************************************************************************** 922*c83a76b0SSuyog Pawar * @brief Structure for data export from ME to Enc_Loop 923*c83a76b0SSuyog Pawar ****************************************************************************** 924*c83a76b0SSuyog Pawar */ 925*c83a76b0SSuyog Pawar typedef struct 926*c83a76b0SSuyog Pawar { 927*c83a76b0SSuyog Pawar block_data_8x8_t as_8x8_block_data[64]; 928*c83a76b0SSuyog Pawar 929*c83a76b0SSuyog Pawar block_data_16x16_t as_block_data[16]; 930*c83a76b0SSuyog Pawar 931*c83a76b0SSuyog Pawar block_data_32x32_t as_32x32_block_data[4]; 932*c83a76b0SSuyog Pawar 933*c83a76b0SSuyog Pawar block_data_64x64_t s_64x64_block_data; 934*c83a76b0SSuyog Pawar 935*c83a76b0SSuyog Pawar } me_ctb_data_t; 936*c83a76b0SSuyog Pawar 937*c83a76b0SSuyog Pawar /** 938*c83a76b0SSuyog Pawar ****************************************************************************** 939*c83a76b0SSuyog Pawar * @brief noise detection related structure 940*c83a76b0SSuyog Pawar * 941*c83a76b0SSuyog Pawar ****************************************************************************** 942*c83a76b0SSuyog Pawar */ 943*c83a76b0SSuyog Pawar 944*c83a76b0SSuyog Pawar typedef struct 945*c83a76b0SSuyog Pawar { 946*c83a76b0SSuyog Pawar WORD32 i4_noise_present; 947*c83a76b0SSuyog Pawar 948*c83a76b0SSuyog Pawar UWORD8 au1_is_8x8Blk_noisy[MAX_CU_IN_CTB]; 949*c83a76b0SSuyog Pawar 950*c83a76b0SSuyog Pawar UWORD32 au4_variance_src_16x16[MAX_CU_IN_CTB]; 951*c83a76b0SSuyog Pawar } ihevce_ctb_noise_params; 952*c83a76b0SSuyog Pawar 953*c83a76b0SSuyog Pawar /** 954*c83a76b0SSuyog Pawar ****************************************************************************** 955*c83a76b0SSuyog Pawar * @brief ctb structure for mode analysis/evaluation 956*c83a76b0SSuyog Pawar ****************************************************************************** 957*c83a76b0SSuyog Pawar */ 958*c83a76b0SSuyog Pawar typedef struct 959*c83a76b0SSuyog Pawar { 960*c83a76b0SSuyog Pawar /** 961*c83a76b0SSuyog Pawar * CU decision in a ctb is frozen by ME/IPE and populated in 962*c83a76b0SSuyog Pawar * u4_packed_cu_split_flags. 963*c83a76b0SSuyog Pawar * @remarks 964*c83a76b0SSuyog Pawar * TODO:review comment 965*c83a76b0SSuyog Pawar * bit0 : 64x64 split flag, (depth0 flag for 64x64 ctb unused for smaller ctb) 966*c83a76b0SSuyog Pawar * bits 1-3 : not used 967*c83a76b0SSuyog Pawar * bits 4-7 : 32x32 split flags; (depth1 flags for 64x64ctb / only bit4 used for 32x32ctb) 968*c83a76b0SSuyog Pawar * bits 8-23: 16x16 split flags; (depth2 flags for 64x64 / depth1[bits8-11] for 32x32 [bit8 for ctb 16x16] ) 969*c83a76b0SSuyog Pawar 970*c83a76b0SSuyog Pawar * if a split flag of n is set for depth 1, check the following split flags 971*c83a76b0SSuyog Pawar * of [(8 + 4*(n-4)): (8 + 4*(n-4)+ 3)] for depth 2: 972*c83a76b0SSuyog Pawar * 973*c83a76b0SSuyog Pawar */ 974*c83a76b0SSuyog Pawar UWORD32 u4_cu_split_flags; 975*c83a76b0SSuyog Pawar 976*c83a76b0SSuyog Pawar UWORD8 u1_num_cus_in_ctb; 977*c83a76b0SSuyog Pawar 978*c83a76b0SSuyog Pawar cur_ctb_cu_tree_t *ps_cu_tree; 979*c83a76b0SSuyog Pawar 980*c83a76b0SSuyog Pawar me_ctb_data_t *ps_me_ctb_data; 981*c83a76b0SSuyog Pawar 982*c83a76b0SSuyog Pawar ihevce_ctb_noise_params s_ctb_noise_params; 983*c83a76b0SSuyog Pawar 984*c83a76b0SSuyog Pawar } ctb_analyse_t; 985*c83a76b0SSuyog Pawar /** 986*c83a76b0SSuyog Pawar ****************************************************************************** 987*c83a76b0SSuyog Pawar * @brief Structures for tapping ssd and bit-estimate information for all CUs 988*c83a76b0SSuyog Pawar ****************************************************************************** 989*c83a76b0SSuyog Pawar */ 990*c83a76b0SSuyog Pawar 991*c83a76b0SSuyog Pawar typedef struct 992*c83a76b0SSuyog Pawar { 993*c83a76b0SSuyog Pawar LWORD64 i8_cost; 994*c83a76b0SSuyog Pawar WORD32 i4_idx; 995*c83a76b0SSuyog Pawar } cost_idx_t; 996*c83a76b0SSuyog Pawar 997*c83a76b0SSuyog Pawar /** 998*c83a76b0SSuyog Pawar ****************************************************************************** 999*c83a76b0SSuyog Pawar * @brief reference/non reference pic context for encoder 1000*c83a76b0SSuyog Pawar ****************************************************************************** 1001*c83a76b0SSuyog Pawar */ 1002*c83a76b0SSuyog Pawar typedef struct 1003*c83a76b0SSuyog Pawar 1004*c83a76b0SSuyog Pawar { 1005*c83a76b0SSuyog Pawar /** 1006*c83a76b0SSuyog Pawar * YUV buffer discriptor for the recon 1007*c83a76b0SSuyog Pawar * Allocation per frame for Y = ((ALIGN(frame width, MAX_CTB_SIZE)) + 2 * PAD_HORZ)* 1008*c83a76b0SSuyog Pawar * ((ALIGN(frame height, MAX_CTB_SIZE)) + 2 * PAD_VERT) 1009*c83a76b0SSuyog Pawar */ 1010*c83a76b0SSuyog Pawar iv_enc_yuv_buf_t s_yuv_buf_desc; 1011*c83a76b0SSuyog Pawar 1012*c83a76b0SSuyog Pawar iv_enc_yuv_buf_src_t s_yuv_buf_desc_src; 1013*c83a76b0SSuyog Pawar 1014*c83a76b0SSuyog Pawar /* Pointer to Luma (Y) sub plane buffers Horz/ Vert / HV grid */ 1015*c83a76b0SSuyog Pawar /* When (L0ME_IN_OPENLOOP_MODE == 1), additional buffer required to store */ 1016*c83a76b0SSuyog Pawar /* the fullpel plane for use as reference */ 1017*c83a76b0SSuyog Pawar UWORD8 *apu1_y_sub_pel_planes[3 + L0ME_IN_OPENLOOP_MODE]; 1018*c83a76b0SSuyog Pawar 1019*c83a76b0SSuyog Pawar /** 1020*c83a76b0SSuyog Pawar * frm level pointer to pu bank for colocated mv access 1021*c83a76b0SSuyog Pawar * Allocation per frame = (ALIGN(frame width, MAX_CTB_SIZE) / MIN_PU_SIZE) * 1022*c83a76b0SSuyog Pawar * (ALIGN(frame height, MAX_CTB_SIZE) / MIN_PU_SIZE) 1023*c83a76b0SSuyog Pawar */ 1024*c83a76b0SSuyog Pawar pu_col_mv_t *ps_frm_col_mv; 1025*c83a76b0SSuyog Pawar /** 1026*c83a76b0SSuyog Pawar ************************************************************************ 1027*c83a76b0SSuyog Pawar * Pointer to a PU map stored at frame level, 1028*c83a76b0SSuyog Pawar * It contains a 7 bit pu index in encoder order w.r.t to a ctb at a min 1029*c83a76b0SSuyog Pawar * granularirty of MIN_PU_SIZE size. 1030*c83a76b0SSuyog Pawar ************************************************************************ 1031*c83a76b0SSuyog Pawar */ 1032*c83a76b0SSuyog Pawar UWORD8 *pu1_frm_pu_map; 1033*c83a76b0SSuyog Pawar 1034*c83a76b0SSuyog Pawar /** CTB level frame buffer to store the accumulated sum of 1035*c83a76b0SSuyog Pawar * number of PUs for every row */ 1036*c83a76b0SSuyog Pawar UWORD16 *pu2_num_pu_map; 1037*c83a76b0SSuyog Pawar 1038*c83a76b0SSuyog Pawar /** Offsets in the PU buffer at every CTB level */ 1039*c83a76b0SSuyog Pawar UWORD32 *pu4_pu_off; 1040*c83a76b0SSuyog Pawar 1041*c83a76b0SSuyog Pawar /** Collocated POC for reference list 0 1042*c83a76b0SSuyog Pawar * ToDo: Change the array size when multiple slices are to be supported */ 1043*c83a76b0SSuyog Pawar WORD32 ai4_col_l0_poc[HEVCE_MAX_REF_PICS]; 1044*c83a76b0SSuyog Pawar 1045*c83a76b0SSuyog Pawar /** Collocated POC for reference list 1 */ 1046*c83a76b0SSuyog Pawar WORD32 ai4_col_l1_poc[HEVCE_MAX_REF_PICS]; 1047*c83a76b0SSuyog Pawar 1048*c83a76b0SSuyog Pawar /** 0 = top field, 1 = bottom field */ 1049*c83a76b0SSuyog Pawar WORD32 i4_bottom_field; 1050*c83a76b0SSuyog Pawar 1051*c83a76b0SSuyog Pawar /** top field first input in case of interlaced case */ 1052*c83a76b0SSuyog Pawar WORD32 i4_topfield_first; 1053*c83a76b0SSuyog Pawar 1054*c83a76b0SSuyog Pawar /** top field first input in case of interlaced case */ 1055*c83a76b0SSuyog Pawar WORD32 i4_poc; 1056*c83a76b0SSuyog Pawar 1057*c83a76b0SSuyog Pawar /** unique buffer id */ 1058*c83a76b0SSuyog Pawar WORD32 i4_buf_id; 1059*c83a76b0SSuyog Pawar 1060*c83a76b0SSuyog Pawar /** is this reference frame or not */ 1061*c83a76b0SSuyog Pawar WORD32 i4_is_reference; 1062*c83a76b0SSuyog Pawar 1063*c83a76b0SSuyog Pawar /** Picture type of current picture */ 1064*c83a76b0SSuyog Pawar WORD32 i4_pic_type; 1065*c83a76b0SSuyog Pawar 1066*c83a76b0SSuyog Pawar /** Flag to indicate whether current pictute is free or in use */ 1067*c83a76b0SSuyog Pawar WORD32 i4_is_free; 1068*c83a76b0SSuyog Pawar 1069*c83a76b0SSuyog Pawar /** Bit0 - of this Flag to indicate whether current pictute needs to be deblocked, 1070*c83a76b0SSuyog Pawar padded and hpel planes need to be generated. 1071*c83a76b0SSuyog Pawar These are turned off typically in non referecne pictures when psnr 1072*c83a76b0SSuyog Pawar and recon dump is disabled. 1073*c83a76b0SSuyog Pawar 1074*c83a76b0SSuyog Pawar Bit1 - of this flag set to 1 if sao is enabled. This is to enable deblocking when sao is enabled 1075*c83a76b0SSuyog Pawar */ 1076*c83a76b0SSuyog Pawar WORD32 i4_deblk_pad_hpel_cur_pic; 1077*c83a76b0SSuyog Pawar 1078*c83a76b0SSuyog Pawar /** 1079*c83a76b0SSuyog Pawar * weight and offset for this ref pic. To be initialized for every pic 1080*c83a76b0SSuyog Pawar * based on the lap output 1081*c83a76b0SSuyog Pawar */ 1082*c83a76b0SSuyog Pawar ihevce_wght_offst_t s_weight_offset; 1083*c83a76b0SSuyog Pawar 1084*c83a76b0SSuyog Pawar /** 1085*c83a76b0SSuyog Pawar * Reciprocal of the lumaweight in q15 format 1086*c83a76b0SSuyog Pawar */ 1087*c83a76b0SSuyog Pawar WORD32 i4_inv_luma_wt; 1088*c83a76b0SSuyog Pawar 1089*c83a76b0SSuyog Pawar /** 1090*c83a76b0SSuyog Pawar * Log to base 2 of the common denominator used for luma weights across all ref pics 1091*c83a76b0SSuyog Pawar */ 1092*c83a76b0SSuyog Pawar WORD32 i4_log2_wt_denom; 1093*c83a76b0SSuyog Pawar 1094*c83a76b0SSuyog Pawar /** 1095*c83a76b0SSuyog Pawar * Used as Reference for encoding current picture flag 1096*c83a76b0SSuyog Pawar */ 1097*c83a76b0SSuyog Pawar WORD32 i4_used_by_cur_pic_flag; 1098*c83a76b0SSuyog Pawar 1099*c83a76b0SSuyog Pawar #if ADAPT_COLOCATED_FROM_L0_FLAG 1100*c83a76b0SSuyog Pawar WORD32 i4_frame_qp; 1101*c83a76b0SSuyog Pawar #endif 1102*c83a76b0SSuyog Pawar /* 1103*c83a76b0SSuyog Pawar * IDR GOP number 1104*c83a76b0SSuyog Pawar */ 1105*c83a76b0SSuyog Pawar 1106*c83a76b0SSuyog Pawar WORD32 i4_idr_gop_num; 1107*c83a76b0SSuyog Pawar 1108*c83a76b0SSuyog Pawar /* 1109*c83a76b0SSuyog Pawar * non-ref-free_flag 1110*c83a76b0SSuyog Pawar */ 1111*c83a76b0SSuyog Pawar WORD32 i4_non_ref_free_flag; 1112*c83a76b0SSuyog Pawar /** 1113*c83a76b0SSuyog Pawar * Dependency manager instance for ME - Prev recon dep 1114*c83a76b0SSuyog Pawar */ 1115*c83a76b0SSuyog Pawar void *pv_dep_mngr_recon; 1116*c83a76b0SSuyog Pawar 1117*c83a76b0SSuyog Pawar /*display num*/ 1118*c83a76b0SSuyog Pawar WORD32 i4_display_num; 1119*c83a76b0SSuyog Pawar } recon_pic_buf_t; 1120*c83a76b0SSuyog Pawar 1121*c83a76b0SSuyog Pawar /** 1122*c83a76b0SSuyog Pawar ****************************************************************************** 1123*c83a76b0SSuyog Pawar * @brief Lambda values used for various cost computations 1124*c83a76b0SSuyog Pawar ****************************************************************************** 1125*c83a76b0SSuyog Pawar */ 1126*c83a76b0SSuyog Pawar typedef struct 1127*c83a76b0SSuyog Pawar { 1128*c83a76b0SSuyog Pawar /************************************************************************/ 1129*c83a76b0SSuyog Pawar /* The fields with the string 'type2' in their names are required */ 1130*c83a76b0SSuyog Pawar /* when both 8bit and hbd lambdas are needed. The lambdas corresponding */ 1131*c83a76b0SSuyog Pawar /* to the bit_depth != internal_bit_depth are stored in these fields */ 1132*c83a76b0SSuyog Pawar /************************************************************************/ 1133*c83a76b0SSuyog Pawar 1134*c83a76b0SSuyog Pawar /** 1135*c83a76b0SSuyog Pawar * Closed loop SSD Lambda 1136*c83a76b0SSuyog Pawar * This is multiplied with bits for RD cost computations in SSD mode 1137*c83a76b0SSuyog Pawar * This is represented in q format with shift of LAMBDA_Q_SHIFT 1138*c83a76b0SSuyog Pawar */ 1139*c83a76b0SSuyog Pawar LWORD64 i8_cl_ssd_lambda_qf; 1140*c83a76b0SSuyog Pawar 1141*c83a76b0SSuyog Pawar LWORD64 i8_cl_ssd_type2_lambda_qf; 1142*c83a76b0SSuyog Pawar 1143*c83a76b0SSuyog Pawar /** 1144*c83a76b0SSuyog Pawar * Closed loop SSD Lambda for chroma residue (chroma qp is different from luma qp) 1145*c83a76b0SSuyog Pawar * This is multiplied with bits for RD cost computations in SSD mode 1146*c83a76b0SSuyog Pawar * This is represented in q format with shift of LAMBDA_Q_SHIFT 1147*c83a76b0SSuyog Pawar */ 1148*c83a76b0SSuyog Pawar LWORD64 i8_cl_ssd_lambda_chroma_qf; 1149*c83a76b0SSuyog Pawar 1150*c83a76b0SSuyog Pawar LWORD64 i8_cl_ssd_type2_lambda_chroma_qf; 1151*c83a76b0SSuyog Pawar 1152*c83a76b0SSuyog Pawar /** 1153*c83a76b0SSuyog Pawar * Closed loop SAD Lambda 1154*c83a76b0SSuyog Pawar * This is multiplied with bits for RD cost computations in SAD mode 1155*c83a76b0SSuyog Pawar * This is represented in q format with shift of LAMBDA_Q_SHIFT 1156*c83a76b0SSuyog Pawar */ 1157*c83a76b0SSuyog Pawar WORD32 i4_cl_sad_lambda_qf; 1158*c83a76b0SSuyog Pawar 1159*c83a76b0SSuyog Pawar WORD32 i4_cl_sad_type2_lambda_qf; 1160*c83a76b0SSuyog Pawar 1161*c83a76b0SSuyog Pawar /** 1162*c83a76b0SSuyog Pawar * Open loop SAD Lambda 1163*c83a76b0SSuyog Pawar * This is multiplied with bits for RD cost computations in SAD mode 1164*c83a76b0SSuyog Pawar * This is represented in q format with shift of LAMBDA_Q_SHIFT 1165*c83a76b0SSuyog Pawar */ 1166*c83a76b0SSuyog Pawar WORD32 i4_ol_sad_lambda_qf; 1167*c83a76b0SSuyog Pawar 1168*c83a76b0SSuyog Pawar WORD32 i4_ol_sad_type2_lambda_qf; 1169*c83a76b0SSuyog Pawar 1170*c83a76b0SSuyog Pawar /** 1171*c83a76b0SSuyog Pawar * Closed loop SATD Lambda 1172*c83a76b0SSuyog Pawar * This is multiplied with bits for RD cost computations in SATD mode 1173*c83a76b0SSuyog Pawar * This is represented in q format with shift of LAMBDA_Q_SHIFT 1174*c83a76b0SSuyog Pawar */ 1175*c83a76b0SSuyog Pawar WORD32 i4_cl_satd_lambda_qf; 1176*c83a76b0SSuyog Pawar 1177*c83a76b0SSuyog Pawar WORD32 i4_cl_satd_type2_lambda_qf; 1178*c83a76b0SSuyog Pawar 1179*c83a76b0SSuyog Pawar /** 1180*c83a76b0SSuyog Pawar * Open loop SATD Lambda 1181*c83a76b0SSuyog Pawar * This is multiplied with bits for RD cost computations in SATD mode 1182*c83a76b0SSuyog Pawar * This is represented in q format with shift of LAMBDA_Q_SHIFT 1183*c83a76b0SSuyog Pawar */ 1184*c83a76b0SSuyog Pawar WORD32 i4_ol_satd_lambda_qf; 1185*c83a76b0SSuyog Pawar 1186*c83a76b0SSuyog Pawar WORD32 i4_ol_satd_type2_lambda_qf; 1187*c83a76b0SSuyog Pawar 1188*c83a76b0SSuyog Pawar double lambda_modifier; 1189*c83a76b0SSuyog Pawar 1190*c83a76b0SSuyog Pawar double lambda_uv_modifier; 1191*c83a76b0SSuyog Pawar 1192*c83a76b0SSuyog Pawar UWORD32 u4_chroma_cost_weighing_factor; 1193*c83a76b0SSuyog Pawar 1194*c83a76b0SSuyog Pawar } frm_lambda_ctxt_t; 1195*c83a76b0SSuyog Pawar /** 1196*c83a76b0SSuyog Pawar ****************************************************************************** 1197*c83a76b0SSuyog Pawar * @brief Mode attributes for 4x4 block populated by early decision 1198*c83a76b0SSuyog Pawar ****************************************************************************** 1199*c83a76b0SSuyog Pawar */ 1200*c83a76b0SSuyog Pawar typedef struct 1201*c83a76b0SSuyog Pawar { 1202*c83a76b0SSuyog Pawar /* If best mode is present or not */ 1203*c83a76b0SSuyog Pawar UWORD8 mode_present; 1204*c83a76b0SSuyog Pawar 1205*c83a76b0SSuyog Pawar /** Best mode for the current 4x4 prediction block */ 1206*c83a76b0SSuyog Pawar UWORD8 best_mode; 1207*c83a76b0SSuyog Pawar 1208*c83a76b0SSuyog Pawar /** sad for the best mode for the current 4x4 prediction block */ 1209*c83a76b0SSuyog Pawar UWORD16 sad; 1210*c83a76b0SSuyog Pawar 1211*c83a76b0SSuyog Pawar /** cost for the best mode for the current 4x4 prediction block */ 1212*c83a76b0SSuyog Pawar UWORD16 sad_cost; 1213*c83a76b0SSuyog Pawar 1214*c83a76b0SSuyog Pawar } ihevce_ed_mode_attr_t; //early decision 1215*c83a76b0SSuyog Pawar 1216*c83a76b0SSuyog Pawar /** 1217*c83a76b0SSuyog Pawar ****************************************************************************** 1218*c83a76b0SSuyog Pawar * @brief Structure at 4x4 block level which has parameters about early 1219*c83a76b0SSuyog Pawar * intra or inter decision 1220*c83a76b0SSuyog Pawar ****************************************************************************** 1221*c83a76b0SSuyog Pawar */ 1222*c83a76b0SSuyog Pawar typedef struct 1223*c83a76b0SSuyog Pawar { 1224*c83a76b0SSuyog Pawar /** 1225*c83a76b0SSuyog Pawar * Final parameter of Intra-Inter early decision for the current 4x4. 1226*c83a76b0SSuyog Pawar * 0 - invalid decision 1227*c83a76b0SSuyog Pawar * 1 - eval intra only 1228*c83a76b0SSuyog Pawar * 2 - eval inter only 1229*c83a76b0SSuyog Pawar * 3 - eval both intra and inter 1230*c83a76b0SSuyog Pawar */ 1231*c83a76b0SSuyog Pawar UWORD8 intra_or_inter; 1232*c83a76b0SSuyog Pawar 1233*c83a76b0SSuyog Pawar UWORD8 merge_success; 1234*c83a76b0SSuyog Pawar 1235*c83a76b0SSuyog Pawar /** Best mode for the current 4x4 prediction block */ 1236*c83a76b0SSuyog Pawar UWORD8 best_mode; 1237*c83a76b0SSuyog Pawar 1238*c83a76b0SSuyog Pawar /** Best mode for the current 4x4 prediction block */ 1239*c83a76b0SSuyog Pawar UWORD8 best_merge_mode; 1240*c83a76b0SSuyog Pawar 1241*c83a76b0SSuyog Pawar /** Store SATD at 4*4 level for current layer (L1) */ 1242*c83a76b0SSuyog Pawar WORD32 i4_4x4_satd; 1243*c83a76b0SSuyog Pawar 1244*c83a76b0SSuyog Pawar } ihevce_ed_blk_t; //early decision 1245*c83a76b0SSuyog Pawar 1246*c83a76b0SSuyog Pawar /* l1 ipe ctb analyze structure */ 1247*c83a76b0SSuyog Pawar /* Contains cu level qp mod related information for all possible cu 1248*c83a76b0SSuyog Pawar sizes (16,32,64 in L0) in a CTB*/ 1249*c83a76b0SSuyog Pawar typedef struct 1250*c83a76b0SSuyog Pawar { 1251*c83a76b0SSuyog Pawar WORD32 i4_sum_4x4_satd[16]; 1252*c83a76b0SSuyog Pawar WORD32 i4_min_4x4_satd[16]; 1253*c83a76b0SSuyog Pawar 1254*c83a76b0SSuyog Pawar /* satd for L1_8x8 blocks in L1_32x32 1255*c83a76b0SSuyog Pawar * [16] : num L1_8x8 in L1_32x32 1256*c83a76b0SSuyog Pawar * [2] : 0 - sum of L1_4x4 @ L1_8x8 1257*c83a76b0SSuyog Pawar * - equivalent to transform size of 16x16 @ L0 1258*c83a76b0SSuyog Pawar * 1 - min/median of L1_4x4 @ L1_8x8 1259*c83a76b0SSuyog Pawar * - equivalent to transform size of 8x8 @ L0 1260*c83a76b0SSuyog Pawar */ 1261*c83a76b0SSuyog Pawar WORD32 i4_8x8_satd[16][2]; 1262*c83a76b0SSuyog Pawar 1263*c83a76b0SSuyog Pawar /* satd for L1_16x16 blocks in L1_32x32 1264*c83a76b0SSuyog Pawar * [4] : num L1_16x16 in L1_32x32 1265*c83a76b0SSuyog Pawar * [3] : 0 - sum of (sum of L1_4x4 @ L1_8x8) @ L1_16x16 1266*c83a76b0SSuyog Pawar * - equivalent to transform size of 32x32 @ L0 1267*c83a76b0SSuyog Pawar * 1 - min/median of (sum of L1_4x4 @ L1_8x8) @ L1_16x16 1268*c83a76b0SSuyog Pawar * - equivalent to transform size of 16x16 @ L0 1269*c83a76b0SSuyog Pawar * 2 - min/median of (min/median of L1_4x4 @ L1_8x8) @ L1_16x16 1270*c83a76b0SSuyog Pawar * - equivalent to transform size of 8x8 @ L0 1271*c83a76b0SSuyog Pawar */ 1272*c83a76b0SSuyog Pawar WORD32 i4_16x16_satd[4][3]; 1273*c83a76b0SSuyog Pawar 1274*c83a76b0SSuyog Pawar /* Please note that i4_32x32_satd[0][3] contains sum of all 32x32 */ 1275*c83a76b0SSuyog Pawar /* satd for L1_32x32 blocks in L1_32x32 1276*c83a76b0SSuyog Pawar * [1] : num L1_32x32 in L1_32x32 1277*c83a76b0SSuyog Pawar * [4] : 0 - min/median of (sum of (sum of L1_4x4 @ L1_8x8) @ L1_16x16) @ L1_32x32 1278*c83a76b0SSuyog Pawar * - equivalent to transform size of 32x32 @ L0 1279*c83a76b0SSuyog Pawar * 1 - min/median of (sum of L1_4x4 @ L1_8x8) @ L1_32x32 1280*c83a76b0SSuyog Pawar * - equivalent to transform size of 16x16 @ L0 1281*c83a76b0SSuyog Pawar * 2 - min/median of (min/median of L1_4x4 @ L1_8x8) @ L1_32x32 1282*c83a76b0SSuyog Pawar * - equivalent to transform size of 8x8 @ L0 1283*c83a76b0SSuyog Pawar * 3 - sum of (sum of (sum of L1_4x4 @ L1_8x8) @ L1_16x16) @ L1_32x32 1284*c83a76b0SSuyog Pawar */ 1285*c83a76b0SSuyog Pawar WORD32 i4_32x32_satd[1][4]; 1286*c83a76b0SSuyog Pawar 1287*c83a76b0SSuyog Pawar /*Store SATD at 8x8 level for current layer (L1)*/ 1288*c83a76b0SSuyog Pawar WORD32 i4_best_satd_8x8[16]; 1289*c83a76b0SSuyog Pawar 1290*c83a76b0SSuyog Pawar /* EIID: This will be used for early inter intra decisions */ 1291*c83a76b0SSuyog Pawar /*SAD at 8x8 level for current layer (l1) */ 1292*c83a76b0SSuyog Pawar /*Cost based on sad at 8x8 level for current layer (l1) */ 1293*c83a76b0SSuyog Pawar WORD32 i4_best_sad_cost_8x8_l1_ipe[16]; 1294*c83a76b0SSuyog Pawar 1295*c83a76b0SSuyog Pawar WORD32 i4_best_sad_8x8_l1_ipe[16]; 1296*c83a76b0SSuyog Pawar /* SAD at 8x8 level for ME. All other cost are IPE cost */ 1297*c83a76b0SSuyog Pawar WORD32 i4_best_sad_cost_8x8_l1_me[16]; 1298*c83a76b0SSuyog Pawar 1299*c83a76b0SSuyog Pawar /* SAD at 8x8 level for ME. for given reference */ 1300*c83a76b0SSuyog Pawar WORD32 i4_sad_cost_me_for_ref[16]; 1301*c83a76b0SSuyog Pawar 1302*c83a76b0SSuyog Pawar /* SAD at 8x8 level for ME. for given reference */ 1303*c83a76b0SSuyog Pawar WORD32 i4_sad_me_for_ref[16]; 1304*c83a76b0SSuyog Pawar 1305*c83a76b0SSuyog Pawar /* SAD at 8x8 level for ME. All other cost are IPE cost */ 1306*c83a76b0SSuyog Pawar WORD32 i4_best_sad_8x8_l1_me[16]; 1307*c83a76b0SSuyog Pawar 1308*c83a76b0SSuyog Pawar WORD32 i4_best_sad_8x8_l1_me_for_decide[16]; 1309*c83a76b0SSuyog Pawar 1310*c83a76b0SSuyog Pawar /*Mean @ L0 16x16*/ 1311*c83a76b0SSuyog Pawar WORD32 ai4_16x16_mean[16]; 1312*c83a76b0SSuyog Pawar 1313*c83a76b0SSuyog Pawar /*Mean @ L0 32x32*/ 1314*c83a76b0SSuyog Pawar WORD32 ai4_32x32_mean[4]; 1315*c83a76b0SSuyog Pawar 1316*c83a76b0SSuyog Pawar /*Mean @ L0 64x64*/ 1317*c83a76b0SSuyog Pawar WORD32 i4_64x64_mean; 1318*c83a76b0SSuyog Pawar 1319*c83a76b0SSuyog Pawar } ihevce_ed_ctb_l1_t; //early decision 1320*c83a76b0SSuyog Pawar 1321*c83a76b0SSuyog Pawar /** 1322*c83a76b0SSuyog Pawar ****************************************************************************** 1323*c83a76b0SSuyog Pawar * @brief 8x8 Intra analyze structure 1324*c83a76b0SSuyog Pawar ****************************************************************************** 1325*c83a76b0SSuyog Pawar */ 1326*c83a76b0SSuyog Pawar typedef struct 1327*c83a76b0SSuyog Pawar { 1328*c83a76b0SSuyog Pawar /** Best intra modes for 8x8 transform. 1329*c83a76b0SSuyog Pawar * Insert 255 in the end to limit number of modes 1330*c83a76b0SSuyog Pawar */ 1331*c83a76b0SSuyog Pawar UWORD8 au1_best_modes_8x8_tu[MAX_INTRA_CU_CANDIDATES + 1]; 1332*c83a76b0SSuyog Pawar 1333*c83a76b0SSuyog Pawar /** Best 8x8 intra modes for 4x4 transform 1334*c83a76b0SSuyog Pawar * Insert 255 in the end to limit number of modes 1335*c83a76b0SSuyog Pawar */ 1336*c83a76b0SSuyog Pawar UWORD8 au1_best_modes_4x4_tu[MAX_INTRA_CU_CANDIDATES + 1]; 1337*c83a76b0SSuyog Pawar 1338*c83a76b0SSuyog Pawar /** Best 4x4 intra modes 1339*c83a76b0SSuyog Pawar * Insert 255 in the end to limit number of modes 1340*c83a76b0SSuyog Pawar */ 1341*c83a76b0SSuyog Pawar UWORD8 au1_4x4_best_modes[4][MAX_INTRA_CU_CANDIDATES + 1]; 1342*c83a76b0SSuyog Pawar 1343*c83a76b0SSuyog Pawar /** flag to indicate if nxn pu mode (different pu at 4x4 level) is enabled */ 1344*c83a76b0SSuyog Pawar UWORD8 b1_enable_nxn : 1; 1345*c83a76b0SSuyog Pawar 1346*c83a76b0SSuyog Pawar /** valid cu flag : required for incomplete ctbs at frame boundaries */ 1347*c83a76b0SSuyog Pawar UWORD8 b1_valid_cu : 1; 1348*c83a76b0SSuyog Pawar 1349*c83a76b0SSuyog Pawar /** dummy bits */ 1350*c83a76b0SSuyog Pawar UWORD8 b6_reserved : 6; 1351*c83a76b0SSuyog Pawar 1352*c83a76b0SSuyog Pawar } intra8_analyse_t; 1353*c83a76b0SSuyog Pawar 1354*c83a76b0SSuyog Pawar /** 1355*c83a76b0SSuyog Pawar ****************************************************************************** 1356*c83a76b0SSuyog Pawar * @brief 16x16 Intra analyze structure 1357*c83a76b0SSuyog Pawar ****************************************************************************** 1358*c83a76b0SSuyog Pawar */ 1359*c83a76b0SSuyog Pawar typedef struct 1360*c83a76b0SSuyog Pawar { 1361*c83a76b0SSuyog Pawar /** Best intra modes for 16x16 transform. 1362*c83a76b0SSuyog Pawar * Insert 255 in the end to limit number of modes 1363*c83a76b0SSuyog Pawar */ 1364*c83a76b0SSuyog Pawar UWORD8 au1_best_modes_16x16_tu[MAX_INTRA_CU_CANDIDATES + 1]; 1365*c83a76b0SSuyog Pawar 1366*c83a76b0SSuyog Pawar /** Best 16x16 intra modes for 8x8 transform 1367*c83a76b0SSuyog Pawar * Insert 255 in the end to limit number of modes 1368*c83a76b0SSuyog Pawar */ 1369*c83a76b0SSuyog Pawar UWORD8 au1_best_modes_8x8_tu[MAX_INTRA_CU_CANDIDATES + 1]; 1370*c83a76b0SSuyog Pawar 1371*c83a76b0SSuyog Pawar /** 8x8 children intra analyze for this 16x16 */ 1372*c83a76b0SSuyog Pawar intra8_analyse_t as_intra8_analyse[4]; 1373*c83a76b0SSuyog Pawar 1374*c83a76b0SSuyog Pawar /* indicates if 16x16 is best cu or 8x8 cu */ 1375*c83a76b0SSuyog Pawar UWORD8 b1_split_flag : 1; 1376*c83a76b0SSuyog Pawar 1377*c83a76b0SSuyog Pawar /* indicates if 8x8 vs 16x16 rdo evaluation needed */ 1378*c83a76b0SSuyog Pawar /* or only 8x8's rdo evaluation needed */ 1379*c83a76b0SSuyog Pawar UWORD8 b1_merge_flag : 1; 1380*c83a76b0SSuyog Pawar 1381*c83a76b0SSuyog Pawar /** 1382*c83a76b0SSuyog Pawar * valid cu flag : required for incomplete ctbs at frame boundaries 1383*c83a76b0SSuyog Pawar * or if CTB size is lower than 32 1384*c83a76b0SSuyog Pawar */ 1385*c83a76b0SSuyog Pawar UWORD8 b1_valid_cu : 1; 1386*c83a76b0SSuyog Pawar 1387*c83a76b0SSuyog Pawar /** dummy bits */ 1388*c83a76b0SSuyog Pawar UWORD8 b6_reserved : 5; 1389*c83a76b0SSuyog Pawar 1390*c83a76b0SSuyog Pawar } intra16_analyse_t; 1391*c83a76b0SSuyog Pawar 1392*c83a76b0SSuyog Pawar /** 1393*c83a76b0SSuyog Pawar ****************************************************************************** 1394*c83a76b0SSuyog Pawar * @brief 32x32 Intra analyze structure 1395*c83a76b0SSuyog Pawar ****************************************************************************** 1396*c83a76b0SSuyog Pawar */ 1397*c83a76b0SSuyog Pawar typedef struct 1398*c83a76b0SSuyog Pawar { 1399*c83a76b0SSuyog Pawar /** Best intra modes for 32x32 transform. 1400*c83a76b0SSuyog Pawar * Insert 255 in the end to limit number of modes 1401*c83a76b0SSuyog Pawar */ 1402*c83a76b0SSuyog Pawar UWORD8 au1_best_modes_32x32_tu[MAX_INTRA_CU_CANDIDATES + 1]; 1403*c83a76b0SSuyog Pawar 1404*c83a76b0SSuyog Pawar /** Best 32x32 intra modes for 16x16 transform 1405*c83a76b0SSuyog Pawar * Insert 255 in the end to limit number of modes 1406*c83a76b0SSuyog Pawar */ 1407*c83a76b0SSuyog Pawar UWORD8 au1_best_modes_16x16_tu[MAX_INTRA_CU_CANDIDATES + 1]; 1408*c83a76b0SSuyog Pawar 1409*c83a76b0SSuyog Pawar /** 16x16 children intra analyze for this 32x32 */ 1410*c83a76b0SSuyog Pawar intra16_analyse_t as_intra16_analyse[4]; 1411*c83a76b0SSuyog Pawar 1412*c83a76b0SSuyog Pawar /* indicates if 32x32 is best cu or 16x16 cu */ 1413*c83a76b0SSuyog Pawar UWORD8 b1_split_flag : 1; 1414*c83a76b0SSuyog Pawar 1415*c83a76b0SSuyog Pawar /* indicates if 32x32 vs 16x16 rdo evaluation needed */ 1416*c83a76b0SSuyog Pawar /* or 16x16 vs 8x8 evaluation is needed */ 1417*c83a76b0SSuyog Pawar UWORD8 b1_merge_flag : 1; 1418*c83a76b0SSuyog Pawar 1419*c83a76b0SSuyog Pawar /** 1420*c83a76b0SSuyog Pawar * valid cu flag : required for incomplete ctbs at frame boundaries 1421*c83a76b0SSuyog Pawar * or if CTB size is lower than 64 1422*c83a76b0SSuyog Pawar */ 1423*c83a76b0SSuyog Pawar UWORD8 b1_valid_cu : 1; 1424*c83a76b0SSuyog Pawar 1425*c83a76b0SSuyog Pawar /** dummy bits */ 1426*c83a76b0SSuyog Pawar UWORD8 b6_reserved : 5; 1427*c83a76b0SSuyog Pawar 1428*c83a76b0SSuyog Pawar } intra32_analyse_t; 1429*c83a76b0SSuyog Pawar 1430*c83a76b0SSuyog Pawar /** 1431*c83a76b0SSuyog Pawar ****************************************************************************** 1432*c83a76b0SSuyog Pawar * @brief IPE L0 analyze structure for L0 ME to do intra/inter CU decisions 1433*c83a76b0SSuyog Pawar * This is a CTB level structure encapsulating IPE modes, cost at all 1434*c83a76b0SSuyog Pawar * level. IPE also recommemds max intra CU sizes which is required 1435*c83a76b0SSuyog Pawar * by ME for CU size determination in intra dominant CTB 1436*c83a76b0SSuyog Pawar ****************************************************************************** 1437*c83a76b0SSuyog Pawar */ 1438*c83a76b0SSuyog Pawar typedef struct 1439*c83a76b0SSuyog Pawar { 1440*c83a76b0SSuyog Pawar /** Best 64x64 intra modes for 32x32 transform. 1441*c83a76b0SSuyog Pawar * Insert 255 in the end to limit number of modes 1442*c83a76b0SSuyog Pawar */ 1443*c83a76b0SSuyog Pawar UWORD8 au1_best_modes_32x32_tu[MAX_INTRA_CU_CANDIDATES + 1]; 1444*c83a76b0SSuyog Pawar 1445*c83a76b0SSuyog Pawar /** 32x32 children intra analyze for this 32x32 */ 1446*c83a76b0SSuyog Pawar intra32_analyse_t as_intra32_analyse[4]; 1447*c83a76b0SSuyog Pawar 1448*c83a76b0SSuyog Pawar /* indicates if 64x64 is best CUs or 32x32 CUs */ 1449*c83a76b0SSuyog Pawar UWORD8 u1_split_flag; 1450*c83a76b0SSuyog Pawar 1451*c83a76b0SSuyog Pawar /* CTB level best 8x8 intra costs */ 1452*c83a76b0SSuyog Pawar WORD32 ai4_best8x8_intra_cost[MAX_CU_IN_CTB]; 1453*c83a76b0SSuyog Pawar 1454*c83a76b0SSuyog Pawar /* CTB level best 16x16 intra costs */ 1455*c83a76b0SSuyog Pawar WORD32 ai4_best16x16_intra_cost[MAX_CU_IN_CTB >> 2]; 1456*c83a76b0SSuyog Pawar 1457*c83a76b0SSuyog Pawar /* CTB level best 32x32 intra costs */ 1458*c83a76b0SSuyog Pawar WORD32 ai4_best32x32_intra_cost[MAX_CU_IN_CTB >> 4]; 1459*c83a76b0SSuyog Pawar 1460*c83a76b0SSuyog Pawar /* best 64x64 intra cost */ 1461*c83a76b0SSuyog Pawar WORD32 i4_best64x64_intra_cost; 1462*c83a76b0SSuyog Pawar 1463*c83a76b0SSuyog Pawar /* 1464*c83a76b0SSuyog Pawar @L0 level 1465*c83a76b0SSuyog Pawar 4 => 0 - 32x32 TU in 64x64 CU 1466*c83a76b0SSuyog Pawar 1 - 16x16 TU in 64x64 CU 1467*c83a76b0SSuyog Pawar 2 - 8x8 TU in 64x64 CU 1468*c83a76b0SSuyog Pawar 3 - 64x64 CU 1469*c83a76b0SSuyog Pawar 2 => Intra/Inter */ 1470*c83a76b0SSuyog Pawar WORD32 i4_64x64_act_factor[4][2]; 1471*c83a76b0SSuyog Pawar 1472*c83a76b0SSuyog Pawar /* 1473*c83a76b0SSuyog Pawar @L0 level 1474*c83a76b0SSuyog Pawar 4 => num 32x32 in CTB 1475*c83a76b0SSuyog Pawar 3 => 0 - 32x32 TU in 64x64 CU 1476*c83a76b0SSuyog Pawar 1 - 16x16 TU in 64x64 CU 1477*c83a76b0SSuyog Pawar 2 - 8x8 TU in 64x64 CU 1478*c83a76b0SSuyog Pawar 2 => Intra/Inter */ 1479*c83a76b0SSuyog Pawar WORD32 i4_32x32_act_factor[4][3][2]; 1480*c83a76b0SSuyog Pawar 1481*c83a76b0SSuyog Pawar /* 1482*c83a76b0SSuyog Pawar @L0 level 1483*c83a76b0SSuyog Pawar 16 => num 16x16 in CTB 1484*c83a76b0SSuyog Pawar 2 => 0 - 16x16 TU in 64x64 CU 1485*c83a76b0SSuyog Pawar 1 - 8x8 TU in 64x64 CU 1486*c83a76b0SSuyog Pawar 2 => Intra/Inter */ 1487*c83a76b0SSuyog Pawar WORD32 i4_16x16_act_factor[16][2][2]; 1488*c83a76b0SSuyog Pawar 1489*c83a76b0SSuyog Pawar WORD32 nodes_created_in_cu_tree; 1490*c83a76b0SSuyog Pawar 1491*c83a76b0SSuyog Pawar cur_ctb_cu_tree_t *ps_cu_tree_root; 1492*c83a76b0SSuyog Pawar 1493*c83a76b0SSuyog Pawar WORD32 ai4_8x8_act_factor[16]; 1494*c83a76b0SSuyog Pawar WORD32 ai4_best_sad_8x8_l1_me[MAX_CU_IN_CTB]; 1495*c83a76b0SSuyog Pawar WORD32 ai4_best_sad_8x8_l1_ipe[MAX_CU_IN_CTB]; 1496*c83a76b0SSuyog Pawar WORD32 ai4_best_sad_cost_8x8_l1_me[MAX_CU_IN_CTB]; 1497*c83a76b0SSuyog Pawar WORD32 ai4_best_sad_cost_8x8_l1_ipe[MAX_CU_IN_CTB]; 1498*c83a76b0SSuyog Pawar 1499*c83a76b0SSuyog Pawar /*Ctb level accumalated satd*/ 1500*c83a76b0SSuyog Pawar WORD32 i4_ctb_acc_satd; 1501*c83a76b0SSuyog Pawar 1502*c83a76b0SSuyog Pawar /*Ctb level accumalated mpm bits*/ 1503*c83a76b0SSuyog Pawar WORD32 i4_ctb_acc_mpm_bits; 1504*c83a76b0SSuyog Pawar 1505*c83a76b0SSuyog Pawar } ipe_l0_ctb_analyse_for_me_t; 1506*c83a76b0SSuyog Pawar 1507*c83a76b0SSuyog Pawar typedef struct 1508*c83a76b0SSuyog Pawar { 1509*c83a76b0SSuyog Pawar WORD16 i2_mv_x; 1510*c83a76b0SSuyog Pawar WORD16 i2_mv_y; 1511*c83a76b0SSuyog Pawar } global_mv_t; 1512*c83a76b0SSuyog Pawar 1513*c83a76b0SSuyog Pawar /** 1514*c83a76b0SSuyog Pawar ****************************************************************************** 1515*c83a76b0SSuyog Pawar * @brief Pre Encode pass and ME pass shared variables and buffers 1516*c83a76b0SSuyog Pawar ****************************************************************************** 1517*c83a76b0SSuyog Pawar */ 1518*c83a76b0SSuyog Pawar typedef struct 1519*c83a76b0SSuyog Pawar { 1520*c83a76b0SSuyog Pawar /** 1521*c83a76b0SSuyog Pawar * Buffer id 1522*c83a76b0SSuyog Pawar */ 1523*c83a76b0SSuyog Pawar WORD32 i4_buf_id; 1524*c83a76b0SSuyog Pawar 1525*c83a76b0SSuyog Pawar /** 1526*c83a76b0SSuyog Pawar * Flag will be set to 1 by frame processing thread after receiving flush 1527*c83a76b0SSuyog Pawar * command from application 1528*c83a76b0SSuyog Pawar */ 1529*c83a76b0SSuyog Pawar WORD32 i4_end_flag; 1530*c83a76b0SSuyog Pawar 1531*c83a76b0SSuyog Pawar /** frame leve ctb analyse buffer pointer */ 1532*c83a76b0SSuyog Pawar ctb_analyse_t *ps_ctb_analyse; 1533*c83a76b0SSuyog Pawar 1534*c83a76b0SSuyog Pawar /** frame level cu analyse buffer pointer for IPE */ 1535*c83a76b0SSuyog Pawar //cu_analyse_t *ps_cu_analyse; 1536*c83a76b0SSuyog Pawar 1537*c83a76b0SSuyog Pawar /** current input pointer */ 1538*c83a76b0SSuyog Pawar ihevce_lap_enc_buf_t *ps_curr_inp; 1539*c83a76b0SSuyog Pawar 1540*c83a76b0SSuyog Pawar /** current inp buffer id */ 1541*c83a76b0SSuyog Pawar WORD32 curr_inp_buf_id; 1542*c83a76b0SSuyog Pawar 1543*c83a76b0SSuyog Pawar /** Slice header parameters */ 1544*c83a76b0SSuyog Pawar slice_header_t s_slice_hdr; 1545*c83a76b0SSuyog Pawar 1546*c83a76b0SSuyog Pawar /** sps parameters activated by current slice */ 1547*c83a76b0SSuyog Pawar sps_t *ps_sps; 1548*c83a76b0SSuyog Pawar 1549*c83a76b0SSuyog Pawar /** pps parameters activated by current slice */ 1550*c83a76b0SSuyog Pawar pps_t *ps_pps; 1551*c83a76b0SSuyog Pawar 1552*c83a76b0SSuyog Pawar /** vps parameters activated by current slice */ 1553*c83a76b0SSuyog Pawar vps_t *ps_vps; 1554*c83a76b0SSuyog Pawar /** Pointer to Penultilate Layer context memory internally has MV bank buff and related params */ 1555*c83a76b0SSuyog Pawar void *pv_me_lyr_ctxt; 1556*c83a76b0SSuyog Pawar 1557*c83a76b0SSuyog Pawar /** Pointer to Penultilate Layer NV bank context memory */ 1558*c83a76b0SSuyog Pawar void *pv_me_lyr_bnk_ctxt; 1559*c83a76b0SSuyog Pawar 1560*c83a76b0SSuyog Pawar /** Pointer to Penultilate Layer MV bank buff */ 1561*c83a76b0SSuyog Pawar void *pv_me_mv_bank; 1562*c83a76b0SSuyog Pawar 1563*c83a76b0SSuyog Pawar /** Pointer to Penultilate Layer reference idx buffer */ 1564*c83a76b0SSuyog Pawar void *pv_me_ref_idx; 1565*c83a76b0SSuyog Pawar /** 1566*c83a76b0SSuyog Pawar * Array to store 8x8 cost (partial 8x8 sad + level adjusted cost) 1567*c83a76b0SSuyog Pawar * The order of storing is raster scan order within CTB and 1568*c83a76b0SSuyog Pawar * CTB order is raster scan within frame. 1569*c83a76b0SSuyog Pawar */ 1570*c83a76b0SSuyog Pawar double *plf_intra_8x8_cost; 1571*c83a76b0SSuyog Pawar 1572*c83a76b0SSuyog Pawar /** 1573*c83a76b0SSuyog Pawar * L0 layer ctb anaylse frame level buffer. 1574*c83a76b0SSuyog Pawar * IPE wil populate the cost and best modes at all levels in this buffer 1575*c83a76b0SSuyog Pawar * for every CTB in a frame 1576*c83a76b0SSuyog Pawar */ 1577*c83a76b0SSuyog Pawar // moved to shorter buffer queue 1578*c83a76b0SSuyog Pawar //ipe_l0_ctb_analyse_for_me_t *ps_ipe_analyse_ctb; 1579*c83a76b0SSuyog Pawar 1580*c83a76b0SSuyog Pawar /** Layer L1 buffer pointer */ 1581*c83a76b0SSuyog Pawar ihevce_ed_blk_t *ps_layer1_buf; 1582*c83a76b0SSuyog Pawar 1583*c83a76b0SSuyog Pawar /** Layer L2 buffer pointer */ 1584*c83a76b0SSuyog Pawar ihevce_ed_blk_t *ps_layer2_buf; 1585*c83a76b0SSuyog Pawar 1586*c83a76b0SSuyog Pawar /*ME reverse map info*/ 1587*c83a76b0SSuyog Pawar UWORD8 *pu1_me_reverse_map_info; 1588*c83a76b0SSuyog Pawar 1589*c83a76b0SSuyog Pawar /** Buffer pointer for CTB level information in pre intra pass*/ 1590*c83a76b0SSuyog Pawar ihevce_ed_ctb_l1_t *ps_ed_ctb_l1; 1591*c83a76b0SSuyog Pawar 1592*c83a76b0SSuyog Pawar #ifndef DISABLE_SEI 1593*c83a76b0SSuyog Pawar /** vps parameters activated by current slice */ 1594*c83a76b0SSuyog Pawar sei_params_t s_sei; 1595*c83a76b0SSuyog Pawar #endif 1596*c83a76b0SSuyog Pawar 1597*c83a76b0SSuyog Pawar /** nal_type for the slice to be encoded */ 1598*c83a76b0SSuyog Pawar WORD32 i4_slice_nal_type; 1599*c83a76b0SSuyog Pawar 1600*c83a76b0SSuyog Pawar /** input time stamp in terms of ticks: lower 32 */ 1601*c83a76b0SSuyog Pawar WORD32 i4_inp_timestamp_low; 1602*c83a76b0SSuyog Pawar 1603*c83a76b0SSuyog Pawar /** input time stamp in terms of ticks: higher 32 */ 1604*c83a76b0SSuyog Pawar WORD32 i4_inp_timestamp_high; 1605*c83a76b0SSuyog Pawar 1606*c83a76b0SSuyog Pawar /** input frame ctxt of app to be retured in output buffer */ 1607*c83a76b0SSuyog Pawar void *pv_app_frm_ctxt; 1608*c83a76b0SSuyog Pawar 1609*c83a76b0SSuyog Pawar /** current frm valid flag : 1610*c83a76b0SSuyog Pawar * will be 1 if valid input was processed by frame proc thrd 1611*c83a76b0SSuyog Pawar */ 1612*c83a76b0SSuyog Pawar WORD32 i4_frm_proc_valid_flag; 1613*c83a76b0SSuyog Pawar 1614*c83a76b0SSuyog Pawar /** 1615*c83a76b0SSuyog Pawar * Qp to be used for current frame 1616*c83a76b0SSuyog Pawar */ 1617*c83a76b0SSuyog Pawar WORD32 i4_curr_frm_qp; 1618*c83a76b0SSuyog Pawar 1619*c83a76b0SSuyog Pawar /** 1620*c83a76b0SSuyog Pawar * Frame level Lambda parameters 1621*c83a76b0SSuyog Pawar */ 1622*c83a76b0SSuyog Pawar frm_lambda_ctxt_t as_lambda_prms[IHEVCE_MAX_NUM_BITRATES]; 1623*c83a76b0SSuyog Pawar 1624*c83a76b0SSuyog Pawar /** Frame-levelSATDcost accumalator */ 1625*c83a76b0SSuyog Pawar LWORD64 i8_frame_acc_satd_cost; 1626*c83a76b0SSuyog Pawar 1627*c83a76b0SSuyog Pawar /** Frame - L1 coarse me cost accumulated */ 1628*c83a76b0SSuyog Pawar LWORD64 i8_acc_frame_coarse_me_cost; 1629*c83a76b0SSuyog Pawar /** Frame - L1 coarse me cost accumulated */ 1630*c83a76b0SSuyog Pawar //LWORD64 i8_acc_frame_coarse_me_cost_for_ref; 1631*c83a76b0SSuyog Pawar 1632*c83a76b0SSuyog Pawar /** Frame - L1 coarse me sad accumulated */ 1633*c83a76b0SSuyog Pawar LWORD64 i8_acc_frame_coarse_me_sad; 1634*c83a76b0SSuyog Pawar 1635*c83a76b0SSuyog Pawar /* Averge activity of 4x4 blocks from previous frame 1636*c83a76b0SSuyog Pawar * If L1, maps to 8*8 in L0 1637*c83a76b0SSuyog Pawar */ 1638*c83a76b0SSuyog Pawar WORD32 i4_curr_frame_4x4_avg_act; 1639*c83a76b0SSuyog Pawar 1640*c83a76b0SSuyog Pawar WORD32 ai4_mod_factor_derived_by_variance[2]; 1641*c83a76b0SSuyog Pawar 1642*c83a76b0SSuyog Pawar float f_strength; 1643*c83a76b0SSuyog Pawar 1644*c83a76b0SSuyog Pawar /* Averge activity of 8x8 blocks from previous frame 1645*c83a76b0SSuyog Pawar * If L1, maps to 16*16 in L0 1646*c83a76b0SSuyog Pawar */ 1647*c83a76b0SSuyog Pawar 1648*c83a76b0SSuyog Pawar long double ld_curr_frame_8x8_log_avg[2]; 1649*c83a76b0SSuyog Pawar 1650*c83a76b0SSuyog Pawar LWORD64 i8_curr_frame_8x8_avg_act[2]; 1651*c83a76b0SSuyog Pawar 1652*c83a76b0SSuyog Pawar LWORD64 i8_curr_frame_8x8_sum_act[2]; 1653*c83a76b0SSuyog Pawar 1654*c83a76b0SSuyog Pawar WORD32 i4_curr_frame_8x8_sum_act_for_strength[2]; 1655*c83a76b0SSuyog Pawar 1656*c83a76b0SSuyog Pawar ULWORD64 u8_curr_frame_8x8_sum_act_sqr; 1657*c83a76b0SSuyog Pawar 1658*c83a76b0SSuyog Pawar WORD32 i4_curr_frame_8x8_num_blks[2]; 1659*c83a76b0SSuyog Pawar 1660*c83a76b0SSuyog Pawar LWORD64 i8_acc_frame_8x8_sum_act[2]; 1661*c83a76b0SSuyog Pawar LWORD64 i8_acc_frame_8x8_sum_act_sqr; 1662*c83a76b0SSuyog Pawar WORD32 i4_acc_frame_8x8_num_blks[2]; 1663*c83a76b0SSuyog Pawar LWORD64 i8_acc_frame_8x8_sum_act_for_strength; 1664*c83a76b0SSuyog Pawar LWORD64 i8_curr_frame_8x8_sum_act_for_strength; 1665*c83a76b0SSuyog Pawar 1666*c83a76b0SSuyog Pawar /* Averge activity of 16x16 blocks from previous frame 1667*c83a76b0SSuyog Pawar * If L1, maps to 32*32 in L0 1668*c83a76b0SSuyog Pawar */ 1669*c83a76b0SSuyog Pawar 1670*c83a76b0SSuyog Pawar long double ld_curr_frame_16x16_log_avg[3]; 1671*c83a76b0SSuyog Pawar 1672*c83a76b0SSuyog Pawar LWORD64 i8_curr_frame_16x16_avg_act[3]; 1673*c83a76b0SSuyog Pawar 1674*c83a76b0SSuyog Pawar LWORD64 i8_curr_frame_16x16_sum_act[3]; 1675*c83a76b0SSuyog Pawar 1676*c83a76b0SSuyog Pawar WORD32 i4_curr_frame_16x16_num_blks[3]; 1677*c83a76b0SSuyog Pawar 1678*c83a76b0SSuyog Pawar LWORD64 i8_acc_frame_16x16_sum_act[3]; 1679*c83a76b0SSuyog Pawar WORD32 i4_acc_frame_16x16_num_blks[3]; 1680*c83a76b0SSuyog Pawar 1681*c83a76b0SSuyog Pawar /* Averge activity of 32x32 blocks from previous frame 1682*c83a76b0SSuyog Pawar * If L1, maps to 64*64 in L0 1683*c83a76b0SSuyog Pawar */ 1684*c83a76b0SSuyog Pawar 1685*c83a76b0SSuyog Pawar long double ld_curr_frame_32x32_log_avg[3]; 1686*c83a76b0SSuyog Pawar 1687*c83a76b0SSuyog Pawar LWORD64 i8_curr_frame_32x32_avg_act[3]; 1688*c83a76b0SSuyog Pawar 1689*c83a76b0SSuyog Pawar global_mv_t s_global_mv[MAX_NUM_REF]; 1690*c83a76b0SSuyog Pawar LWORD64 i8_curr_frame_32x32_sum_act[3]; 1691*c83a76b0SSuyog Pawar 1692*c83a76b0SSuyog Pawar WORD32 i4_curr_frame_32x32_num_blks[3]; 1693*c83a76b0SSuyog Pawar 1694*c83a76b0SSuyog Pawar LWORD64 i8_acc_frame_32x32_sum_act[3]; 1695*c83a76b0SSuyog Pawar WORD32 i4_acc_frame_32x32_num_blks[3]; 1696*c83a76b0SSuyog Pawar 1697*c83a76b0SSuyog Pawar LWORD64 i8_acc_num_blks_high_sad; 1698*c83a76b0SSuyog Pawar 1699*c83a76b0SSuyog Pawar LWORD64 i8_total_blks; 1700*c83a76b0SSuyog Pawar 1701*c83a76b0SSuyog Pawar WORD32 i4_complexity_percentage; 1702*c83a76b0SSuyog Pawar 1703*c83a76b0SSuyog Pawar WORD32 i4_is_high_complex_region; 1704*c83a76b0SSuyog Pawar 1705*c83a76b0SSuyog Pawar WORD32 i4_avg_noise_thrshld_4x4; 1706*c83a76b0SSuyog Pawar 1707*c83a76b0SSuyog Pawar LWORD64 i8_curr_frame_mean_sum; 1708*c83a76b0SSuyog Pawar WORD32 i4_curr_frame_mean_num_blks; 1709*c83a76b0SSuyog Pawar LWORD64 i8_curr_frame_avg_mean_act; 1710*c83a76b0SSuyog Pawar 1711*c83a76b0SSuyog Pawar } pre_enc_me_ctxt_t; 1712*c83a76b0SSuyog Pawar 1713*c83a76b0SSuyog Pawar /** 1714*c83a76b0SSuyog Pawar ****************************************************************************** 1715*c83a76b0SSuyog Pawar * @brief buffers from L0 IPE to ME and enc loop 1716*c83a76b0SSuyog Pawar ****************************************************************************** 1717*c83a76b0SSuyog Pawar */ 1718*c83a76b0SSuyog Pawar typedef struct 1719*c83a76b0SSuyog Pawar { 1720*c83a76b0SSuyog Pawar WORD32 i4_size; 1721*c83a76b0SSuyog Pawar 1722*c83a76b0SSuyog Pawar ipe_l0_ctb_analyse_for_me_t *ps_ipe_analyse_ctb; 1723*c83a76b0SSuyog Pawar } pre_enc_L0_ipe_encloop_ctxt_t; 1724*c83a76b0SSuyog Pawar /** 1725*c83a76b0SSuyog Pawar ****************************************************************************** 1726*c83a76b0SSuyog Pawar * @brief Frame process and Entropy coding pass shared variables and buffers 1727*c83a76b0SSuyog Pawar ****************************************************************************** 1728*c83a76b0SSuyog Pawar */ 1729*c83a76b0SSuyog Pawar 1730*c83a76b0SSuyog Pawar typedef struct 1731*c83a76b0SSuyog Pawar { 1732*c83a76b0SSuyog Pawar /*PIC level Info*/ 1733*c83a76b0SSuyog Pawar ULWORD64 i8_total_cu; 1734*c83a76b0SSuyog Pawar ULWORD64 i8_total_cu_min_8x8; 1735*c83a76b0SSuyog Pawar ULWORD64 i8_total_pu; 1736*c83a76b0SSuyog Pawar ULWORD64 i8_total_intra_cu; 1737*c83a76b0SSuyog Pawar ULWORD64 i8_total_inter_cu; 1738*c83a76b0SSuyog Pawar ULWORD64 i8_total_skip_cu; 1739*c83a76b0SSuyog Pawar ULWORD64 i8_total_cu_based_on_size[4]; 1740*c83a76b0SSuyog Pawar 1741*c83a76b0SSuyog Pawar ULWORD64 i8_total_intra_pu; 1742*c83a76b0SSuyog Pawar ULWORD64 i8_total_merge_pu; 1743*c83a76b0SSuyog Pawar ULWORD64 i8_total_non_skipped_inter_pu; 1744*c83a76b0SSuyog Pawar 1745*c83a76b0SSuyog Pawar ULWORD64 i8_total_2nx2n_intra_pu[4]; 1746*c83a76b0SSuyog Pawar ULWORD64 i8_total_nxn_intra_pu; 1747*c83a76b0SSuyog Pawar ULWORD64 i8_total_2nx2n_inter_pu[4]; 1748*c83a76b0SSuyog Pawar ULWORD64 i8_total_smp_inter_pu[4]; 1749*c83a76b0SSuyog Pawar ULWORD64 i8_total_amp_inter_pu[3]; 1750*c83a76b0SSuyog Pawar ULWORD64 i8_total_nxn_inter_pu[3]; 1751*c83a76b0SSuyog Pawar 1752*c83a76b0SSuyog Pawar ULWORD64 i8_total_L0_mode; 1753*c83a76b0SSuyog Pawar ULWORD64 i8_total_L1_mode; 1754*c83a76b0SSuyog Pawar ULWORD64 i8_total_BI_mode; 1755*c83a76b0SSuyog Pawar 1756*c83a76b0SSuyog Pawar ULWORD64 i8_total_L0_ref_idx[MAX_DPB_SIZE]; 1757*c83a76b0SSuyog Pawar ULWORD64 i8_total_L1_ref_idx[MAX_DPB_SIZE]; 1758*c83a76b0SSuyog Pawar 1759*c83a76b0SSuyog Pawar ULWORD64 i8_total_tu; 1760*c83a76b0SSuyog Pawar ULWORD64 i8_total_non_coded_tu; 1761*c83a76b0SSuyog Pawar ULWORD64 i8_total_inter_coded_tu; 1762*c83a76b0SSuyog Pawar ULWORD64 i8_total_intra_coded_tu; 1763*c83a76b0SSuyog Pawar 1764*c83a76b0SSuyog Pawar ULWORD64 i8_total_tu_based_on_size[4]; 1765*c83a76b0SSuyog Pawar ULWORD64 i8_total_tu_cu64[4]; 1766*c83a76b0SSuyog Pawar ULWORD64 i8_total_tu_cu32[4]; 1767*c83a76b0SSuyog Pawar ULWORD64 i8_total_tu_cu16[3]; 1768*c83a76b0SSuyog Pawar ULWORD64 i8_total_tu_cu8[2]; 1769*c83a76b0SSuyog Pawar 1770*c83a76b0SSuyog Pawar LWORD64 i8_total_qp; 1771*c83a76b0SSuyog Pawar LWORD64 i8_total_qp_min_cu; 1772*c83a76b0SSuyog Pawar WORD32 i4_min_qp; 1773*c83a76b0SSuyog Pawar WORD32 i4_max_qp; 1774*c83a76b0SSuyog Pawar LWORD64 i8_sum_squared_frame_qp; 1775*c83a76b0SSuyog Pawar LWORD64 i8_total_frame_qp; 1776*c83a76b0SSuyog Pawar WORD32 i4_max_frame_qp; 1777*c83a76b0SSuyog Pawar float f_total_buffer_underflow; 1778*c83a76b0SSuyog Pawar float f_total_buffer_overflow; 1779*c83a76b0SSuyog Pawar float f_max_buffer_underflow; 1780*c83a76b0SSuyog Pawar float f_max_buffer_overflow; 1781*c83a76b0SSuyog Pawar 1782*c83a76b0SSuyog Pawar UWORD8 i1_num_ref_idx_l0_active; 1783*c83a76b0SSuyog Pawar UWORD8 i1_num_ref_idx_l1_active; 1784*c83a76b0SSuyog Pawar 1785*c83a76b0SSuyog Pawar WORD32 i4_ref_poc_l0[MAX_DPB_SIZE]; 1786*c83a76b0SSuyog Pawar WORD32 i4_ref_poc_l1[MAX_DPB_SIZE]; 1787*c83a76b0SSuyog Pawar 1788*c83a76b0SSuyog Pawar WORD8 i1_list_entry_l0[MAX_DPB_SIZE]; 1789*c83a76b0SSuyog Pawar DOUBLE i2_luma_weight_l0[MAX_DPB_SIZE]; 1790*c83a76b0SSuyog Pawar WORD16 i2_luma_offset_l0[MAX_DPB_SIZE]; 1791*c83a76b0SSuyog Pawar WORD8 i1_list_entry_l1[MAX_DPB_SIZE]; 1792*c83a76b0SSuyog Pawar DOUBLE i2_luma_weight_l1[MAX_DPB_SIZE]; 1793*c83a76b0SSuyog Pawar WORD16 i2_luma_offset_l1[MAX_DPB_SIZE]; 1794*c83a76b0SSuyog Pawar 1795*c83a76b0SSuyog Pawar ULWORD64 u8_bits_estimated_intra; 1796*c83a76b0SSuyog Pawar ULWORD64 u8_bits_estimated_inter; 1797*c83a76b0SSuyog Pawar ULWORD64 u8_bits_estimated_slice_header; 1798*c83a76b0SSuyog Pawar ULWORD64 u8_bits_estimated_sao; 1799*c83a76b0SSuyog Pawar ULWORD64 u8_bits_estimated_split_cu_flag; 1800*c83a76b0SSuyog Pawar ULWORD64 u8_bits_estimated_cu_hdr_bits; 1801*c83a76b0SSuyog Pawar ULWORD64 u8_bits_estimated_split_tu_flag; 1802*c83a76b0SSuyog Pawar ULWORD64 u8_bits_estimated_qp_delta_bits; 1803*c83a76b0SSuyog Pawar ULWORD64 u8_bits_estimated_cbf_luma_bits; 1804*c83a76b0SSuyog Pawar ULWORD64 u8_bits_estimated_cbf_chroma_bits; 1805*c83a76b0SSuyog Pawar 1806*c83a76b0SSuyog Pawar ULWORD64 u8_bits_estimated_res_luma_bits; 1807*c83a76b0SSuyog Pawar ULWORD64 u8_bits_estimated_res_chroma_bits; 1808*c83a76b0SSuyog Pawar 1809*c83a76b0SSuyog Pawar ULWORD64 u8_bits_estimated_ref_id; 1810*c83a76b0SSuyog Pawar ULWORD64 u8_bits_estimated_mvd; 1811*c83a76b0SSuyog Pawar ULWORD64 u8_bits_estimated_merge_flag; 1812*c83a76b0SSuyog Pawar ULWORD64 u8_bits_estimated_mpm_luma; 1813*c83a76b0SSuyog Pawar ULWORD64 u8_bits_estimated_mpm_chroma; 1814*c83a76b0SSuyog Pawar 1815*c83a76b0SSuyog Pawar ULWORD64 u8_total_bits_generated; 1816*c83a76b0SSuyog Pawar ULWORD64 u8_total_bits_vbv; 1817*c83a76b0SSuyog Pawar 1818*c83a76b0SSuyog Pawar ULWORD64 u8_total_I_bits_generated; 1819*c83a76b0SSuyog Pawar ULWORD64 u8_total_P_bits_generated; 1820*c83a76b0SSuyog Pawar ULWORD64 u8_total_B_bits_generated; 1821*c83a76b0SSuyog Pawar 1822*c83a76b0SSuyog Pawar UWORD32 u4_frame_sad; 1823*c83a76b0SSuyog Pawar UWORD32 u4_frame_intra_sad; 1824*c83a76b0SSuyog Pawar UWORD32 u4_frame_inter_sad; 1825*c83a76b0SSuyog Pawar 1826*c83a76b0SSuyog Pawar ULWORD64 i8_frame_cost; 1827*c83a76b0SSuyog Pawar ULWORD64 i8_frame_intra_cost; 1828*c83a76b0SSuyog Pawar ULWORD64 i8_frame_inter_cost; 1829*c83a76b0SSuyog Pawar } s_pic_level_acc_info_t; 1830*c83a76b0SSuyog Pawar 1831*c83a76b0SSuyog Pawar #ifndef DISABLE_SEI 1832*c83a76b0SSuyog Pawar typedef struct 1833*c83a76b0SSuyog Pawar { 1834*c83a76b0SSuyog Pawar UWORD32 u4_target_bit_rate_sei_entropy; 1835*c83a76b0SSuyog Pawar UWORD32 u4_buffer_size_sei_entropy; 1836*c83a76b0SSuyog Pawar UWORD32 u4_dbf_entropy; 1837*c83a76b0SSuyog Pawar 1838*c83a76b0SSuyog Pawar } s_pic_level_sei_info_t; 1839*c83a76b0SSuyog Pawar #endif 1840*c83a76b0SSuyog Pawar /** 1841*c83a76b0SSuyog Pawar ****************************************************************************** 1842*c83a76b0SSuyog Pawar * @brief ME pass and Main enocde pass shared variables and buffers 1843*c83a76b0SSuyog Pawar ****************************************************************************** 1844*c83a76b0SSuyog Pawar */ 1845*c83a76b0SSuyog Pawar typedef struct 1846*c83a76b0SSuyog Pawar { 1847*c83a76b0SSuyog Pawar /** 1848*c83a76b0SSuyog Pawar * Buffer id 1849*c83a76b0SSuyog Pawar */ 1850*c83a76b0SSuyog Pawar WORD32 i4_buf_id; 1851*c83a76b0SSuyog Pawar 1852*c83a76b0SSuyog Pawar /** 1853*c83a76b0SSuyog Pawar * Flag will be set to 1 by frame processing thread after receiving flush 1854*c83a76b0SSuyog Pawar * command from application 1855*c83a76b0SSuyog Pawar */ 1856*c83a76b0SSuyog Pawar WORD32 i4_end_flag; 1857*c83a76b0SSuyog Pawar 1858*c83a76b0SSuyog Pawar /** current input pointer */ 1859*c83a76b0SSuyog Pawar ihevce_lap_enc_buf_t *ps_curr_inp; 1860*c83a76b0SSuyog Pawar 1861*c83a76b0SSuyog Pawar /** current inp buffer id */ 1862*c83a76b0SSuyog Pawar WORD32 curr_inp_buf_id; 1863*c83a76b0SSuyog Pawar 1864*c83a76b0SSuyog Pawar /** current input buffers from ME */ 1865*c83a76b0SSuyog Pawar pre_enc_me_ctxt_t *ps_curr_inp_from_me_prms; 1866*c83a76b0SSuyog Pawar 1867*c83a76b0SSuyog Pawar /** current inp buffer id from ME */ 1868*c83a76b0SSuyog Pawar WORD32 curr_inp_from_me_buf_id; 1869*c83a76b0SSuyog Pawar 1870*c83a76b0SSuyog Pawar /** current input buffers from L0 IPE */ 1871*c83a76b0SSuyog Pawar pre_enc_L0_ipe_encloop_ctxt_t *ps_curr_inp_from_l0_ipe_prms; 1872*c83a76b0SSuyog Pawar 1873*c83a76b0SSuyog Pawar /** current inp buffer id from L0 IPE */ 1874*c83a76b0SSuyog Pawar WORD32 curr_inp_from_l0_ipe_buf_id; 1875*c83a76b0SSuyog Pawar 1876*c83a76b0SSuyog Pawar /** Slice header parameters */ 1877*c83a76b0SSuyog Pawar slice_header_t s_slice_hdr; 1878*c83a76b0SSuyog Pawar 1879*c83a76b0SSuyog Pawar /** current frm valid flag : 1880*c83a76b0SSuyog Pawar * will be 1 if valid input was processed by frame proc thrd 1881*c83a76b0SSuyog Pawar */ 1882*c83a76b0SSuyog Pawar WORD32 i4_frm_proc_valid_flag; 1883*c83a76b0SSuyog Pawar 1884*c83a76b0SSuyog Pawar /** 1885*c83a76b0SSuyog Pawar * Array of reference picture list for ping instance 1886*c83a76b0SSuyog Pawar * 2=> ref_pic_list0 and ref_pic_list1 1887*c83a76b0SSuyog Pawar */ 1888*c83a76b0SSuyog Pawar recon_pic_buf_t as_ref_list[IHEVCE_MAX_NUM_BITRATES][2][HEVCE_MAX_REF_PICS * 2]; 1889*c83a76b0SSuyog Pawar 1890*c83a76b0SSuyog Pawar /** 1891*c83a76b0SSuyog Pawar * Array of reference picture list 1892*c83a76b0SSuyog Pawar * 2=> ref_pic_list0 and ref_pic_list1 1893*c83a76b0SSuyog Pawar */ 1894*c83a76b0SSuyog Pawar recon_pic_buf_t *aps_ref_list[IHEVCE_MAX_NUM_BITRATES][2][HEVCE_MAX_REF_PICS * 2]; 1895*c83a76b0SSuyog Pawar 1896*c83a76b0SSuyog Pawar /** Job Queue Memory encode */ 1897*c83a76b0SSuyog Pawar job_queue_t *ps_job_q_enc; 1898*c83a76b0SSuyog Pawar 1899*c83a76b0SSuyog Pawar /** Array of Job Queue handles of enc group for ping and pong instance*/ 1900*c83a76b0SSuyog Pawar job_queue_handle_t as_job_que_enc_hdls[NUM_ENC_JOBS_QUES]; 1901*c83a76b0SSuyog Pawar 1902*c83a76b0SSuyog Pawar /** Array of Job Queue handles of enc group for re-encode*/ 1903*c83a76b0SSuyog Pawar job_queue_handle_t as_job_que_enc_hdls_reenc[NUM_ENC_JOBS_QUES]; 1904*c83a76b0SSuyog Pawar /** frame level me_ctb_data_t buffer pointer 1905*c83a76b0SSuyog Pawar */ 1906*c83a76b0SSuyog Pawar me_ctb_data_t *ps_cur_ctb_me_data; 1907*c83a76b0SSuyog Pawar 1908*c83a76b0SSuyog Pawar /** frame level cur_ctb_cu_tree_t buffer pointer for ME 1909*c83a76b0SSuyog Pawar */ 1910*c83a76b0SSuyog Pawar cur_ctb_cu_tree_t *ps_cur_ctb_cu_tree; 1911*c83a76b0SSuyog Pawar 1912*c83a76b0SSuyog Pawar /** Pointer to Dep. Mngr for CTBs processed in every row of a frame. 1913*c83a76b0SSuyog Pawar * ME is producer, EncLoop is the consumer 1914*c83a76b0SSuyog Pawar */ 1915*c83a76b0SSuyog Pawar void *pv_dep_mngr_encloop_dep_me; 1916*c83a76b0SSuyog Pawar 1917*c83a76b0SSuyog Pawar } me_enc_rdopt_ctxt_t; 1918*c83a76b0SSuyog Pawar 1919*c83a76b0SSuyog Pawar #ifndef DISABLE_SEI 1920*c83a76b0SSuyog Pawar typedef struct 1921*c83a76b0SSuyog Pawar { 1922*c83a76b0SSuyog Pawar UWORD32 u4_payload_type; 1923*c83a76b0SSuyog Pawar UWORD32 u4_payload_length; 1924*c83a76b0SSuyog Pawar UWORD8 *pu1_sei_payload; 1925*c83a76b0SSuyog Pawar } sei_payload_t; 1926*c83a76b0SSuyog Pawar #endif 1927*c83a76b0SSuyog Pawar 1928*c83a76b0SSuyog Pawar typedef struct 1929*c83a76b0SSuyog Pawar { 1930*c83a76b0SSuyog Pawar /** 1931*c83a76b0SSuyog Pawar * Flag will be set to 1 by frame processing thread after receiving flush 1932*c83a76b0SSuyog Pawar * command from application 1933*c83a76b0SSuyog Pawar */ 1934*c83a76b0SSuyog Pawar WORD32 i4_end_flag; 1935*c83a76b0SSuyog Pawar 1936*c83a76b0SSuyog Pawar /** frame level ctb allocation for ctb after aligning to max cu size */ 1937*c83a76b0SSuyog Pawar ctb_enc_loop_out_t *ps_frm_ctb_data; 1938*c83a76b0SSuyog Pawar 1939*c83a76b0SSuyog Pawar /** frame level cu allocation for ctb after aligning to max cu size */ 1940*c83a76b0SSuyog Pawar cu_enc_loop_out_t *ps_frm_cu_data; 1941*c83a76b0SSuyog Pawar 1942*c83a76b0SSuyog Pawar /** frame level tu allocation for ctb after aligning to max cu size */ 1943*c83a76b0SSuyog Pawar tu_enc_loop_out_t *ps_frm_tu_data; 1944*c83a76b0SSuyog Pawar 1945*c83a76b0SSuyog Pawar /** frame level pu allocation for ctb after aligning to max cu size */ 1946*c83a76b0SSuyog Pawar pu_t *ps_frm_pu_data; 1947*c83a76b0SSuyog Pawar 1948*c83a76b0SSuyog Pawar /** frame level coeff allocation for ctb after aligning to max cu size */ 1949*c83a76b0SSuyog Pawar void *pv_coeff_data; 1950*c83a76b0SSuyog Pawar 1951*c83a76b0SSuyog Pawar /** Slice header parameters */ 1952*c83a76b0SSuyog Pawar slice_header_t s_slice_hdr; 1953*c83a76b0SSuyog Pawar 1954*c83a76b0SSuyog Pawar /** sps parameters activated by current slice */ 1955*c83a76b0SSuyog Pawar sps_t *ps_sps; 1956*c83a76b0SSuyog Pawar 1957*c83a76b0SSuyog Pawar /** pps parameters activated by current slice */ 1958*c83a76b0SSuyog Pawar pps_t *ps_pps; 1959*c83a76b0SSuyog Pawar 1960*c83a76b0SSuyog Pawar /** vps parameters activated by current slice */ 1961*c83a76b0SSuyog Pawar vps_t *ps_vps; 1962*c83a76b0SSuyog Pawar 1963*c83a76b0SSuyog Pawar #ifndef DISABLE_SEI 1964*c83a76b0SSuyog Pawar /** vps parameters activated by current slice */ 1965*c83a76b0SSuyog Pawar sei_params_t s_sei; 1966*c83a76b0SSuyog Pawar #endif 1967*c83a76b0SSuyog Pawar 1968*c83a76b0SSuyog Pawar /* Flag to indicate if AUD NAL is present */ 1969*c83a76b0SSuyog Pawar WORD8 i1_aud_present_flag; 1970*c83a76b0SSuyog Pawar 1971*c83a76b0SSuyog Pawar /* Flag to indicate if EOS NAL is present */ 1972*c83a76b0SSuyog Pawar WORD8 i1_eos_present_flag; 1973*c83a76b0SSuyog Pawar 1974*c83a76b0SSuyog Pawar /** nal_type for the slice to be encoded */ 1975*c83a76b0SSuyog Pawar WORD32 i4_slice_nal_type; 1976*c83a76b0SSuyog Pawar 1977*c83a76b0SSuyog Pawar /** input time stamp in terms of ticks: lower 32 */ 1978*c83a76b0SSuyog Pawar WORD32 i4_inp_timestamp_low; 1979*c83a76b0SSuyog Pawar 1980*c83a76b0SSuyog Pawar /** input time stamp in terms of ticks: higher 32 */ 1981*c83a76b0SSuyog Pawar WORD32 i4_inp_timestamp_high; 1982*c83a76b0SSuyog Pawar 1983*c83a76b0SSuyog Pawar /** input frame ctxt of app to be retured in output buffer */ 1984*c83a76b0SSuyog Pawar void *pv_app_frm_ctxt; 1985*c83a76b0SSuyog Pawar 1986*c83a76b0SSuyog Pawar /** current frm valid flag : 1987*c83a76b0SSuyog Pawar * will be 1 if valid input was processed by frame proc thrd 1988*c83a76b0SSuyog Pawar */ 1989*c83a76b0SSuyog Pawar WORD32 i4_frm_proc_valid_flag; 1990*c83a76b0SSuyog Pawar 1991*c83a76b0SSuyog Pawar /** To support entropy sync the bitstream offset of each CTB row 1992*c83a76b0SSuyog Pawar * is populated in this array any put in slice header in the end 1993*c83a76b0SSuyog Pawar */ 1994*c83a76b0SSuyog Pawar WORD32 ai4_entry_point_offset[MAX_NUM_CTB_ROWS_FRM]; 1995*c83a76b0SSuyog Pawar 1996*c83a76b0SSuyog Pawar /** RDopt estimation of bytes generated based on which rc update happens 1997*c83a76b0SSuyog Pawar * 1998*c83a76b0SSuyog Pawar */ 1999*c83a76b0SSuyog Pawar WORD32 i4_rdopt_bits_generated_estimate; 2000*c83a76b0SSuyog Pawar 2001*c83a76b0SSuyog Pawar /* These params are passed from enc-threads to entropy thread for 2002*c83a76b0SSuyog Pawar passing params needed for PSNR caclulation and encoding 2003*c83a76b0SSuyog Pawar summary prints */ 2004*c83a76b0SSuyog Pawar DOUBLE lf_luma_mse; 2005*c83a76b0SSuyog Pawar DOUBLE lf_cb_mse; 2006*c83a76b0SSuyog Pawar DOUBLE lf_cr_mse; 2007*c83a76b0SSuyog Pawar 2008*c83a76b0SSuyog Pawar DOUBLE lf_luma_ssim; 2009*c83a76b0SSuyog Pawar DOUBLE lf_cb_ssim; 2010*c83a76b0SSuyog Pawar DOUBLE lf_cr_ssim; 2011*c83a76b0SSuyog Pawar 2012*c83a76b0SSuyog Pawar WORD32 i4_qp; 2013*c83a76b0SSuyog Pawar WORD32 i4_poc; 2014*c83a76b0SSuyog Pawar WORD32 i4_display_num; 2015*c83a76b0SSuyog Pawar WORD32 i4_pic_type; 2016*c83a76b0SSuyog Pawar 2017*c83a76b0SSuyog Pawar /** I-only SCD */ 2018*c83a76b0SSuyog Pawar WORD32 i4_is_I_scenecut; 2019*c83a76b0SSuyog Pawar 2020*c83a76b0SSuyog Pawar WORD32 i4_is_non_I_scenecut; 2021*c83a76b0SSuyog Pawar WORD32 i4_sub_pic_level_rc; 2022*c83a76b0SSuyog Pawar 2023*c83a76b0SSuyog Pawar WORD32 ai4_frame_bits_estimated; 2024*c83a76b0SSuyog Pawar s_pic_level_acc_info_t s_pic_level_info; 2025*c83a76b0SSuyog Pawar 2026*c83a76b0SSuyog Pawar LWORD64 i8_buf_level_bitrate_change; 2027*c83a76b0SSuyog Pawar 2028*c83a76b0SSuyog Pawar WORD32 i4_is_end_of_idr_gop; 2029*c83a76b0SSuyog Pawar 2030*c83a76b0SSuyog Pawar #ifndef DISABLE_SEI 2031*c83a76b0SSuyog Pawar sei_payload_t as_sei_payload[MAX_NUMBER_OF_SEI_PAYLOAD]; 2032*c83a76b0SSuyog Pawar 2033*c83a76b0SSuyog Pawar UWORD32 u4_num_sei_payload; 2034*c83a76b0SSuyog Pawar #endif 2035*c83a76b0SSuyog Pawar /* Flag used only in mres single output case to flush out one res and start with next */ 2036*c83a76b0SSuyog Pawar WORD32 i4_out_flush_flag; 2037*c83a76b0SSuyog Pawar 2038*c83a76b0SSuyog Pawar } frm_proc_ent_cod_ctxt_t; 2039*c83a76b0SSuyog Pawar 2040*c83a76b0SSuyog Pawar /** 2041*c83a76b0SSuyog Pawar ****************************************************************************** 2042*c83a76b0SSuyog Pawar * @brief ME pass and Main enocde pass shared variables and buffers 2043*c83a76b0SSuyog Pawar ****************************************************************************** 2044*c83a76b0SSuyog Pawar */ 2045*c83a76b0SSuyog Pawar typedef struct 2046*c83a76b0SSuyog Pawar { 2047*c83a76b0SSuyog Pawar /*BitRate ID*/ 2048*c83a76b0SSuyog Pawar WORD32 i4_br_id; 2049*c83a76b0SSuyog Pawar 2050*c83a76b0SSuyog Pawar /*Frame ID*/ 2051*c83a76b0SSuyog Pawar WORD32 i4_frm_id; 2052*c83a76b0SSuyog Pawar 2053*c83a76b0SSuyog Pawar /*Number of CTB, after ich data is populated*/ 2054*c83a76b0SSuyog Pawar WORD32 i4_ctb_count_in_data; 2055*c83a76b0SSuyog Pawar 2056*c83a76b0SSuyog Pawar /*Number of CTB, after ich scale is computed*/ 2057*c83a76b0SSuyog Pawar WORD32 i4_ctb_count_out_scale; 2058*c83a76b0SSuyog Pawar 2059*c83a76b0SSuyog Pawar /*Bits estimated for the frame */ 2060*c83a76b0SSuyog Pawar /* For NON-I SCD max buf bits*/ 2061*c83a76b0SSuyog Pawar LWORD64 i8_frame_bits_estimated; 2062*c83a76b0SSuyog Pawar 2063*c83a76b0SSuyog Pawar /* Bits consumed till the nctb*/ 2064*c83a76b0SSuyog Pawar LWORD64 i8_nctb_bits_consumed; 2065*c83a76b0SSuyog Pawar 2066*c83a76b0SSuyog Pawar /* Bits consumed till the nctb*/ 2067*c83a76b0SSuyog Pawar LWORD64 i8_acc_bits_consumed; 2068*c83a76b0SSuyog Pawar 2069*c83a76b0SSuyog Pawar /*Frame level Best of Ipe and ME sad*/ 2070*c83a76b0SSuyog Pawar LWORD64 i8_frame_l1_me_sad; 2071*c83a76b0SSuyog Pawar 2072*c83a76b0SSuyog Pawar /*SAD accumalted till NCTB*/ 2073*c83a76b0SSuyog Pawar LWORD64 i8_nctb_l1_me_sad; 2074*c83a76b0SSuyog Pawar 2075*c83a76b0SSuyog Pawar /*Frame level IPE sad*/ 2076*c83a76b0SSuyog Pawar LWORD64 i8_frame_l1_ipe_sad; 2077*c83a76b0SSuyog Pawar 2078*c83a76b0SSuyog Pawar /*SAD accumalted till NCTB*/ 2079*c83a76b0SSuyog Pawar LWORD64 i8_nctb_l1_ipe_sad; 2080*c83a76b0SSuyog Pawar 2081*c83a76b0SSuyog Pawar /*Frame level L0 IPE satd*/ 2082*c83a76b0SSuyog Pawar LWORD64 i8_frame_l0_ipe_satd; 2083*c83a76b0SSuyog Pawar 2084*c83a76b0SSuyog Pawar /*L0 SATD accumalted till NCTB*/ 2085*c83a76b0SSuyog Pawar LWORD64 i8_nctb_l0_ipe_satd; 2086*c83a76b0SSuyog Pawar 2087*c83a76b0SSuyog Pawar /*Frame level Activity factor acc at 8x8 level */ 2088*c83a76b0SSuyog Pawar LWORD64 i8_frame_l1_activity_fact; 2089*c83a76b0SSuyog Pawar 2090*c83a76b0SSuyog Pawar /*NCTB Activity factor acc at 8x8 level */ 2091*c83a76b0SSuyog Pawar LWORD64 i8_nctb_l1_activity_fact; 2092*c83a76b0SSuyog Pawar 2093*c83a76b0SSuyog Pawar /*L0 MPM bits accumalted till NCTB*/ 2094*c83a76b0SSuyog Pawar LWORD64 i8_nctb_l0_mpm_bits; 2095*c83a76b0SSuyog Pawar 2096*c83a76b0SSuyog Pawar /*Encoder hdr accumalted till NCTB*/ 2097*c83a76b0SSuyog Pawar LWORD64 i8_nctb_hdr_bits_consumed; 2098*c83a76b0SSuyog Pawar 2099*c83a76b0SSuyog Pawar } ihevce_sub_pic_rc_ctxt_t; 2100*c83a76b0SSuyog Pawar 2101*c83a76b0SSuyog Pawar /** 2102*c83a76b0SSuyog Pawar ****************************************************************************** 2103*c83a76b0SSuyog Pawar * @brief Memoery manager context (stores the memory tables allcoated) 2104*c83a76b0SSuyog Pawar ****************************************************************************** 2105*c83a76b0SSuyog Pawar */ 2106*c83a76b0SSuyog Pawar typedef struct 2107*c83a76b0SSuyog Pawar { 2108*c83a76b0SSuyog Pawar /** 2109*c83a76b0SSuyog Pawar * Total number of memtabs (Modules and system) 2110*c83a76b0SSuyog Pawar * during create time 2111*c83a76b0SSuyog Pawar */ 2112*c83a76b0SSuyog Pawar WORD32 i4_num_create_memtabs; 2113*c83a76b0SSuyog Pawar 2114*c83a76b0SSuyog Pawar /** 2115*c83a76b0SSuyog Pawar * Pointer to the mem tabs 2116*c83a76b0SSuyog Pawar * of crate time 2117*c83a76b0SSuyog Pawar */ 2118*c83a76b0SSuyog Pawar iv_mem_rec_t *ps_create_memtab; 2119*c83a76b0SSuyog Pawar 2120*c83a76b0SSuyog Pawar /** 2121*c83a76b0SSuyog Pawar * Total number of memtabs Data and control Ques 2122*c83a76b0SSuyog Pawar * during Ques create time 2123*c83a76b0SSuyog Pawar */ 2124*c83a76b0SSuyog Pawar WORD32 i4_num_q_memtabs; 2125*c83a76b0SSuyog Pawar 2126*c83a76b0SSuyog Pawar /** 2127*c83a76b0SSuyog Pawar * Pointer to the mem tabs 2128*c83a76b0SSuyog Pawar * of crate time 2129*c83a76b0SSuyog Pawar */ 2130*c83a76b0SSuyog Pawar iv_mem_rec_t *ps_q_memtab; 2131*c83a76b0SSuyog Pawar 2132*c83a76b0SSuyog Pawar } enc_mem_mngr_ctxt; 2133*c83a76b0SSuyog Pawar 2134*c83a76b0SSuyog Pawar /** 2135*c83a76b0SSuyog Pawar ****************************************************************************** 2136*c83a76b0SSuyog Pawar * @brief Encoder Interafce Queues Context 2137*c83a76b0SSuyog Pawar ****************************************************************************** 2138*c83a76b0SSuyog Pawar */ 2139*c83a76b0SSuyog Pawar typedef struct 2140*c83a76b0SSuyog Pawar { 2141*c83a76b0SSuyog Pawar /** Number of Queues at interface context level */ 2142*c83a76b0SSuyog Pawar WORD32 i4_num_queues; 2143*c83a76b0SSuyog Pawar 2144*c83a76b0SSuyog Pawar /** Array of Queues handle */ 2145*c83a76b0SSuyog Pawar void *apv_q_hdl[IHEVCE_MAX_NUM_QUEUES]; 2146*c83a76b0SSuyog Pawar 2147*c83a76b0SSuyog Pawar /** Mutex for encuring thread safety of the access of the queues */ 2148*c83a76b0SSuyog Pawar void *pv_q_mutex_hdl; 2149*c83a76b0SSuyog Pawar 2150*c83a76b0SSuyog Pawar } enc_q_ctxt_t; 2151*c83a76b0SSuyog Pawar 2152*c83a76b0SSuyog Pawar /** 2153*c83a76b0SSuyog Pawar ****************************************************************************** 2154*c83a76b0SSuyog Pawar * @brief Module context of different modules in encoder 2155*c83a76b0SSuyog Pawar ****************************************************************************** 2156*c83a76b0SSuyog Pawar */ 2157*c83a76b0SSuyog Pawar 2158*c83a76b0SSuyog Pawar typedef struct 2159*c83a76b0SSuyog Pawar { 2160*c83a76b0SSuyog Pawar /** Motion estimation context pointer */ 2161*c83a76b0SSuyog Pawar void *pv_me_ctxt; 2162*c83a76b0SSuyog Pawar /** Coarse Motion estimation context pointer */ 2163*c83a76b0SSuyog Pawar void *pv_coarse_me_ctxt; 2164*c83a76b0SSuyog Pawar 2165*c83a76b0SSuyog Pawar /** Intra Prediction context pointer */ 2166*c83a76b0SSuyog Pawar void *pv_ipe_ctxt; 2167*c83a76b0SSuyog Pawar 2168*c83a76b0SSuyog Pawar /** Encode Loop context pointer */ 2169*c83a76b0SSuyog Pawar void *pv_enc_loop_ctxt; 2170*c83a76b0SSuyog Pawar 2171*c83a76b0SSuyog Pawar /** Entropy Coding context pointer */ 2172*c83a76b0SSuyog Pawar void *apv_ent_cod_ctxt[IHEVCE_MAX_NUM_BITRATES]; 2173*c83a76b0SSuyog Pawar 2174*c83a76b0SSuyog Pawar /** Look Ahead Processing context pointer */ 2175*c83a76b0SSuyog Pawar void *pv_lap_ctxt; 2176*c83a76b0SSuyog Pawar /** Rate control context pointer */ 2177*c83a76b0SSuyog Pawar void *apv_rc_ctxt[IHEVCE_MAX_NUM_BITRATES]; 2178*c83a76b0SSuyog Pawar /** Decomposition pre intra context pointer */ 2179*c83a76b0SSuyog Pawar void *pv_decomp_pre_intra_ctxt; 2180*c83a76b0SSuyog Pawar 2181*c83a76b0SSuyog Pawar } module_ctxt_t; 2182*c83a76b0SSuyog Pawar 2183*c83a76b0SSuyog Pawar /** 2184*c83a76b0SSuyog Pawar ****************************************************************************** 2185*c83a76b0SSuyog Pawar * @brief Threads semaphore handles 2186*c83a76b0SSuyog Pawar ****************************************************************************** 2187*c83a76b0SSuyog Pawar */ 2188*c83a76b0SSuyog Pawar typedef struct 2189*c83a76b0SSuyog Pawar { 2190*c83a76b0SSuyog Pawar /** LAP semaphore handle */ 2191*c83a76b0SSuyog Pawar void *pv_lap_sem_handle; 2192*c83a76b0SSuyog Pawar 2193*c83a76b0SSuyog Pawar /** Encode frame Process semaphore handle */ 2194*c83a76b0SSuyog Pawar void *pv_enc_frm_proc_sem_handle; 2195*c83a76b0SSuyog Pawar 2196*c83a76b0SSuyog Pawar /** Pre Encode frame Process semaphore handle */ 2197*c83a76b0SSuyog Pawar void *pv_pre_enc_frm_proc_sem_handle; 2198*c83a76b0SSuyog Pawar 2199*c83a76b0SSuyog Pawar /** Entropy coding semaphore handle 2200*c83a76b0SSuyog Pawar One semaphore for each entropy thread, i.e. for each bit-rate instance*/ 2201*c83a76b0SSuyog Pawar void *apv_ent_cod_sem_handle[IHEVCE_MAX_NUM_BITRATES]; 2202*c83a76b0SSuyog Pawar 2203*c83a76b0SSuyog Pawar /** 2204*c83a76b0SSuyog Pawar * Semaphore handle corresponding to get free inp frame buff 2205*c83a76b0SSuyog Pawar * function call from app if called in blocking mode 2206*c83a76b0SSuyog Pawar */ 2207*c83a76b0SSuyog Pawar void *pv_inp_data_sem_handle; 2208*c83a76b0SSuyog Pawar 2209*c83a76b0SSuyog Pawar /** 2210*c83a76b0SSuyog Pawar * Semaphore handle corresponding to get free inp control command buff 2211*c83a76b0SSuyog Pawar * function call from app if called in blocking mode 2212*c83a76b0SSuyog Pawar */ 2213*c83a76b0SSuyog Pawar void *pv_inp_ctrl_sem_handle; 2214*c83a76b0SSuyog Pawar 2215*c83a76b0SSuyog Pawar /** 2216*c83a76b0SSuyog Pawar * Semaphore handle corresponding to get filled out bitstream buff 2217*c83a76b0SSuyog Pawar * function call from app if called in blocking mode 2218*c83a76b0SSuyog Pawar */ 2219*c83a76b0SSuyog Pawar void *apv_out_strm_sem_handle[IHEVCE_MAX_NUM_BITRATES]; 2220*c83a76b0SSuyog Pawar 2221*c83a76b0SSuyog Pawar /** 2222*c83a76b0SSuyog Pawar * Semaphore handle corresponding to get filled out recon buff 2223*c83a76b0SSuyog Pawar * function call from app if called in blocking mode 2224*c83a76b0SSuyog Pawar */ 2225*c83a76b0SSuyog Pawar void *apv_out_recon_sem_handle[IHEVCE_MAX_NUM_BITRATES]; 2226*c83a76b0SSuyog Pawar 2227*c83a76b0SSuyog Pawar /** 2228*c83a76b0SSuyog Pawar * Semaphore handle corresponding to get filled out control status buff 2229*c83a76b0SSuyog Pawar * function call from app if called in blocking mode 2230*c83a76b0SSuyog Pawar */ 2231*c83a76b0SSuyog Pawar void *pv_out_ctrl_sem_handle; 2232*c83a76b0SSuyog Pawar 2233*c83a76b0SSuyog Pawar /** 2234*c83a76b0SSuyog Pawar * Semaphore handle corresponding to get filled out control status buff 2235*c83a76b0SSuyog Pawar * function call from app if called in blocking mode 2236*c83a76b0SSuyog Pawar */ 2237*c83a76b0SSuyog Pawar void *pv_lap_inp_data_sem_hdl; 2238*c83a76b0SSuyog Pawar 2239*c83a76b0SSuyog Pawar /** 2240*c83a76b0SSuyog Pawar * Semaphore handle corresponding to get filled out control status buff 2241*c83a76b0SSuyog Pawar * function call from app if called in blocking mode 2242*c83a76b0SSuyog Pawar */ 2243*c83a76b0SSuyog Pawar void *pv_preenc_inp_data_sem_hdl; 2244*c83a76b0SSuyog Pawar 2245*c83a76b0SSuyog Pawar /** 2246*c83a76b0SSuyog Pawar * Semaphore handle corresponding to Multi Res Single output case 2247*c83a76b0SSuyog Pawar */ 2248*c83a76b0SSuyog Pawar void *pv_ent_common_mres_sem_hdl; 2249*c83a76b0SSuyog Pawar void *pv_out_common_mres_sem_hdl; 2250*c83a76b0SSuyog Pawar 2251*c83a76b0SSuyog Pawar } thrd_que_sem_hdl_t; 2252*c83a76b0SSuyog Pawar 2253*c83a76b0SSuyog Pawar /** 2254*c83a76b0SSuyog Pawar ****************************************************************************** 2255*c83a76b0SSuyog Pawar * @brief Frame level structure which has parameters about CTBs 2256*c83a76b0SSuyog Pawar ****************************************************************************** 2257*c83a76b0SSuyog Pawar */ 2258*c83a76b0SSuyog Pawar typedef struct 2259*c83a76b0SSuyog Pawar { 2260*c83a76b0SSuyog Pawar /** CTB size of all CTB in a frame in pixels 2261*c83a76b0SSuyog Pawar * this will be create time value, 2262*c83a76b0SSuyog Pawar * run time change in this value is not supported 2263*c83a76b0SSuyog Pawar */ 2264*c83a76b0SSuyog Pawar WORD32 i4_ctb_size; 2265*c83a76b0SSuyog Pawar 2266*c83a76b0SSuyog Pawar /** Minimum CU size of CTB in a frame in pixels 2267*c83a76b0SSuyog Pawar * this will be create time value, 2268*c83a76b0SSuyog Pawar * run time change in this value is not supported 2269*c83a76b0SSuyog Pawar */ 2270*c83a76b0SSuyog Pawar WORD32 i4_min_cu_size; 2271*c83a76b0SSuyog Pawar 2272*c83a76b0SSuyog Pawar /** Worst case num CUs in CTB based on i4_ctb_size */ 2273*c83a76b0SSuyog Pawar WORD32 i4_num_cus_in_ctb; 2274*c83a76b0SSuyog Pawar 2275*c83a76b0SSuyog Pawar /** Worst case num PUs in CTB based on i4_ctb_size */ 2276*c83a76b0SSuyog Pawar WORD32 i4_num_pus_in_ctb; 2277*c83a76b0SSuyog Pawar 2278*c83a76b0SSuyog Pawar /** Worst case num TUs in CTB based on i4_ctb_size */ 2279*c83a76b0SSuyog Pawar WORD32 i4_num_tus_in_ctb; 2280*c83a76b0SSuyog Pawar 2281*c83a76b0SSuyog Pawar /** Number of CTBs in horizontal direction 2282*c83a76b0SSuyog Pawar * this is based on run time source width and i4_ctb_size 2283*c83a76b0SSuyog Pawar */ 2284*c83a76b0SSuyog Pawar WORD32 i4_num_ctbs_horz; 2285*c83a76b0SSuyog Pawar 2286*c83a76b0SSuyog Pawar /** Number of CTBs in vertical direction 2287*c83a76b0SSuyog Pawar * this is based on run time source height and i4_ctb_size 2288*c83a76b0SSuyog Pawar */ 2289*c83a76b0SSuyog Pawar WORD32 i4_num_ctbs_vert; 2290*c83a76b0SSuyog Pawar 2291*c83a76b0SSuyog Pawar /** MAX CUs in horizontal direction 2292*c83a76b0SSuyog Pawar * this is based on run time source width, i4_ctb_size and i4_num_cus_in_ctb 2293*c83a76b0SSuyog Pawar */ 2294*c83a76b0SSuyog Pawar WORD32 i4_max_cus_in_row; 2295*c83a76b0SSuyog Pawar 2296*c83a76b0SSuyog Pawar /** MAX PUs in horizontal direction 2297*c83a76b0SSuyog Pawar * this is based on run time source width, i4_ctb_size and i4_num_pus_in_ctb 2298*c83a76b0SSuyog Pawar */ 2299*c83a76b0SSuyog Pawar WORD32 i4_max_pus_in_row; 2300*c83a76b0SSuyog Pawar 2301*c83a76b0SSuyog Pawar /** MAX TUs in horizontal direction 2302*c83a76b0SSuyog Pawar * this is based on run time source width, i4_ctb_size and i4_num_tus_in_ctb 2303*c83a76b0SSuyog Pawar */ 2304*c83a76b0SSuyog Pawar WORD32 i4_max_tus_in_row; 2305*c83a76b0SSuyog Pawar 2306*c83a76b0SSuyog Pawar /** 2307*c83a76b0SSuyog Pawar * CU aligned picture width (currently aligned to MAX CU size) 2308*c83a76b0SSuyog Pawar * should be modified to be aligned to MIN CU size 2309*c83a76b0SSuyog Pawar */ 2310*c83a76b0SSuyog Pawar 2311*c83a76b0SSuyog Pawar WORD32 i4_cu_aligned_pic_wd; 2312*c83a76b0SSuyog Pawar 2313*c83a76b0SSuyog Pawar /** 2314*c83a76b0SSuyog Pawar * CU aligned picture height (currently aligned to MAX CU size) 2315*c83a76b0SSuyog Pawar * should be modified to be aligned to MIN CU size 2316*c83a76b0SSuyog Pawar */ 2317*c83a76b0SSuyog Pawar 2318*c83a76b0SSuyog Pawar WORD32 i4_cu_aligned_pic_ht; 2319*c83a76b0SSuyog Pawar 2320*c83a76b0SSuyog Pawar /* Pointer to a frame level memory, 2321*c83a76b0SSuyog Pawar Stride is = 1 + (num ctbs in a ctb-row) + 1 2322*c83a76b0SSuyog Pawar Hieght is = 1 + (num ctbs in a ctb-col) 2323*c83a76b0SSuyog Pawar Contains tile-id of each ctb */ 2324*c83a76b0SSuyog Pawar WORD32 *pi4_tile_id_map; 2325*c83a76b0SSuyog Pawar 2326*c83a76b0SSuyog Pawar /* stride in units of ctb */ 2327*c83a76b0SSuyog Pawar WORD32 i4_tile_id_ctb_map_stride; 2328*c83a76b0SSuyog Pawar 2329*c83a76b0SSuyog Pawar } frm_ctb_ctxt_t; 2330*c83a76b0SSuyog Pawar 2331*c83a76b0SSuyog Pawar /** 2332*c83a76b0SSuyog Pawar ****************************************************************************** 2333*c83a76b0SSuyog Pawar * @brief ME Job Queue desc 2334*c83a76b0SSuyog Pawar ****************************************************************************** 2335*c83a76b0SSuyog Pawar */ 2336*c83a76b0SSuyog Pawar typedef struct 2337*c83a76b0SSuyog Pawar { 2338*c83a76b0SSuyog Pawar /** Number of output dependencies which need to be set after 2339*c83a76b0SSuyog Pawar * current job is complete, 2340*c83a76b0SSuyog Pawar * should be less than or equal to MAX_OUT_DEP defined in 2341*c83a76b0SSuyog Pawar * ihevce_multi_thrd_structs.h 2342*c83a76b0SSuyog Pawar */ 2343*c83a76b0SSuyog Pawar WORD32 i4_num_output_dep; 2344*c83a76b0SSuyog Pawar 2345*c83a76b0SSuyog Pawar /** Array of offsets from the start of output dependent layer's Job Ques 2346*c83a76b0SSuyog Pawar * which are dependent on current Job to be complete 2347*c83a76b0SSuyog Pawar */ 2348*c83a76b0SSuyog Pawar WORD32 ai4_out_dep_unit_off[MAX_OUT_DEP]; 2349*c83a76b0SSuyog Pawar 2350*c83a76b0SSuyog Pawar /** Number of input dependencies to be resolved for current job to start 2351*c83a76b0SSuyog Pawar * these many jobs in lower layer should be complete to 2352*c83a76b0SSuyog Pawar * start the current JOB 2353*c83a76b0SSuyog Pawar */ 2354*c83a76b0SSuyog Pawar WORD32 i4_num_inp_dep; 2355*c83a76b0SSuyog Pawar 2356*c83a76b0SSuyog Pawar } multi_thrd_me_job_q_prms_t; 2357*c83a76b0SSuyog Pawar 2358*c83a76b0SSuyog Pawar /** 2359*c83a76b0SSuyog Pawar * @brief structure in which recon data 2360*c83a76b0SSuyog Pawar * and related parameters are sent from Encoder 2361*c83a76b0SSuyog Pawar */ 2362*c83a76b0SSuyog Pawar typedef struct 2363*c83a76b0SSuyog Pawar { 2364*c83a76b0SSuyog Pawar /** Kept for maintaining backwards compatibility in future */ 2365*c83a76b0SSuyog Pawar WORD32 i4_size; 2366*c83a76b0SSuyog Pawar 2367*c83a76b0SSuyog Pawar /** Buffer id for the current buffer */ 2368*c83a76b0SSuyog Pawar WORD32 i4_buf_id; 2369*c83a76b0SSuyog Pawar 2370*c83a76b0SSuyog Pawar /** POC of the current buffer */ 2371*c83a76b0SSuyog Pawar WORD32 i4_poc; 2372*c83a76b0SSuyog Pawar 2373*c83a76b0SSuyog Pawar /** End flag to communicate this is last frame output from encoder */ 2374*c83a76b0SSuyog Pawar WORD32 i4_end_flag; 2375*c83a76b0SSuyog Pawar 2376*c83a76b0SSuyog Pawar /** End flag to communicate encoder that this is the last buffer from application 2377*c83a76b0SSuyog Pawar 1 - Last buf, 0 - Not last buffer. No other values are supported. 2378*c83a76b0SSuyog Pawar Application has to set the appropriate value before queing in encoder queue */ 2379*c83a76b0SSuyog Pawar 2380*c83a76b0SSuyog Pawar WORD32 i4_is_last_buf; 2381*c83a76b0SSuyog Pawar 2382*c83a76b0SSuyog Pawar /** Recon luma buffer pointer */ 2383*c83a76b0SSuyog Pawar void *pv_y_buf; 2384*c83a76b0SSuyog Pawar 2385*c83a76b0SSuyog Pawar /** Recon cb buffer pointer */ 2386*c83a76b0SSuyog Pawar void *pv_cb_buf; 2387*c83a76b0SSuyog Pawar 2388*c83a76b0SSuyog Pawar /** Recon cr buffer pointer */ 2389*c83a76b0SSuyog Pawar void *pv_cr_buf; 2390*c83a76b0SSuyog Pawar 2391*c83a76b0SSuyog Pawar /** Luma size **/ 2392*c83a76b0SSuyog Pawar WORD32 i4_y_pixels; 2393*c83a76b0SSuyog Pawar 2394*c83a76b0SSuyog Pawar /** Chroma size **/ 2395*c83a76b0SSuyog Pawar WORD32 i4_uv_pixels; 2396*c83a76b0SSuyog Pawar 2397*c83a76b0SSuyog Pawar } iv_enc_recon_data_buffs_t; 2398*c83a76b0SSuyog Pawar 2399*c83a76b0SSuyog Pawar /** 2400*c83a76b0SSuyog Pawar ****************************************************************************** 2401*c83a76b0SSuyog Pawar * @brief Multi Thread context structure 2402*c83a76b0SSuyog Pawar ****************************************************************************** 2403*c83a76b0SSuyog Pawar */ 2404*c83a76b0SSuyog Pawar typedef struct 2405*c83a76b0SSuyog Pawar { 2406*c83a76b0SSuyog Pawar /* Flag to indicate to enc and pre-enc thrds that app has sent force end cmd*/ 2407*c83a76b0SSuyog Pawar WORD32 i4_force_end_flag; 2408*c83a76b0SSuyog Pawar 2409*c83a76b0SSuyog Pawar /** Force all active threads flag 2410*c83a76b0SSuyog Pawar * This flag will be set to 1 if all Number of cores givento the encoder 2411*c83a76b0SSuyog Pawar * is less than or Equal to MAX_NUM_CORES_SEQ_EXEC. In this mode 2412*c83a76b0SSuyog Pawar * All pre enc threads and enc threads will run of the same cores with 2413*c83a76b0SSuyog Pawar * time sharing ar frame level 2414*c83a76b0SSuyog Pawar */ 2415*c83a76b0SSuyog Pawar WORD32 i4_all_thrds_active_flag; 2416*c83a76b0SSuyog Pawar 2417*c83a76b0SSuyog Pawar /** Flag to indicate that core manager has been configured to enable 2418*c83a76b0SSuyog Pawar * sequential execution 2419*c83a76b0SSuyog Pawar */ 2420*c83a76b0SSuyog Pawar WORD32 i4_seq_mode_enabled_flag; 2421*c83a76b0SSuyog Pawar /*-----------------------------------------------------------------------*/ 2422*c83a76b0SSuyog Pawar /*--------- Params related to encode group -----------------------------*/ 2423*c83a76b0SSuyog Pawar /*-----------------------------------------------------------------------*/ 2424*c83a76b0SSuyog Pawar 2425*c83a76b0SSuyog Pawar /** Number of processing threads created runtime in encode group */ 2426*c83a76b0SSuyog Pawar WORD32 i4_num_enc_proc_thrds; 2427*c83a76b0SSuyog Pawar 2428*c83a76b0SSuyog Pawar /** Number of processing threads active for a given frame 2429*c83a76b0SSuyog Pawar * This value will be monitored at frame level, so as to 2430*c83a76b0SSuyog Pawar * have provsion for increasing / decreasing threads 2431*c83a76b0SSuyog Pawar * based on Load balance b/w stage in encoder 2432*c83a76b0SSuyog Pawar */ 2433*c83a76b0SSuyog Pawar WORD32 i4_num_active_enc_thrds; 2434*c83a76b0SSuyog Pawar 2435*c83a76b0SSuyog Pawar /** Mutex for ensuring thread safety of the access of Job queues in encode group */ 2436*c83a76b0SSuyog Pawar void *pv_job_q_mutex_hdl_enc_grp_me; 2437*c83a76b0SSuyog Pawar 2438*c83a76b0SSuyog Pawar /** Mutex for ensuring thread safety of the access of Job queues in encode group */ 2439*c83a76b0SSuyog Pawar void *pv_job_q_mutex_hdl_enc_grp_enc_loop; 2440*c83a76b0SSuyog Pawar 2441*c83a76b0SSuyog Pawar /** Array of Semaphore handles (for each frame processing threads ) */ 2442*c83a76b0SSuyog Pawar void *apv_enc_thrd_sem_handle[MAX_NUM_FRM_PROC_THRDS_ENC]; 2443*c83a76b0SSuyog Pawar 2444*c83a76b0SSuyog Pawar /** Array for ME to export the Job que dependency for all layers */ 2445*c83a76b0SSuyog Pawar multi_thrd_me_job_q_prms_t as_me_job_q_prms[MAX_NUM_HME_LAYERS][MAX_NUM_VERT_UNITS_FRM]; 2446*c83a76b0SSuyog Pawar 2447*c83a76b0SSuyog Pawar /* pointer to the mutex handle*/ 2448*c83a76b0SSuyog Pawar void *apv_mutex_handle[MAX_NUM_ME_PARALLEL]; 2449*c83a76b0SSuyog Pawar 2450*c83a76b0SSuyog Pawar /* pointer to the mutex handle for frame init*/ 2451*c83a76b0SSuyog Pawar void *apv_mutex_handle_me_end[MAX_NUM_ME_PARALLEL]; 2452*c83a76b0SSuyog Pawar 2453*c83a76b0SSuyog Pawar /* pointer to the mutex handle for frame init*/ 2454*c83a76b0SSuyog Pawar void *apv_mutex_handle_frame_init[MAX_NUM_ENC_LOOP_PARALLEL]; 2455*c83a76b0SSuyog Pawar 2456*c83a76b0SSuyog Pawar /*pointer to the mutex handle*/ 2457*c83a76b0SSuyog Pawar void *apv_post_enc_mutex_handle[MAX_NUM_ENC_LOOP_PARALLEL]; 2458*c83a76b0SSuyog Pawar 2459*c83a76b0SSuyog Pawar /* Flag to indicate that master has done ME init*/ 2460*c83a76b0SSuyog Pawar WORD32 ai4_me_master_done_flag[MAX_NUM_ME_PARALLEL]; 2461*c83a76b0SSuyog Pawar 2462*c83a76b0SSuyog Pawar /* Counter to keep track of me num of thrds exiting critical section*/ 2463*c83a76b0SSuyog Pawar WORD32 me_num_thrds_exited[MAX_NUM_ME_PARALLEL]; 2464*c83a76b0SSuyog Pawar 2465*c83a76b0SSuyog Pawar /* Flag to indicate that master has done the frame init*/ 2466*c83a76b0SSuyog Pawar WORD32 enc_master_done_frame_init[MAX_NUM_ENC_LOOP_PARALLEL]; 2467*c83a76b0SSuyog Pawar 2468*c83a76b0SSuyog Pawar /* Counter to keep track of num of thrds exiting critical section*/ 2469*c83a76b0SSuyog Pawar WORD32 num_thrds_exited[MAX_NUM_ENC_LOOP_PARALLEL]; 2470*c83a76b0SSuyog Pawar 2471*c83a76b0SSuyog Pawar /* Counter to keep track of num of thrds exiting critical section for re-encode*/ 2472*c83a76b0SSuyog Pawar WORD32 num_thrds_exited_for_reenc; 2473*c83a76b0SSuyog Pawar 2474*c83a76b0SSuyog Pawar /* Array to store the curr qp for ping and pong instance*/ 2475*c83a76b0SSuyog Pawar WORD32 cur_qp[MAX_NUM_ENC_LOOP_PARALLEL][IHEVCE_MAX_NUM_BITRATES]; 2476*c83a76b0SSuyog Pawar 2477*c83a76b0SSuyog Pawar /* Pointers to store output buffers for ping and pong instance*/ 2478*c83a76b0SSuyog Pawar frm_proc_ent_cod_ctxt_t *ps_curr_out_enc_grp[MAX_NUM_ENC_LOOP_PARALLEL][IHEVCE_MAX_NUM_BITRATES]; 2479*c83a76b0SSuyog Pawar 2480*c83a76b0SSuyog Pawar /* Pointer to store input buffers for me*/ 2481*c83a76b0SSuyog Pawar pre_enc_me_ctxt_t *aps_cur_inp_me_prms[MAX_NUM_ME_PARALLEL]; 2482*c83a76b0SSuyog Pawar 2483*c83a76b0SSuyog Pawar /*pointers to store output buffers from me */ 2484*c83a76b0SSuyog Pawar me_enc_rdopt_ctxt_t *aps_cur_out_me_prms[NUM_ME_ENC_BUFS]; 2485*c83a76b0SSuyog Pawar 2486*c83a76b0SSuyog Pawar /*pointers to store input buffers to enc-rdopt */ 2487*c83a76b0SSuyog Pawar me_enc_rdopt_ctxt_t *aps_cur_inp_enc_prms[NUM_ME_ENC_BUFS]; 2488*c83a76b0SSuyog Pawar 2489*c83a76b0SSuyog Pawar /*Shared memory for Sub Pic rc */ 2490*c83a76b0SSuyog Pawar /*Qscale calulated by sub pic rc bit control for Intra Pic*/ 2491*c83a76b0SSuyog Pawar WORD32 ai4_curr_qp_estimated[MAX_NUM_ENC_LOOP_PARALLEL][IHEVCE_MAX_NUM_BITRATES]; 2492*c83a76b0SSuyog Pawar 2493*c83a76b0SSuyog Pawar /*Header bits error by sub pic rc bit control*/ 2494*c83a76b0SSuyog Pawar float af_acc_hdr_bits_scale_err[MAX_NUM_ENC_LOOP_PARALLEL][IHEVCE_MAX_NUM_BITRATES]; 2495*c83a76b0SSuyog Pawar 2496*c83a76b0SSuyog Pawar /*Accumalated ME SAD for NCTB*/ 2497*c83a76b0SSuyog Pawar LWORD64 ai8_nctb_me_sad[MAX_NUM_ENC_LOOP_PARALLEL][IHEVCE_MAX_NUM_BITRATES] 2498*c83a76b0SSuyog Pawar [MAX_NUM_FRM_PROC_THRDS_ENC]; 2499*c83a76b0SSuyog Pawar 2500*c83a76b0SSuyog Pawar /*Accumalated IPE SAD for NCTB*/ 2501*c83a76b0SSuyog Pawar LWORD64 ai8_nctb_ipe_sad[MAX_NUM_ENC_LOOP_PARALLEL][IHEVCE_MAX_NUM_BITRATES] 2502*c83a76b0SSuyog Pawar [MAX_NUM_FRM_PROC_THRDS_ENC]; 2503*c83a76b0SSuyog Pawar 2504*c83a76b0SSuyog Pawar /*Accumalated L0 IPE SAD for NCTB*/ 2505*c83a76b0SSuyog Pawar LWORD64 ai8_nctb_l0_ipe_sad[MAX_NUM_ENC_LOOP_PARALLEL][IHEVCE_MAX_NUM_BITRATES] 2506*c83a76b0SSuyog Pawar [MAX_NUM_FRM_PROC_THRDS_ENC]; 2507*c83a76b0SSuyog Pawar 2508*c83a76b0SSuyog Pawar /*Accumalated Activity Factor for NCTB*/ 2509*c83a76b0SSuyog Pawar LWORD64 ai8_nctb_act_factor[MAX_NUM_ENC_LOOP_PARALLEL][IHEVCE_MAX_NUM_BITRATES] 2510*c83a76b0SSuyog Pawar [MAX_NUM_FRM_PROC_THRDS_ENC]; 2511*c83a76b0SSuyog Pawar 2512*c83a76b0SSuyog Pawar /*Accumalated Ctb counter across all threads*/ 2513*c83a76b0SSuyog Pawar WORD32 ai4_ctb_ctr[MAX_NUM_ENC_LOOP_PARALLEL][IHEVCE_MAX_NUM_BITRATES]; 2514*c83a76b0SSuyog Pawar 2515*c83a76b0SSuyog Pawar /*Bits threshold reached for across all threads*/ 2516*c83a76b0SSuyog Pawar WORD32 ai4_threshold_reached[MAX_NUM_ENC_LOOP_PARALLEL][IHEVCE_MAX_NUM_BITRATES]; 2517*c83a76b0SSuyog Pawar 2518*c83a76b0SSuyog Pawar /*To hold the Previous In-frame RC chunk QP*/ 2519*c83a76b0SSuyog Pawar WORD32 ai4_prev_chunk_qp[MAX_NUM_ENC_LOOP_PARALLEL][IHEVCE_MAX_NUM_BITRATES]; 2520*c83a76b0SSuyog Pawar 2521*c83a76b0SSuyog Pawar /*Accumalated Ctb counter across all threads*/ 2522*c83a76b0SSuyog Pawar WORD32 ai4_acc_ctb_ctr[MAX_NUM_ENC_LOOP_PARALLEL][IHEVCE_MAX_NUM_BITRATES]; 2523*c83a76b0SSuyog Pawar 2524*c83a76b0SSuyog Pawar /*Flag to check if thread is initialized */ 2525*c83a76b0SSuyog Pawar WORD32 ai4_thrd_id_valid_flag[MAX_NUM_ENC_LOOP_PARALLEL][IHEVCE_MAX_NUM_BITRATES] 2526*c83a76b0SSuyog Pawar [MAX_NUM_FRM_PROC_THRDS_ENC]; 2527*c83a76b0SSuyog Pawar 2528*c83a76b0SSuyog Pawar /*Accumalated Ctb counter across all threads*/ 2529*c83a76b0SSuyog Pawar //WORD32 ai4_acc_qp[MAX_NUM_ENC_LOOP_PARALLEL][IHEVCE_MAX_NUM_BITRATES][MAX_NUM_FRM_PROC_THRDS_ENC]; 2530*c83a76b0SSuyog Pawar 2531*c83a76b0SSuyog Pawar /*Accumalated bits consumed for nctbs across all threads*/ 2532*c83a76b0SSuyog Pawar LWORD64 ai8_nctb_bits_consumed[MAX_NUM_ENC_LOOP_PARALLEL][IHEVCE_MAX_NUM_BITRATES] 2533*c83a76b0SSuyog Pawar [MAX_NUM_FRM_PROC_THRDS_ENC]; 2534*c83a76b0SSuyog Pawar 2535*c83a76b0SSuyog Pawar /*Accumalated hdr bits consumed for nctbs across all threads*/ 2536*c83a76b0SSuyog Pawar LWORD64 ai8_nctb_hdr_bits_consumed[MAX_NUM_ENC_LOOP_PARALLEL][IHEVCE_MAX_NUM_BITRATES] 2537*c83a76b0SSuyog Pawar [MAX_NUM_FRM_PROC_THRDS_ENC]; 2538*c83a76b0SSuyog Pawar 2539*c83a76b0SSuyog Pawar /*Accumalated l0 mpm bits consumed for nctbs across all threads*/ 2540*c83a76b0SSuyog Pawar LWORD64 ai8_nctb_mpm_bits_consumed[MAX_NUM_ENC_LOOP_PARALLEL][IHEVCE_MAX_NUM_BITRATES] 2541*c83a76b0SSuyog Pawar [MAX_NUM_FRM_PROC_THRDS_ENC]; 2542*c83a76b0SSuyog Pawar 2543*c83a76b0SSuyog Pawar /*Accumalated bits consumed for total ctbs across all threads*/ 2544*c83a76b0SSuyog Pawar LWORD64 ai8_acc_bits_consumed[MAX_NUM_ENC_LOOP_PARALLEL][IHEVCE_MAX_NUM_BITRATES] 2545*c83a76b0SSuyog Pawar [MAX_NUM_FRM_PROC_THRDS_ENC]; 2546*c83a76b0SSuyog Pawar 2547*c83a76b0SSuyog Pawar /*Accumalated bits consumed for total ctbs across all threads*/ 2548*c83a76b0SSuyog Pawar LWORD64 ai8_acc_bits_mul_qs_consumed[MAX_NUM_ENC_LOOP_PARALLEL][IHEVCE_MAX_NUM_BITRATES] 2549*c83a76b0SSuyog Pawar [MAX_NUM_FRM_PROC_THRDS_ENC]; 2550*c83a76b0SSuyog Pawar 2551*c83a76b0SSuyog Pawar /*Qscale calulated by sub pic rc bit control */ 2552*c83a76b0SSuyog Pawar WORD32 ai4_curr_qp_acc[MAX_NUM_ENC_LOOP_PARALLEL][IHEVCE_MAX_NUM_BITRATES]; 2553*c83a76b0SSuyog Pawar /* End of Sub pic rc variables */ 2554*c83a76b0SSuyog Pawar 2555*c83a76b0SSuyog Pawar /* Pointers to store input (only L0 IPE)*/ 2556*c83a76b0SSuyog Pawar pre_enc_L0_ipe_encloop_ctxt_t *aps_cur_L0_ipe_inp_prms[MAX_NUM_ME_PARALLEL]; 2557*c83a76b0SSuyog Pawar 2558*c83a76b0SSuyog Pawar /* Array tp store L0 IPE input buf ids*/ 2559*c83a76b0SSuyog Pawar WORD32 ai4_in_frm_l0_ipe_id[MAX_NUM_ME_PARALLEL]; 2560*c83a76b0SSuyog Pawar 2561*c83a76b0SSuyog Pawar /* Array to store output buffer ids for ping and pong instances*/ 2562*c83a76b0SSuyog Pawar WORD32 out_buf_id[MAX_NUM_ENC_LOOP_PARALLEL][IHEVCE_MAX_NUM_BITRATES]; 2563*c83a76b0SSuyog Pawar 2564*c83a76b0SSuyog Pawar /* Array of pointers to store the recon buf pointers*/ 2565*c83a76b0SSuyog Pawar iv_enc_recon_data_buffs_t *ps_recon_out[MAX_NUM_ENC_LOOP_PARALLEL][IHEVCE_MAX_NUM_BITRATES]; 2566*c83a76b0SSuyog Pawar 2567*c83a76b0SSuyog Pawar /* Array of pointers to frame recon for ping and pong instances*/ 2568*c83a76b0SSuyog Pawar recon_pic_buf_t *ps_frm_recon[NUM_ME_ENC_BUFS][IHEVCE_MAX_NUM_BITRATES]; 2569*c83a76b0SSuyog Pawar 2570*c83a76b0SSuyog Pawar /* Array of recon buffer ids for ping and pong instance*/ 2571*c83a76b0SSuyog Pawar WORD32 recon_buf_id[NUM_ME_ENC_BUFS][IHEVCE_MAX_NUM_BITRATES]; 2572*c83a76b0SSuyog Pawar 2573*c83a76b0SSuyog Pawar /* Counter to keep track of num thrds done*/ 2574*c83a76b0SSuyog Pawar WORD32 num_thrds_done; 2575*c83a76b0SSuyog Pawar 2576*c83a76b0SSuyog Pawar /* Flags to keep track of dumped ping pong recon buffer*/ 2577*c83a76b0SSuyog Pawar WORD32 is_recon_dumped[MAX_NUM_ENC_LOOP_PARALLEL][IHEVCE_MAX_NUM_BITRATES]; 2578*c83a76b0SSuyog Pawar 2579*c83a76b0SSuyog Pawar /* Flags to keep track of dumped ping pong output buffer*/ 2580*c83a76b0SSuyog Pawar WORD32 is_out_buf_freed[MAX_NUM_ENC_LOOP_PARALLEL][IHEVCE_MAX_NUM_BITRATES]; 2581*c83a76b0SSuyog Pawar 2582*c83a76b0SSuyog Pawar /* flag to produce output buffer by the thread who ever is finishing 2583*c83a76b0SSuyog Pawar enc-loop processing first, so that the entropy thread can start processing */ 2584*c83a76b0SSuyog Pawar WORD32 ai4_produce_outbuf[MAX_NUM_ENC_LOOP_PARALLEL][IHEVCE_MAX_NUM_BITRATES]; 2585*c83a76b0SSuyog Pawar 2586*c83a76b0SSuyog Pawar /* Flags to keep track of dumped ping pong input buffer*/ 2587*c83a76b0SSuyog Pawar WORD32 is_in_buf_freed[MAX_NUM_ENC_LOOP_PARALLEL]; 2588*c83a76b0SSuyog Pawar 2589*c83a76b0SSuyog Pawar /* Flags to keep track of dumped ping pong L0 IPE to enc buffer*/ 2590*c83a76b0SSuyog Pawar WORD32 is_L0_ipe_in_buf_freed[MAX_NUM_ENC_LOOP_PARALLEL]; 2591*c83a76b0SSuyog Pawar 2592*c83a76b0SSuyog Pawar /** Dependency manager for checking whether prev. EncLoop done before 2593*c83a76b0SSuyog Pawar current frame EncLoop starts */ 2594*c83a76b0SSuyog Pawar void *apv_dep_mngr_prev_frame_done[MAX_NUM_ENC_LOOP_PARALLEL]; 2595*c83a76b0SSuyog Pawar 2596*c83a76b0SSuyog Pawar /** Dependency manager for checking whether prev. EncLoop done before 2597*c83a76b0SSuyog Pawar re-encode of the current frame */ 2598*c83a76b0SSuyog Pawar void *pv_dep_mngr_prev_frame_enc_done_for_reenc; 2599*c83a76b0SSuyog Pawar 2600*c83a76b0SSuyog Pawar /** Dependency manager for checking whether prev. me done before 2601*c83a76b0SSuyog Pawar current frame me starts */ 2602*c83a76b0SSuyog Pawar void *apv_dep_mngr_prev_frame_me_done[MAX_NUM_ME_PARALLEL]; 2603*c83a76b0SSuyog Pawar 2604*c83a76b0SSuyog Pawar /** ME coarsest layer JOB queue type */ 2605*c83a76b0SSuyog Pawar WORD32 i4_me_coarsest_lyr_type; 2606*c83a76b0SSuyog Pawar 2607*c83a76b0SSuyog Pawar /** number of encloop frames running in parallel */ 2608*c83a76b0SSuyog Pawar WORD32 i4_num_enc_loop_frm_pllel; 2609*c83a76b0SSuyog Pawar 2610*c83a76b0SSuyog Pawar /** number of me frames running in parallel */ 2611*c83a76b0SSuyog Pawar WORD32 i4_num_me_frm_pllel; 2612*c83a76b0SSuyog Pawar 2613*c83a76b0SSuyog Pawar /*-----------------------------------------------------------------------*/ 2614*c83a76b0SSuyog Pawar /*--------- Params related to pre-enc stage -----------------------------*/ 2615*c83a76b0SSuyog Pawar /*-----------------------------------------------------------------------*/ 2616*c83a76b0SSuyog Pawar 2617*c83a76b0SSuyog Pawar /** Number of processing threads created runtime in pre encode group */ 2618*c83a76b0SSuyog Pawar WORD32 i4_num_pre_enc_proc_thrds; 2619*c83a76b0SSuyog Pawar 2620*c83a76b0SSuyog Pawar /** Number of processing threads active for a given frame 2621*c83a76b0SSuyog Pawar * This value will be monitored at frame level, so as to 2622*c83a76b0SSuyog Pawar * have provsion for increasing / decreasing threads 2623*c83a76b0SSuyog Pawar * based on Load balance b/w stage in encoder 2624*c83a76b0SSuyog Pawar */ 2625*c83a76b0SSuyog Pawar WORD32 i4_num_active_pre_enc_thrds; 2626*c83a76b0SSuyog Pawar /** number of threads that have done processing the current frame 2627*c83a76b0SSuyog Pawar Use to find out the last thread that is coming out of pre-enc processing 2628*c83a76b0SSuyog Pawar so that the last thread can do de-init of pre-enc stage */ 2629*c83a76b0SSuyog Pawar WORD32 ai4_num_thrds_processed_pre_enc[MAX_PRE_ENC_STAGGER + NUM_BUFS_DECOMP_HME]; 2630*c83a76b0SSuyog Pawar 2631*c83a76b0SSuyog Pawar /** number of threads that have done processing the current frame 2632*c83a76b0SSuyog Pawar Use to find out the first thread and last inoder to get qp query. As the query 2633*c83a76b0SSuyog Pawar is not read only , the quer should be done only once by thread that comes first 2634*c83a76b0SSuyog Pawar and other threads should get same value*/ 2635*c83a76b0SSuyog Pawar WORD32 ai4_num_thrds_processed_L0_ipe_qp_init[MAX_PRE_ENC_STAGGER + NUM_BUFS_DECOMP_HME]; 2636*c83a76b0SSuyog Pawar 2637*c83a76b0SSuyog Pawar /** number of threads that have done proessing decomp_intra 2638*c83a76b0SSuyog Pawar Used to find out the last thread that is coming out so that 2639*c83a76b0SSuyog Pawar the last thread can set flag for decomp_pre_intra_finish */ 2640*c83a76b0SSuyog Pawar WORD32 ai4_num_thrds_processed_decomp[MAX_PRE_ENC_STAGGER + NUM_BUFS_DECOMP_HME]; 2641*c83a76b0SSuyog Pawar 2642*c83a76b0SSuyog Pawar /** number of threads that have done proessing coarse_me 2643*c83a76b0SSuyog Pawar Used to find out the last thread that is coming out so that 2644*c83a76b0SSuyog Pawar the last thread can set flag for coarse_me_finish */ 2645*c83a76b0SSuyog Pawar WORD32 ai4_num_thrds_processed_coarse_me[MAX_PRE_ENC_STAGGER + NUM_BUFS_DECOMP_HME]; 2646*c83a76b0SSuyog Pawar 2647*c83a76b0SSuyog Pawar /*Flag to indicate if current instance (frame)'s Decomp_pre_intra and Coarse_ME is done. 2648*c83a76b0SSuyog Pawar Used to check if previous frame is done proecessing decom_pre_intra and coarse_me */ 2649*c83a76b0SSuyog Pawar WORD32 ai4_decomp_coarse_me_complete_flag[MAX_PRE_ENC_STAGGER + NUM_BUFS_DECOMP_HME]; 2650*c83a76b0SSuyog Pawar 2651*c83a76b0SSuyog Pawar /** Dependency manager for checking whether prev. frame decomp_intra 2652*c83a76b0SSuyog Pawar done before current frame decomp_intra starts */ 2653*c83a76b0SSuyog Pawar void *pv_dep_mngr_prev_frame_pre_enc_l1; 2654*c83a76b0SSuyog Pawar 2655*c83a76b0SSuyog Pawar /** Dependency manager for checking whether prev. frame L0 IPE done before 2656*c83a76b0SSuyog Pawar current frame L0 IPE starts */ 2657*c83a76b0SSuyog Pawar void *pv_dep_mngr_prev_frame_pre_enc_l0; 2658*c83a76b0SSuyog Pawar 2659*c83a76b0SSuyog Pawar /** Dependency manager for checking whether prev. frame coarse_me done before 2660*c83a76b0SSuyog Pawar current frame coarse_me starts */ 2661*c83a76b0SSuyog Pawar void *pv_dep_mngr_prev_frame_pre_enc_coarse_me; 2662*c83a76b0SSuyog Pawar 2663*c83a76b0SSuyog Pawar /** flag to indicate if pre_enc_init is done for current frame */ 2664*c83a76b0SSuyog Pawar WORD32 ai4_pre_enc_init_done[MAX_PRE_ENC_STAGGER + NUM_BUFS_DECOMP_HME]; 2665*c83a76b0SSuyog Pawar 2666*c83a76b0SSuyog Pawar /** flag to indicate if pre_enc_hme_init is done for current frame */ 2667*c83a76b0SSuyog Pawar WORD32 ai4_pre_enc_hme_init_done[MAX_PRE_ENC_STAGGER + NUM_BUFS_DECOMP_HME]; 2668*c83a76b0SSuyog Pawar 2669*c83a76b0SSuyog Pawar /** flag to indicate if pre_enc_deinit is done for current frame */ 2670*c83a76b0SSuyog Pawar WORD32 ai4_pre_enc_deinit_done[MAX_PRE_ENC_STAGGER + NUM_BUFS_DECOMP_HME]; 2671*c83a76b0SSuyog Pawar 2672*c83a76b0SSuyog Pawar /** Flag to indicate the end of processing when all the frames are done processing */ 2673*c83a76b0SSuyog Pawar WORD32 ai4_end_flag_pre_enc[MAX_PRE_ENC_STAGGER + NUM_BUFS_DECOMP_HME]; 2674*c83a76b0SSuyog Pawar 2675*c83a76b0SSuyog Pawar /** Flag to indicate the control blocking mode indicating input command to pre-enc 2676*c83a76b0SSuyog Pawar group should be blocking or unblocking */ 2677*c83a76b0SSuyog Pawar WORD32 i4_ctrl_blocking_mode; 2678*c83a76b0SSuyog Pawar 2679*c83a76b0SSuyog Pawar /** Current input pointer */ 2680*c83a76b0SSuyog Pawar ihevce_lap_enc_buf_t *aps_curr_inp_pre_enc[MAX_PRE_ENC_STAGGER + NUM_BUFS_DECOMP_HME]; 2681*c83a76b0SSuyog Pawar 2682*c83a76b0SSuyog Pawar WORD32 i4_last_inp_buf; 2683*c83a76b0SSuyog Pawar 2684*c83a76b0SSuyog Pawar /* buffer id for input buffer */ 2685*c83a76b0SSuyog Pawar WORD32 ai4_in_buf_id_pre_enc[MAX_PRE_ENC_STAGGER + NUM_BUFS_DECOMP_HME]; 2686*c83a76b0SSuyog Pawar 2687*c83a76b0SSuyog Pawar /** Current output pointer */ 2688*c83a76b0SSuyog Pawar pre_enc_me_ctxt_t *aps_curr_out_pre_enc[MAX_PRE_ENC_STAGGER + NUM_BUFS_DECOMP_HME]; 2689*c83a76b0SSuyog Pawar 2690*c83a76b0SSuyog Pawar /*Current L0 IPE to enc output pointer */ 2691*c83a76b0SSuyog Pawar pre_enc_L0_ipe_encloop_ctxt_t *ps_L0_IPE_curr_out_pre_enc; 2692*c83a76b0SSuyog Pawar 2693*c83a76b0SSuyog Pawar /** buffer id for output buffer */ 2694*c83a76b0SSuyog Pawar WORD32 ai4_out_buf_id_pre_enc[MAX_PRE_ENC_STAGGER + NUM_BUFS_DECOMP_HME]; 2695*c83a76b0SSuyog Pawar 2696*c83a76b0SSuyog Pawar /** buffer id for L0 IPE enc buffer*/ 2697*c83a76b0SSuyog Pawar WORD32 i4_L0_IPE_out_buf_id; 2698*c83a76b0SSuyog Pawar 2699*c83a76b0SSuyog Pawar /** Current picture Qp */ 2700*c83a76b0SSuyog Pawar WORD32 ai4_cur_frame_qp_pre_enc[MAX_PRE_ENC_STAGGER + NUM_BUFS_DECOMP_HME]; 2701*c83a76b0SSuyog Pawar 2702*c83a76b0SSuyog Pawar /** Decomp layer buffers indicies */ 2703*c83a76b0SSuyog Pawar WORD32 ai4_decomp_lyr_buf_idx[MAX_PRE_ENC_STAGGER + NUM_BUFS_DECOMP_HME]; 2704*c83a76b0SSuyog Pawar 2705*c83a76b0SSuyog Pawar /*since it is guranteed that cur frame ipe will not start unless prev frame ipe is completly done, 2706*c83a76b0SSuyog Pawar an array of MAX_PRE_ENC_STAGGER might not be required*/ 2707*c83a76b0SSuyog Pawar WORD32 i4_qp_update_l0_ipe; 2708*c83a76b0SSuyog Pawar 2709*c83a76b0SSuyog Pawar /** Current picture encoded is the last picture to be encoded flag */ 2710*c83a76b0SSuyog Pawar WORD32 i4_last_pic_flag; 2711*c83a76b0SSuyog Pawar 2712*c83a76b0SSuyog Pawar /** Mutex for ensuring thread safety of the access of Job queues in decomp stage */ 2713*c83a76b0SSuyog Pawar void *pv_job_q_mutex_hdl_pre_enc_decomp; 2714*c83a76b0SSuyog Pawar 2715*c83a76b0SSuyog Pawar /** Mutex for ensuring thread safety of the access of Job queues in HME group */ 2716*c83a76b0SSuyog Pawar void *pv_job_q_mutex_hdl_pre_enc_hme; 2717*c83a76b0SSuyog Pawar 2718*c83a76b0SSuyog Pawar /** Mutex for ensuring thread safety of the access of Job queues in l0 ipe stage */ 2719*c83a76b0SSuyog Pawar void *pv_job_q_mutex_hdl_pre_enc_l0ipe; 2720*c83a76b0SSuyog Pawar 2721*c83a76b0SSuyog Pawar /** mutex handle for pre-enc init */ 2722*c83a76b0SSuyog Pawar void *pv_mutex_hdl_pre_enc_init; 2723*c83a76b0SSuyog Pawar 2724*c83a76b0SSuyog Pawar /** mutex handle for pre-enc decomp deinit */ 2725*c83a76b0SSuyog Pawar void *pv_mutex_hdl_pre_enc_decomp_deinit; 2726*c83a76b0SSuyog Pawar 2727*c83a76b0SSuyog Pawar /** mutex handle for pre enc hme init */ 2728*c83a76b0SSuyog Pawar void *pv_mutex_hdl_pre_enc_hme_init; 2729*c83a76b0SSuyog Pawar 2730*c83a76b0SSuyog Pawar /** mutex handle for pre-enc hme deinit */ 2731*c83a76b0SSuyog Pawar void *pv_mutex_hdl_pre_enc_hme_deinit; 2732*c83a76b0SSuyog Pawar 2733*c83a76b0SSuyog Pawar /*qp qurey before l0 ipe is done by multiple frame*/ 2734*c83a76b0SSuyog Pawar /** mutex handle for L0 ipe(pre-enc init)*/ 2735*c83a76b0SSuyog Pawar void *pv_mutex_hdl_l0_ipe_init; 2736*c83a76b0SSuyog Pawar 2737*c83a76b0SSuyog Pawar /** mutex handle for pre-enc deinit */ 2738*c83a76b0SSuyog Pawar void *pv_mutex_hdl_pre_enc_deinit; 2739*c83a76b0SSuyog Pawar 2740*c83a76b0SSuyog Pawar /** Array of Semaphore handles (for each frame processing threads ) */ 2741*c83a76b0SSuyog Pawar void *apv_pre_enc_thrd_sem_handle[MAX_NUM_FRM_PROC_THRDS_ENC]; 2742*c83a76b0SSuyog Pawar /** array which will tell the number of CTB processed in each row, 2743*c83a76b0SSuyog Pawar * used for Row level sync in IPE pass 2744*c83a76b0SSuyog Pawar */ 2745*c83a76b0SSuyog Pawar WORD32 ai4_ctbs_in_row_proc_ipe_pass[MAX_NUM_CTB_ROWS_FRM]; 2746*c83a76b0SSuyog Pawar 2747*c83a76b0SSuyog Pawar /** Job Queue Memory pre encode */ 2748*c83a76b0SSuyog Pawar job_queue_t *aps_job_q_pre_enc[MAX_PRE_ENC_STAGGER + NUM_BUFS_DECOMP_HME]; 2749*c83a76b0SSuyog Pawar 2750*c83a76b0SSuyog Pawar /** Array of Job Queue handles enc group */ 2751*c83a76b0SSuyog Pawar job_queue_handle_t as_job_que_preenc_hdls[MAX_PRE_ENC_STAGGER + NUM_BUFS_DECOMP_HME] 2752*c83a76b0SSuyog Pawar [NUM_PRE_ENC_JOBS_QUES]; 2753*c83a76b0SSuyog Pawar 2754*c83a76b0SSuyog Pawar /* accumulate intra sad across all thread to get qp before L0 IPE*/ 2755*c83a76b0SSuyog Pawar WORD32 ai4_intra_satd_acc[MAX_PRE_ENC_STAGGER + NUM_BUFS_DECOMP_HME] 2756*c83a76b0SSuyog Pawar [MAX_NUM_FRM_PROC_THRDS_PRE_ENC]; 2757*c83a76b0SSuyog Pawar 2758*c83a76b0SSuyog Pawar WORD32 i4_delay_pre_me_btw_l0_ipe; 2759*c83a76b0SSuyog Pawar 2760*c83a76b0SSuyog Pawar /*** This variable has the maximum delay between hme and l0ipe ***/ 2761*c83a76b0SSuyog Pawar /*** This is used for wrapping around L0IPE index ***/ 2762*c83a76b0SSuyog Pawar WORD32 i4_max_delay_pre_me_btw_l0_ipe; 2763*c83a76b0SSuyog Pawar 2764*c83a76b0SSuyog Pawar /* This is to register the handles of Dep Mngr b/w EncLoop and ME */ 2765*c83a76b0SSuyog Pawar /* This is used to delete the Mngr at the end */ 2766*c83a76b0SSuyog Pawar void *apv_dep_mngr_encloop_dep_me[NUM_ME_ENC_BUFS]; 2767*c83a76b0SSuyog Pawar /*flag to track buffer in me/enc que is produced or not*/ 2768*c83a76b0SSuyog Pawar WORD32 ai4_me_enc_buff_prod_flag[NUM_ME_ENC_BUFS]; 2769*c83a76b0SSuyog Pawar 2770*c83a76b0SSuyog Pawar /*out buf que id for me */ 2771*c83a76b0SSuyog Pawar WORD32 ai4_me_out_buf_id[NUM_ME_ENC_BUFS]; 2772*c83a76b0SSuyog Pawar 2773*c83a76b0SSuyog Pawar /*in buf que id for enc from me*/ 2774*c83a76b0SSuyog Pawar WORD32 i4_enc_in_buf_id[NUM_ME_ENC_BUFS]; 2775*c83a76b0SSuyog Pawar 2776*c83a76b0SSuyog Pawar /* This is used to tell whether the free of recon buffers are done or not */ 2777*c83a76b0SSuyog Pawar WORD32 i4_is_recon_free_done; 2778*c83a76b0SSuyog Pawar 2779*c83a76b0SSuyog Pawar /* index for DVSR population */ 2780*c83a76b0SSuyog Pawar WORD32 i4_idx_dvsr_p; 2781*c83a76b0SSuyog Pawar WORD32 aai4_l1_pre_intra_done[MAX_PRE_ENC_STAGGER + NUM_BUFS_DECOMP_HME] 2782*c83a76b0SSuyog Pawar [(HEVCE_MAX_HEIGHT >> 1) / 8]; 2783*c83a76b0SSuyog Pawar 2784*c83a76b0SSuyog Pawar WORD32 i4_rc_l0_qp; 2785*c83a76b0SSuyog Pawar 2786*c83a76b0SSuyog Pawar /* Used for mres single out cases. Checks whether a particular resolution is active or passive */ 2787*c83a76b0SSuyog Pawar /* Only one resolution should be active for mres_single_out case */ 2788*c83a76b0SSuyog Pawar WORD32 *pi4_active_res_id; 2789*c83a76b0SSuyog Pawar 2790*c83a76b0SSuyog Pawar /** 2791*c83a76b0SSuyog Pawar * Sub Pic bit control mutex lock handle 2792*c83a76b0SSuyog Pawar */ 2793*c83a76b0SSuyog Pawar void *pv_sub_pic_rc_mutex_lock_hdl; 2794*c83a76b0SSuyog Pawar 2795*c83a76b0SSuyog Pawar void *pv_sub_pic_rc_for_qp_update_mutex_lock_hdl; 2796*c83a76b0SSuyog Pawar 2797*c83a76b0SSuyog Pawar WORD32 i4_encode; 2798*c83a76b0SSuyog Pawar WORD32 i4_in_frame_rc_enabled; 2799*c83a76b0SSuyog Pawar WORD32 i4_num_re_enc; 2800*c83a76b0SSuyog Pawar 2801*c83a76b0SSuyog Pawar } multi_thrd_ctxt_t; 2802*c83a76b0SSuyog Pawar 2803*c83a76b0SSuyog Pawar /** 2804*c83a76b0SSuyog Pawar * @brief Structure to describe tile params 2805*c83a76b0SSuyog Pawar */ 2806*c83a76b0SSuyog Pawar typedef struct 2807*c83a76b0SSuyog Pawar { 2808*c83a76b0SSuyog Pawar /* flag to indicate tile encoding enabled/disabled */ 2809*c83a76b0SSuyog Pawar WORD32 i4_tiles_enabled_flag; 2810*c83a76b0SSuyog Pawar 2811*c83a76b0SSuyog Pawar /* flag to indicate unifrom spacing of tiles */ 2812*c83a76b0SSuyog Pawar WORD32 i4_uniform_spacing_flag; 2813*c83a76b0SSuyog Pawar 2814*c83a76b0SSuyog Pawar /* num tiles in a tile-row. num tiles in tile-col */ 2815*c83a76b0SSuyog Pawar WORD32 i4_num_tile_cols; 2816*c83a76b0SSuyog Pawar WORD32 i4_num_tile_rows; 2817*c83a76b0SSuyog Pawar 2818*c83a76b0SSuyog Pawar /* Curr tile width and height*/ 2819*c83a76b0SSuyog Pawar WORD32 i4_curr_tile_width; 2820*c83a76b0SSuyog Pawar WORD32 i4_curr_tile_height; 2821*c83a76b0SSuyog Pawar 2822*c83a76b0SSuyog Pawar /* Curr tile width and heignt in CTB units*/ 2823*c83a76b0SSuyog Pawar WORD32 i4_curr_tile_wd_in_ctb_unit; 2824*c83a76b0SSuyog Pawar WORD32 i4_curr_tile_ht_in_ctb_unit; 2825*c83a76b0SSuyog Pawar 2826*c83a76b0SSuyog Pawar /* frame resolution */ 2827*c83a76b0SSuyog Pawar //WORD32 i4_frame_width; /* encode-width */ 2828*c83a76b0SSuyog Pawar //WORD32 i4_frame_height; /* encode-height */ 2829*c83a76b0SSuyog Pawar 2830*c83a76b0SSuyog Pawar /* total num of tiles "in frame" */ 2831*c83a76b0SSuyog Pawar WORD32 i4_num_tiles; 2832*c83a76b0SSuyog Pawar 2833*c83a76b0SSuyog Pawar /* Curr tile id. Assigned by raster scan order in a frame */ 2834*c83a76b0SSuyog Pawar WORD32 i4_curr_tile_id; 2835*c83a76b0SSuyog Pawar 2836*c83a76b0SSuyog Pawar /* x-pos of first ctb of the slice in ctb */ 2837*c83a76b0SSuyog Pawar /* y-pos of first ctb of the slice in ctb */ 2838*c83a76b0SSuyog Pawar WORD32 i4_first_ctb_x; 2839*c83a76b0SSuyog Pawar WORD32 i4_first_ctb_y; 2840*c83a76b0SSuyog Pawar 2841*c83a76b0SSuyog Pawar /* x-pos of first ctb of the slice in samples */ 2842*c83a76b0SSuyog Pawar /* y-pos of first ctb of the slice in samples */ 2843*c83a76b0SSuyog Pawar WORD32 i4_first_sample_x; 2844*c83a76b0SSuyog Pawar WORD32 i4_first_sample_y; 2845*c83a76b0SSuyog Pawar 2846*c83a76b0SSuyog Pawar } ihevce_tile_params_t; 2847*c83a76b0SSuyog Pawar 2848*c83a76b0SSuyog Pawar /** 2849*c83a76b0SSuyog Pawar ****************************************************************************** 2850*c83a76b0SSuyog Pawar * @brief Encoder context structure 2851*c83a76b0SSuyog Pawar ****************************************************************************** 2852*c83a76b0SSuyog Pawar */ 2853*c83a76b0SSuyog Pawar 2854*c83a76b0SSuyog Pawar typedef struct 2855*c83a76b0SSuyog Pawar { 2856*c83a76b0SSuyog Pawar /** 2857*c83a76b0SSuyog Pawar * vps parameters 2858*c83a76b0SSuyog Pawar */ 2859*c83a76b0SSuyog Pawar vps_t as_vps[IHEVCE_MAX_NUM_BITRATES]; 2860*c83a76b0SSuyog Pawar 2861*c83a76b0SSuyog Pawar /** 2862*c83a76b0SSuyog Pawar * sps parameters 2863*c83a76b0SSuyog Pawar */ 2864*c83a76b0SSuyog Pawar sps_t as_sps[IHEVCE_MAX_NUM_BITRATES]; 2865*c83a76b0SSuyog Pawar 2866*c83a76b0SSuyog Pawar /** 2867*c83a76b0SSuyog Pawar * pps parameters 2868*c83a76b0SSuyog Pawar * Required for each bitrate separately, mainly because 2869*c83a76b0SSuyog Pawar * init qp etc parameters needs to be different for each instance 2870*c83a76b0SSuyog Pawar */ 2871*c83a76b0SSuyog Pawar pps_t as_pps[IHEVCE_MAX_NUM_BITRATES]; 2872*c83a76b0SSuyog Pawar 2873*c83a76b0SSuyog Pawar /** 2874*c83a76b0SSuyog Pawar * Rate control mutex lock handle 2875*c83a76b0SSuyog Pawar */ 2876*c83a76b0SSuyog Pawar void *pv_rc_mutex_lock_hdl; 2877*c83a76b0SSuyog Pawar 2878*c83a76b0SSuyog Pawar /** frame level cu analyse buffer pointer for ME 2879*c83a76b0SSuyog Pawar * ME will get ps_ctb_analyse structure populated with ps_cu pointers 2880*c83a76b0SSuyog Pawar * pointing to ps_cu_analyse buffer from IPE. 2881*c83a76b0SSuyog Pawar */ 2882*c83a76b0SSuyog Pawar //cu_analyse_t *ps_cu_analyse_inter[PING_PONG_BUF]; 2883*c83a76b0SSuyog Pawar 2884*c83a76b0SSuyog Pawar /** 2885*c83a76b0SSuyog Pawar * CTB frame context between encoder (producer) and entropy (consumer) 2886*c83a76b0SSuyog Pawar */ 2887*c83a76b0SSuyog Pawar enc_q_ctxt_t s_enc_ques; 2888*c83a76b0SSuyog Pawar 2889*c83a76b0SSuyog Pawar /** 2890*c83a76b0SSuyog Pawar * Encoder memory manager ctxt 2891*c83a76b0SSuyog Pawar */ 2892*c83a76b0SSuyog Pawar enc_mem_mngr_ctxt s_mem_mngr; 2893*c83a76b0SSuyog Pawar 2894*c83a76b0SSuyog Pawar /** 2895*c83a76b0SSuyog Pawar * Semaphores of all the threads created in HLE 2896*c83a76b0SSuyog Pawar * and Que handle for buffers b/w frame process and entropy 2897*c83a76b0SSuyog Pawar */ 2898*c83a76b0SSuyog Pawar thrd_que_sem_hdl_t s_thrd_sem_ctxt; 2899*c83a76b0SSuyog Pawar 2900*c83a76b0SSuyog Pawar /** 2901*c83a76b0SSuyog Pawar * Reference /recon buffer Que pointer 2902*c83a76b0SSuyog Pawar */ 2903*c83a76b0SSuyog Pawar recon_pic_buf_t **pps_recon_buf_q[IHEVCE_MAX_NUM_BITRATES]; 2904*c83a76b0SSuyog Pawar 2905*c83a76b0SSuyog Pawar /** 2906*c83a76b0SSuyog Pawar * Number of buffers in Recon buffer queue 2907*c83a76b0SSuyog Pawar */ 2908*c83a76b0SSuyog Pawar WORD32 ai4_num_buf_recon_q[IHEVCE_MAX_NUM_BITRATES]; 2909*c83a76b0SSuyog Pawar 2910*c83a76b0SSuyog Pawar /** 2911*c83a76b0SSuyog Pawar * Reference / recon buffer Que pointer for Pre Encode group 2912*c83a76b0SSuyog Pawar * this will be just a container and no buffers will be allcoated 2913*c83a76b0SSuyog Pawar */ 2914*c83a76b0SSuyog Pawar recon_pic_buf_t **pps_pre_enc_recon_buf_q; 2915*c83a76b0SSuyog Pawar 2916*c83a76b0SSuyog Pawar /** 2917*c83a76b0SSuyog Pawar * Number of buffers in Recon buffer queue 2918*c83a76b0SSuyog Pawar */ 2919*c83a76b0SSuyog Pawar WORD32 i4_pre_enc_num_buf_recon_q; 2920*c83a76b0SSuyog Pawar 2921*c83a76b0SSuyog Pawar /** 2922*c83a76b0SSuyog Pawar * frame level CTB parameters and worst PU CU and TU in a CTB row 2923*c83a76b0SSuyog Pawar */ 2924*c83a76b0SSuyog Pawar frm_ctb_ctxt_t s_frm_ctb_prms; 2925*c83a76b0SSuyog Pawar 2926*c83a76b0SSuyog Pawar /* 2927*c83a76b0SSuyog Pawar * Moudle ctxt pointers of all modules 2928*c83a76b0SSuyog Pawar */ 2929*c83a76b0SSuyog Pawar module_ctxt_t s_module_ctxt; 2930*c83a76b0SSuyog Pawar 2931*c83a76b0SSuyog Pawar /* 2932*c83a76b0SSuyog Pawar * LAP static parameters 2933*c83a76b0SSuyog Pawar */ 2934*c83a76b0SSuyog Pawar ihevce_lap_static_params_t s_lap_stat_prms; 2935*c83a76b0SSuyog Pawar 2936*c83a76b0SSuyog Pawar /* 2937*c83a76b0SSuyog Pawar * Run time dynamic source params 2938*c83a76b0SSuyog Pawar */ 2939*c83a76b0SSuyog Pawar 2940*c83a76b0SSuyog Pawar ihevce_src_params_t s_runtime_src_prms; 2941*c83a76b0SSuyog Pawar 2942*c83a76b0SSuyog Pawar /* 2943*c83a76b0SSuyog Pawar *Target params 2944*c83a76b0SSuyog Pawar */ 2945*c83a76b0SSuyog Pawar ihevce_tgt_params_t s_runtime_tgt_params; 2946*c83a76b0SSuyog Pawar 2947*c83a76b0SSuyog Pawar /* 2948*c83a76b0SSuyog Pawar * Run time dynamic coding params 2949*c83a76b0SSuyog Pawar */ 2950*c83a76b0SSuyog Pawar ihevce_coding_params_t s_runtime_coding_prms; 2951*c83a76b0SSuyog Pawar 2952*c83a76b0SSuyog Pawar /** 2953*c83a76b0SSuyog Pawar * Pointer to static config params 2954*c83a76b0SSuyog Pawar */ 2955*c83a76b0SSuyog Pawar ihevce_static_cfg_params_t *ps_stat_prms; 2956*c83a76b0SSuyog Pawar 2957*c83a76b0SSuyog Pawar /** 2958*c83a76b0SSuyog Pawar * the following structure members used for copying recon buf info 2959*c83a76b0SSuyog Pawar * in case of duplicate pics 2960*c83a76b0SSuyog Pawar */ 2961*c83a76b0SSuyog Pawar 2962*c83a76b0SSuyog Pawar /** 2963*c83a76b0SSuyog Pawar * Array of reference picture list for pre enc group 2964*c83a76b0SSuyog Pawar * Separate list for ping_pong instnaces 2965*c83a76b0SSuyog Pawar * 2=> ref_pic_list0 and ref_pic_list1 2966*c83a76b0SSuyog Pawar */ 2967*c83a76b0SSuyog Pawar recon_pic_buf_t as_pre_enc_ref_lists[MAX_PRE_ENC_STAGGER + NUM_BUFS_DECOMP_HME][2] 2968*c83a76b0SSuyog Pawar [HEVCE_MAX_REF_PICS * 2]; 2969*c83a76b0SSuyog Pawar 2970*c83a76b0SSuyog Pawar /** 2971*c83a76b0SSuyog Pawar * Array of reference picture list for pre enc group 2972*c83a76b0SSuyog Pawar * Separate list for ping_pong instnaces 2973*c83a76b0SSuyog Pawar * 2=> ref_pic_list0 and ref_pic_list1 2974*c83a76b0SSuyog Pawar */ 2975*c83a76b0SSuyog Pawar recon_pic_buf_t *aps_pre_enc_ref_lists[MAX_PRE_ENC_STAGGER + NUM_BUFS_DECOMP_HME][2] 2976*c83a76b0SSuyog Pawar [HEVCE_MAX_REF_PICS * 2]; 2977*c83a76b0SSuyog Pawar 2978*c83a76b0SSuyog Pawar /** 2979*c83a76b0SSuyog Pawar * Number of input frames per input queue 2980*c83a76b0SSuyog Pawar */ 2981*c83a76b0SSuyog Pawar WORD32 i4_num_input_buf_per_queue; 2982*c83a76b0SSuyog Pawar 2983*c83a76b0SSuyog Pawar /** 2984*c83a76b0SSuyog Pawar * poc of the Clean Random Access(CRA)Ipic 2985*c83a76b0SSuyog Pawar */ 2986*c83a76b0SSuyog Pawar WORD32 i4_cra_poc; 2987*c83a76b0SSuyog Pawar 2988*c83a76b0SSuyog Pawar /** Number of ref pics in list 0 for any given frame */ 2989*c83a76b0SSuyog Pawar WORD32 i4_num_ref_l0; 2990*c83a76b0SSuyog Pawar 2991*c83a76b0SSuyog Pawar /** Number of ref pics in list 1 for any given frame */ 2992*c83a76b0SSuyog Pawar WORD32 i4_num_ref_l1; 2993*c83a76b0SSuyog Pawar 2994*c83a76b0SSuyog Pawar /** Number of active ref pics in list 0 for cur frame */ 2995*c83a76b0SSuyog Pawar WORD32 i4_num_ref_l0_active; 2996*c83a76b0SSuyog Pawar 2997*c83a76b0SSuyog Pawar /** Number of active ref pics in list 1 for cur frame */ 2998*c83a76b0SSuyog Pawar WORD32 i4_num_ref_l1_active; 2999*c83a76b0SSuyog Pawar 3000*c83a76b0SSuyog Pawar /** Number of ref pics in list 0 for any given frame pre encode stage */ 3001*c83a76b0SSuyog Pawar WORD32 i4_pre_enc_num_ref_l0; 3002*c83a76b0SSuyog Pawar 3003*c83a76b0SSuyog Pawar /** Number of ref pics in list 1 for any given frame pre encode stage */ 3004*c83a76b0SSuyog Pawar WORD32 i4_pre_enc_num_ref_l1; 3005*c83a76b0SSuyog Pawar 3006*c83a76b0SSuyog Pawar /** Number of active ref pics in list 0 for cur frame pre encode stage */ 3007*c83a76b0SSuyog Pawar WORD32 i4_pre_enc_num_ref_l0_active; 3008*c83a76b0SSuyog Pawar 3009*c83a76b0SSuyog Pawar /** Number of active ref pics in list 1 for cur frame pre encode stage */ 3010*c83a76b0SSuyog Pawar WORD32 i4_pre_enc_num_ref_l1_active; 3011*c83a76b0SSuyog Pawar 3012*c83a76b0SSuyog Pawar /** 3013*c83a76b0SSuyog Pawar * working mem to be used for frm level activities 3014*c83a76b0SSuyog Pawar * One example is interplation at frame level. This requires memory 3015*c83a76b0SSuyog Pawar * of (max width + 16) * (max_height + 7 + 16 ) * 2 bytes. 3016*c83a76b0SSuyog Pawar * This is so since we generate interp output for max_width + 16 x 3017*c83a76b0SSuyog Pawar * max_height + 16, and then the intermediate output is 16 bit and 3018*c83a76b0SSuyog Pawar * is max_height + 16 + 7 rows 3019*c83a76b0SSuyog Pawar */ 3020*c83a76b0SSuyog Pawar UWORD8 *pu1_frm_lvl_wkg_mem; 3021*c83a76b0SSuyog Pawar 3022*c83a76b0SSuyog Pawar /** 3023*c83a76b0SSuyog Pawar * Multi thread processing context 3024*c83a76b0SSuyog Pawar * This memory contains the variables and pointers shared across threads 3025*c83a76b0SSuyog Pawar * in enc-group and pre-enc-group 3026*c83a76b0SSuyog Pawar */ 3027*c83a76b0SSuyog Pawar multi_thrd_ctxt_t s_multi_thrd; 3028*c83a76b0SSuyog Pawar 3029*c83a76b0SSuyog Pawar /** I/O Queues created status */ 3030*c83a76b0SSuyog Pawar WORD32 i4_io_queues_created; 3031*c83a76b0SSuyog Pawar 3032*c83a76b0SSuyog Pawar WORD32 i4_end_flag; 3033*c83a76b0SSuyog Pawar 3034*c83a76b0SSuyog Pawar /** number of bit-rate instances running */ 3035*c83a76b0SSuyog Pawar WORD32 i4_num_bitrates; 3036*c83a76b0SSuyog Pawar 3037*c83a76b0SSuyog Pawar /** number of enc frames running in parallel */ 3038*c83a76b0SSuyog Pawar WORD32 i4_num_enc_loop_frm_pllel; 3039*c83a76b0SSuyog Pawar 3040*c83a76b0SSuyog Pawar /*ref bitrate id*/ 3041*c83a76b0SSuyog Pawar WORD32 i4_ref_mbr_id; 3042*c83a76b0SSuyog Pawar 3043*c83a76b0SSuyog Pawar /* Flag to indicate app, that end of processing has reached */ 3044*c83a76b0SSuyog Pawar WORD32 i4_frame_limit_reached; 3045*c83a76b0SSuyog Pawar 3046*c83a76b0SSuyog Pawar /*Structure to store the function selector 3047*c83a76b0SSuyog Pawar * pointers for common and encoder */ 3048*c83a76b0SSuyog Pawar func_selector_t s_func_selector; 3049*c83a76b0SSuyog Pawar 3050*c83a76b0SSuyog Pawar /*ref resolution id*/ 3051*c83a76b0SSuyog Pawar WORD32 i4_resolution_id; 3052*c83a76b0SSuyog Pawar 3053*c83a76b0SSuyog Pawar /*hle context*/ 3054*c83a76b0SSuyog Pawar void *pv_hle_ctxt; 3055*c83a76b0SSuyog Pawar 3056*c83a76b0SSuyog Pawar rc_quant_t s_rc_quant; 3057*c83a76b0SSuyog Pawar /*ME cost of P pic stored for the next ref B pic*/ 3058*c83a76b0SSuyog Pawar //LWORD64 i8_acc_me_cost_of_p_pic_for_b_pic[2]; 3059*c83a76b0SSuyog Pawar 3060*c83a76b0SSuyog Pawar UWORD32 u4_cur_pic_encode_cnt; 3061*c83a76b0SSuyog Pawar UWORD32 u4_cur_pic_encode_cnt_dbp; 3062*c83a76b0SSuyog Pawar /*past 2 p pics high complexity status*/ 3063*c83a76b0SSuyog Pawar WORD32 ai4_is_past_pic_complex[2]; 3064*c83a76b0SSuyog Pawar 3065*c83a76b0SSuyog Pawar WORD32 i4_is_I_reset_done; 3066*c83a76b0SSuyog Pawar WORD32 i4_past_RC_reset_count; 3067*c83a76b0SSuyog Pawar 3068*c83a76b0SSuyog Pawar WORD32 i4_future_RC_reset; 3069*c83a76b0SSuyog Pawar 3070*c83a76b0SSuyog Pawar WORD32 i4_past_RC_scd_reset_count; 3071*c83a76b0SSuyog Pawar 3072*c83a76b0SSuyog Pawar WORD32 i4_future_RC_scd_reset; 3073*c83a76b0SSuyog Pawar WORD32 i4_poc_reset_values; 3074*c83a76b0SSuyog Pawar 3075*c83a76b0SSuyog Pawar /*Place holder to store the length of LAP in first pass*/ 3076*c83a76b0SSuyog Pawar /** Number of frames to look-ahead for RC by - 3077*c83a76b0SSuyog Pawar * counts 2 fields as one frame for interlaced 3078*c83a76b0SSuyog Pawar */ 3079*c83a76b0SSuyog Pawar WORD32 i4_look_ahead_frames_in_first_pass; 3080*c83a76b0SSuyog Pawar 3081*c83a76b0SSuyog Pawar WORD32 ai4_mod_factor_derived_by_variance[2]; 3082*c83a76b0SSuyog Pawar float f_strength; 3083*c83a76b0SSuyog Pawar 3084*c83a76b0SSuyog Pawar /*for B frames use the avg activity 3085*c83a76b0SSuyog Pawar from the layer 0 (I or P) which is the average over 3086*c83a76b0SSuyog Pawar Lap2 window*/ 3087*c83a76b0SSuyog Pawar LWORD64 ai8_lap2_8x8_avg_act_from_T0[2]; 3088*c83a76b0SSuyog Pawar 3089*c83a76b0SSuyog Pawar LWORD64 ai8_lap2_16x16_avg_act_from_T0[3]; 3090*c83a76b0SSuyog Pawar 3091*c83a76b0SSuyog Pawar LWORD64 ai8_lap2_32x32_avg_act_from_T0[3]; 3092*c83a76b0SSuyog Pawar 3093*c83a76b0SSuyog Pawar /*for B frames use the log of avg activity 3094*c83a76b0SSuyog Pawar from the layer 0 (I or P) which is the average over 3095*c83a76b0SSuyog Pawar Lap2 window*/ 3096*c83a76b0SSuyog Pawar long double ald_lap2_8x8_log_avg_act_from_T0[2]; 3097*c83a76b0SSuyog Pawar 3098*c83a76b0SSuyog Pawar long double ald_lap2_16x16_log_avg_act_from_T0[3]; 3099*c83a76b0SSuyog Pawar 3100*c83a76b0SSuyog Pawar long double ald_lap2_32x32_log_avg_act_from_T0[3]; 3101*c83a76b0SSuyog Pawar 3102*c83a76b0SSuyog Pawar ihevce_tile_params_t *ps_tile_params_base; 3103*c83a76b0SSuyog Pawar 3104*c83a76b0SSuyog Pawar WORD32 ai4_column_width_array[MAX_TILE_COLUMNS]; 3105*c83a76b0SSuyog Pawar 3106*c83a76b0SSuyog Pawar WORD32 ai4_row_height_array[MAX_TILE_ROWS]; 3107*c83a76b0SSuyog Pawar 3108*c83a76b0SSuyog Pawar /* Architecture */ 3109*c83a76b0SSuyog Pawar IV_ARCH_T e_arch_type; 3110*c83a76b0SSuyog Pawar 3111*c83a76b0SSuyog Pawar UWORD8 u1_is_popcnt_available; 3112*c83a76b0SSuyog Pawar 3113*c83a76b0SSuyog Pawar WORD32 i4_active_scene_num; 3114*c83a76b0SSuyog Pawar 3115*c83a76b0SSuyog Pawar WORD32 i4_max_fr_enc_loop_parallel_rc; 3116*c83a76b0SSuyog Pawar WORD32 ai4_rc_query[IHEVCE_MAX_NUM_BITRATES]; 3117*c83a76b0SSuyog Pawar WORD32 i4_active_enc_frame_id; 3118*c83a76b0SSuyog Pawar 3119*c83a76b0SSuyog Pawar /** 3120*c83a76b0SSuyog Pawar * LAP interface ctxt pointer 3121*c83a76b0SSuyog Pawar */ 3122*c83a76b0SSuyog Pawar void *pv_lap_interface_ctxt; 3123*c83a76b0SSuyog Pawar 3124*c83a76b0SSuyog Pawar /* If enable, enables blu ray compatibility of op*/ 3125*c83a76b0SSuyog Pawar WORD32 i4_blu_ray_spec; 3126*c83a76b0SSuyog Pawar 3127*c83a76b0SSuyog Pawar } enc_ctxt_t; 3128*c83a76b0SSuyog Pawar 3129*c83a76b0SSuyog Pawar /** 3130*c83a76b0SSuyog Pawar ****************************************************************************** 3131*c83a76b0SSuyog Pawar * @brief This struct contains the inter CTB params needed for the decision 3132*c83a76b0SSuyog Pawar * of the best inter CU results 3133*c83a76b0SSuyog Pawar ****************************************************************************** 3134*c83a76b0SSuyog Pawar */ 3135*c83a76b0SSuyog Pawar typedef struct 3136*c83a76b0SSuyog Pawar { 3137*c83a76b0SSuyog Pawar hme_pred_buf_mngr_t s_pred_buf_mngr; 3138*c83a76b0SSuyog Pawar 3139*c83a76b0SSuyog Pawar /** X and y offset of ctb w.r.t. start of pic */ 3140*c83a76b0SSuyog Pawar WORD32 i4_ctb_x_off; 3141*c83a76b0SSuyog Pawar WORD32 i4_ctb_y_off; 3142*c83a76b0SSuyog Pawar 3143*c83a76b0SSuyog Pawar /** 3144*c83a76b0SSuyog Pawar * Pred buffer ptr, updated inside subpel refinement process. This 3145*c83a76b0SSuyog Pawar * location passed to the leaf fxn for copying the winner pred buf 3146*c83a76b0SSuyog Pawar */ 3147*c83a76b0SSuyog Pawar UWORD8 **ppu1_pred; 3148*c83a76b0SSuyog Pawar 3149*c83a76b0SSuyog Pawar /** Working mem passed to leaf fxns */ 3150*c83a76b0SSuyog Pawar UWORD8 *pu1_wkg_mem; 3151*c83a76b0SSuyog Pawar 3152*c83a76b0SSuyog Pawar /** prediction buffer stride fo rleaf fxns to copy the pred winner buf */ 3153*c83a76b0SSuyog Pawar WORD32 i4_pred_stride; 3154*c83a76b0SSuyog Pawar 3155*c83a76b0SSuyog Pawar /** Stride of input buf, updated inside subpel fxn */ 3156*c83a76b0SSuyog Pawar WORD32 i4_inp_stride; 3157*c83a76b0SSuyog Pawar 3158*c83a76b0SSuyog Pawar /** stride of recon buffer */ 3159*c83a76b0SSuyog Pawar WORD32 i4_rec_stride; 3160*c83a76b0SSuyog Pawar 3161*c83a76b0SSuyog Pawar /** Indicates if bi dir is enabled or not */ 3162*c83a76b0SSuyog Pawar WORD32 i4_bidir_enabled; 3163*c83a76b0SSuyog Pawar 3164*c83a76b0SSuyog Pawar /** 3165*c83a76b0SSuyog Pawar * Total number of references of current picture which is enocded 3166*c83a76b0SSuyog Pawar */ 3167*c83a76b0SSuyog Pawar UWORD8 u1_num_ref; 3168*c83a76b0SSuyog Pawar 3169*c83a76b0SSuyog Pawar /** Recon Pic buffer pointers for L0 list */ 3170*c83a76b0SSuyog Pawar recon_pic_buf_t **pps_rec_list_l0; 3171*c83a76b0SSuyog Pawar 3172*c83a76b0SSuyog Pawar /** Recon Pic buffer pointers for L1 list */ 3173*c83a76b0SSuyog Pawar recon_pic_buf_t **pps_rec_list_l1; 3174*c83a76b0SSuyog Pawar 3175*c83a76b0SSuyog Pawar /** 3176*c83a76b0SSuyog Pawar * These pointers point to modified input, one each for one ref idx. 3177*c83a76b0SSuyog Pawar * Instead of weighting the reference, we weight the input with inverse 3178*c83a76b0SSuyog Pawar * wt and offset for list 0 and list 1. 3179*c83a76b0SSuyog Pawar */ 3180*c83a76b0SSuyog Pawar UWORD8 *apu1_wt_inp[2][MAX_NUM_REF]; 3181*c83a76b0SSuyog Pawar 3182*c83a76b0SSuyog Pawar /* Since ME uses weighted inputs, we use reciprocal of the actual weights */ 3183*c83a76b0SSuyog Pawar /* that are signaled in the bitstream */ 3184*c83a76b0SSuyog Pawar WORD32 *pi4_inv_wt; 3185*c83a76b0SSuyog Pawar WORD32 *pi4_inv_wt_shift_val; 3186*c83a76b0SSuyog Pawar 3187*c83a76b0SSuyog Pawar /* Map between L0 Reference indices and LC indices */ 3188*c83a76b0SSuyog Pawar WORD8 *pi1_past_list; 3189*c83a76b0SSuyog Pawar 3190*c83a76b0SSuyog Pawar /* Map between L1 Reference indices and LC indices */ 3191*c83a76b0SSuyog Pawar WORD8 *pi1_future_list; 3192*c83a76b0SSuyog Pawar 3193*c83a76b0SSuyog Pawar /** 3194*c83a76b0SSuyog Pawar * Points to the non-weighted input data for the current CTB 3195*c83a76b0SSuyog Pawar */ 3196*c83a76b0SSuyog Pawar UWORD8 *pu1_non_wt_inp; 3197*c83a76b0SSuyog Pawar 3198*c83a76b0SSuyog Pawar /** 3199*c83a76b0SSuyog Pawar * Store the pred lambda and lamda_qshifts for all the reference indices 3200*c83a76b0SSuyog Pawar */ 3201*c83a76b0SSuyog Pawar WORD32 i4_lamda; 3202*c83a76b0SSuyog Pawar 3203*c83a76b0SSuyog Pawar UWORD8 u1_lamda_qshift; 3204*c83a76b0SSuyog Pawar 3205*c83a76b0SSuyog Pawar WORD32 wpred_log_wdc; 3206*c83a76b0SSuyog Pawar 3207*c83a76b0SSuyog Pawar /** 3208*c83a76b0SSuyog Pawar * Number of active references in l0 3209*c83a76b0SSuyog Pawar */ 3210*c83a76b0SSuyog Pawar UWORD8 u1_num_active_ref_l0; 3211*c83a76b0SSuyog Pawar 3212*c83a76b0SSuyog Pawar /** 3213*c83a76b0SSuyog Pawar * Number of active references in l1 3214*c83a76b0SSuyog Pawar */ 3215*c83a76b0SSuyog Pawar UWORD8 u1_num_active_ref_l1; 3216*c83a76b0SSuyog Pawar 3217*c83a76b0SSuyog Pawar /** The max_depth for inter tu_tree */ 3218*c83a76b0SSuyog Pawar UWORD8 u1_max_tr_depth; 3219*c83a76b0SSuyog Pawar 3220*c83a76b0SSuyog Pawar /** Quality Preset */ 3221*c83a76b0SSuyog Pawar WORD8 i1_quality_preset; 3222*c83a76b0SSuyog Pawar 3223*c83a76b0SSuyog Pawar /** SATD or SAD */ 3224*c83a76b0SSuyog Pawar UWORD8 u1_use_satd; 3225*c83a76b0SSuyog Pawar 3226*c83a76b0SSuyog Pawar /* Frame level QP */ 3227*c83a76b0SSuyog Pawar WORD32 i4_qstep_ls8; 3228*c83a76b0SSuyog Pawar 3229*c83a76b0SSuyog Pawar /* Pointer to an array of PU level src variances */ 3230*c83a76b0SSuyog Pawar UWORD32 *pu4_src_variance; 3231*c83a76b0SSuyog Pawar 3232*c83a76b0SSuyog Pawar WORD32 i4_alpha_stim_multiplier; 3233*c83a76b0SSuyog Pawar 3234*c83a76b0SSuyog Pawar UWORD8 u1_is_cu_noisy; 3235*c83a76b0SSuyog Pawar 3236*c83a76b0SSuyog Pawar ULWORD64 *pu8_part_src_sigmaX; 3237*c83a76b0SSuyog Pawar 3238*c83a76b0SSuyog Pawar ULWORD64 *pu8_part_src_sigmaXSquared; 3239*c83a76b0SSuyog Pawar 3240*c83a76b0SSuyog Pawar UWORD8 u1_max_2nx2n_tu_recur_cands; 3241*c83a76b0SSuyog Pawar 3242*c83a76b0SSuyog Pawar } inter_ctb_prms_t; 3243*c83a76b0SSuyog Pawar 3244*c83a76b0SSuyog Pawar /*****************************************************************************/ 3245*c83a76b0SSuyog Pawar /* Extern Variable Declarations */ 3246*c83a76b0SSuyog Pawar /*****************************************************************************/ 3247*c83a76b0SSuyog Pawar extern const double lamda_modifier_for_I_pic[8]; 3248*c83a76b0SSuyog Pawar 3249*c83a76b0SSuyog Pawar /*****************************************************************************/ 3250*c83a76b0SSuyog Pawar /* Extern Function Declarations */ 3251*c83a76b0SSuyog Pawar /*****************************************************************************/ 3252*c83a76b0SSuyog Pawar 3253*c83a76b0SSuyog Pawar #endif /* _IHEVCE_ENC_STRUCTS_H_ */ 3254