1*c83a76b0SSuyog Pawar /******************************************************************************
2*c83a76b0SSuyog Pawar *
3*c83a76b0SSuyog Pawar * Copyright (C) 2018 The Android Open Source Project
4*c83a76b0SSuyog Pawar *
5*c83a76b0SSuyog Pawar * Licensed under the Apache License, Version 2.0 (the "License");
6*c83a76b0SSuyog Pawar * you may not use this file except in compliance with the License.
7*c83a76b0SSuyog Pawar * You may obtain a copy of the License at:
8*c83a76b0SSuyog Pawar *
9*c83a76b0SSuyog Pawar * http://www.apache.org/licenses/LICENSE-2.0
10*c83a76b0SSuyog Pawar *
11*c83a76b0SSuyog Pawar * Unless required by applicable law or agreed to in writing, software
12*c83a76b0SSuyog Pawar * distributed under the License is distributed on an "AS IS" BASIS,
13*c83a76b0SSuyog Pawar * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
14*c83a76b0SSuyog Pawar * See the License for the specific language governing permissions and
15*c83a76b0SSuyog Pawar * limitations under the License.
16*c83a76b0SSuyog Pawar *
17*c83a76b0SSuyog Pawar *****************************************************************************
18*c83a76b0SSuyog Pawar * Originally developed and contributed by Ittiam Systems Pvt. Ltd, Bangalore
19*c83a76b0SSuyog Pawar */
20*c83a76b0SSuyog Pawar
21*c83a76b0SSuyog Pawar /*!
22*c83a76b0SSuyog Pawar ******************************************************************************
23*c83a76b0SSuyog Pawar * \file ihevce_tile_interface.c
24*c83a76b0SSuyog Pawar *
25*c83a76b0SSuyog Pawar * \brief
26*c83a76b0SSuyog Pawar * This file contains functions related to tile interface
27*c83a76b0SSuyog Pawar *
28*c83a76b0SSuyog Pawar * \date
29*c83a76b0SSuyog Pawar * 24/10/2012
30*c83a76b0SSuyog Pawar *
31*c83a76b0SSuyog Pawar * \author
32*c83a76b0SSuyog Pawar * Ittiam
33*c83a76b0SSuyog Pawar *
34*c83a76b0SSuyog Pawar *
35*c83a76b0SSuyog Pawar * List of Functions
36*c83a76b0SSuyog Pawar *
37*c83a76b0SSuyog Pawar *
38*c83a76b0SSuyog Pawar ******************************************************************************
39*c83a76b0SSuyog Pawar */
40*c83a76b0SSuyog Pawar
41*c83a76b0SSuyog Pawar /*****************************************************************************/
42*c83a76b0SSuyog Pawar /* File Includes */
43*c83a76b0SSuyog Pawar /*****************************************************************************/
44*c83a76b0SSuyog Pawar /* System include files */
45*c83a76b0SSuyog Pawar #include <string.h>
46*c83a76b0SSuyog Pawar #include <stdio.h>
47*c83a76b0SSuyog Pawar #include <stdlib.h>
48*c83a76b0SSuyog Pawar #include <assert.h>
49*c83a76b0SSuyog Pawar
50*c83a76b0SSuyog Pawar /* User include files */
51*c83a76b0SSuyog Pawar #include "ihevc_typedefs.h"
52*c83a76b0SSuyog Pawar #include "itt_video_api.h"
53*c83a76b0SSuyog Pawar #include "ihevce_api.h"
54*c83a76b0SSuyog Pawar
55*c83a76b0SSuyog Pawar #include "rc_cntrl_param.h"
56*c83a76b0SSuyog Pawar #include "rc_frame_info_collector.h"
57*c83a76b0SSuyog Pawar #include "rc_look_ahead_params.h"
58*c83a76b0SSuyog Pawar
59*c83a76b0SSuyog Pawar #include "ihevc_defs.h"
60*c83a76b0SSuyog Pawar #include "ihevc_structs.h"
61*c83a76b0SSuyog Pawar #include "ihevc_platform_macros.h"
62*c83a76b0SSuyog Pawar #include "ihevc_deblk.h"
63*c83a76b0SSuyog Pawar #include "ihevc_itrans_recon.h"
64*c83a76b0SSuyog Pawar #include "ihevc_chroma_itrans_recon.h"
65*c83a76b0SSuyog Pawar #include "ihevc_chroma_intra_pred.h"
66*c83a76b0SSuyog Pawar #include "ihevc_intra_pred.h"
67*c83a76b0SSuyog Pawar #include "ihevc_inter_pred.h"
68*c83a76b0SSuyog Pawar #include "ihevc_mem_fns.h"
69*c83a76b0SSuyog Pawar #include "ihevc_padding.h"
70*c83a76b0SSuyog Pawar #include "ihevc_weighted_pred.h"
71*c83a76b0SSuyog Pawar #include "ihevc_sao.h"
72*c83a76b0SSuyog Pawar #include "ihevc_resi_trans.h"
73*c83a76b0SSuyog Pawar #include "ihevc_quant_iquant_ssd.h"
74*c83a76b0SSuyog Pawar #include "ihevc_cabac_tables.h"
75*c83a76b0SSuyog Pawar
76*c83a76b0SSuyog Pawar #include "ihevce_defs.h"
77*c83a76b0SSuyog Pawar #include "ihevce_lap_enc_structs.h"
78*c83a76b0SSuyog Pawar #include "ihevce_multi_thrd_structs.h"
79*c83a76b0SSuyog Pawar #include "ihevce_me_common_defs.h"
80*c83a76b0SSuyog Pawar #include "ihevce_had_satd.h"
81*c83a76b0SSuyog Pawar #include "ihevce_error_codes.h"
82*c83a76b0SSuyog Pawar #include "ihevce_bitstream.h"
83*c83a76b0SSuyog Pawar #include "ihevce_cabac.h"
84*c83a76b0SSuyog Pawar #include "ihevce_rdoq_macros.h"
85*c83a76b0SSuyog Pawar #include "ihevce_function_selector.h"
86*c83a76b0SSuyog Pawar #include "ihevce_enc_structs.h"
87*c83a76b0SSuyog Pawar #include "ihevce_entropy_structs.h"
88*c83a76b0SSuyog Pawar #include "ihevce_cmn_utils_instr_set_router.h"
89*c83a76b0SSuyog Pawar #include "ihevce_enc_loop_structs.h"
90*c83a76b0SSuyog Pawar #include "ihevce_tile_interface.h"
91*c83a76b0SSuyog Pawar
92*c83a76b0SSuyog Pawar /*****************************************************************************/
93*c83a76b0SSuyog Pawar /* Function Definitions */
94*c83a76b0SSuyog Pawar /*****************************************************************************/
95*c83a76b0SSuyog Pawar
96*c83a76b0SSuyog Pawar /*!
97*c83a76b0SSuyog Pawar ******************************************************************************
98*c83a76b0SSuyog Pawar * \if Function name : ihevce_update_tile_params \endif
99*c83a76b0SSuyog Pawar *
100*c83a76b0SSuyog Pawar * \brief
101*c83a76b0SSuyog Pawar * Updates the ps_tile_params structres based on the tile-position in frame.
102*c83a76b0SSuyog Pawar *
103*c83a76b0SSuyog Pawar *****************************************************************************
104*c83a76b0SSuyog Pawar */
ihevce_update_tile_params(ihevce_static_cfg_params_t * ps_static_cfg_prms,ihevce_tile_params_t * ps_tile_params,WORD32 i4_resolution_id)105*c83a76b0SSuyog Pawar void ihevce_update_tile_params(
106*c83a76b0SSuyog Pawar ihevce_static_cfg_params_t *ps_static_cfg_prms,
107*c83a76b0SSuyog Pawar ihevce_tile_params_t *ps_tile_params,
108*c83a76b0SSuyog Pawar WORD32 i4_resolution_id)
109*c83a76b0SSuyog Pawar {
110*c83a76b0SSuyog Pawar /* Total number of tiles in a frame */
111*c83a76b0SSuyog Pawar ihevce_app_tile_params_t *ps_app_tile_prms;
112*c83a76b0SSuyog Pawar WORD32 i4_num_tiles;
113*c83a76b0SSuyog Pawar WORD32 i4_cu_aligned_tgt_frame_ht,
114*c83a76b0SSuyog Pawar i4_cu_aligned_tgt_frame_wd; //Frame width and height specific to target-resolution
115*c83a76b0SSuyog Pawar WORD32 i4_ctb_aligned_tgt_frame_ht,
116*c83a76b0SSuyog Pawar i4_ctb_aligned_tgt_frame_wd; //Frame width and height specific to target-resolution
117*c83a76b0SSuyog Pawar WORD32 i4_x_y = 0;
118*c83a76b0SSuyog Pawar WORD32 i4_pos;
119*c83a76b0SSuyog Pawar WORD32 i4_i;
120*c83a76b0SSuyog Pawar
121*c83a76b0SSuyog Pawar WORD32 i4_curr_tile_id;
122*c83a76b0SSuyog Pawar WORD32 i4_max_log2_cu_size, i4_ctb_size;
123*c83a76b0SSuyog Pawar WORD32 i4_pic_wd_in_ctb;
124*c83a76b0SSuyog Pawar WORD32 i4_pic_ht_in_ctb;
125*c83a76b0SSuyog Pawar WORD32 min_cu_size;
126*c83a76b0SSuyog Pawar WORD32 i4_num_tile_cols = 1;
127*c83a76b0SSuyog Pawar WORD32 i4_num_tile_rows = 1;
128*c83a76b0SSuyog Pawar
129*c83a76b0SSuyog Pawar ps_app_tile_prms = &ps_static_cfg_prms->s_app_tile_params;
130*c83a76b0SSuyog Pawar
131*c83a76b0SSuyog Pawar i4_max_log2_cu_size = ps_static_cfg_prms->s_config_prms.i4_max_log2_cu_size;
132*c83a76b0SSuyog Pawar i4_ctb_size = 1 << i4_max_log2_cu_size;
133*c83a76b0SSuyog Pawar
134*c83a76b0SSuyog Pawar min_cu_size = 1 << ps_static_cfg_prms->s_config_prms.i4_min_log2_cu_size;
135*c83a76b0SSuyog Pawar
136*c83a76b0SSuyog Pawar /* Allign the frame width to min CU size */
137*c83a76b0SSuyog Pawar i4_cu_aligned_tgt_frame_wd =
138*c83a76b0SSuyog Pawar ps_static_cfg_prms->s_tgt_lyr_prms.as_tgt_params[i4_resolution_id].i4_width +
139*c83a76b0SSuyog Pawar SET_CTB_ALIGN(
140*c83a76b0SSuyog Pawar ps_static_cfg_prms->s_tgt_lyr_prms.as_tgt_params[i4_resolution_id].i4_width,
141*c83a76b0SSuyog Pawar min_cu_size);
142*c83a76b0SSuyog Pawar
143*c83a76b0SSuyog Pawar /* Allign the frame hieght to min CU size */
144*c83a76b0SSuyog Pawar i4_cu_aligned_tgt_frame_ht =
145*c83a76b0SSuyog Pawar ps_static_cfg_prms->s_tgt_lyr_prms.as_tgt_params[i4_resolution_id].i4_height +
146*c83a76b0SSuyog Pawar SET_CTB_ALIGN(
147*c83a76b0SSuyog Pawar ps_static_cfg_prms->s_tgt_lyr_prms.as_tgt_params[i4_resolution_id].i4_height,
148*c83a76b0SSuyog Pawar min_cu_size);
149*c83a76b0SSuyog Pawar
150*c83a76b0SSuyog Pawar if(1 == ps_app_tile_prms->i4_tiles_enabled_flag)
151*c83a76b0SSuyog Pawar {
152*c83a76b0SSuyog Pawar i4_num_tile_cols = ps_app_tile_prms->i4_num_tile_cols;
153*c83a76b0SSuyog Pawar i4_num_tile_rows = ps_app_tile_prms->i4_num_tile_rows;
154*c83a76b0SSuyog Pawar }
155*c83a76b0SSuyog Pawar
156*c83a76b0SSuyog Pawar i4_num_tiles = i4_num_tile_cols * i4_num_tile_rows;
157*c83a76b0SSuyog Pawar
158*c83a76b0SSuyog Pawar i4_ctb_aligned_tgt_frame_wd = i4_cu_aligned_tgt_frame_wd;
159*c83a76b0SSuyog Pawar i4_ctb_aligned_tgt_frame_wd += SET_CTB_ALIGN(i4_ctb_aligned_tgt_frame_wd, MAX_CTB_SIZE);
160*c83a76b0SSuyog Pawar i4_pic_wd_in_ctb = i4_ctb_aligned_tgt_frame_wd >> i4_max_log2_cu_size;
161*c83a76b0SSuyog Pawar
162*c83a76b0SSuyog Pawar i4_ctb_aligned_tgt_frame_ht = i4_cu_aligned_tgt_frame_ht;
163*c83a76b0SSuyog Pawar i4_ctb_aligned_tgt_frame_ht += SET_CTB_ALIGN(i4_ctb_aligned_tgt_frame_ht, MAX_CTB_SIZE);
164*c83a76b0SSuyog Pawar i4_pic_ht_in_ctb = i4_ctb_aligned_tgt_frame_ht >> i4_max_log2_cu_size;
165*c83a76b0SSuyog Pawar
166*c83a76b0SSuyog Pawar /* Update tile enable flag in each instance's tile struct */
167*c83a76b0SSuyog Pawar ps_tile_params->i4_tiles_enabled_flag = ps_app_tile_prms->i4_tiles_enabled_flag;
168*c83a76b0SSuyog Pawar
169*c83a76b0SSuyog Pawar ps_tile_params->i4_num_tile_cols = i4_num_tile_cols;
170*c83a76b0SSuyog Pawar ps_tile_params->i4_num_tile_rows = i4_num_tile_rows;
171*c83a76b0SSuyog Pawar
172*c83a76b0SSuyog Pawar i4_curr_tile_id = ps_tile_params->i4_curr_tile_id;
173*c83a76b0SSuyog Pawar
174*c83a76b0SSuyog Pawar /* num tiles in frame */
175*c83a76b0SSuyog Pawar ps_tile_params->i4_num_tiles = i4_num_tiles;
176*c83a76b0SSuyog Pawar
177*c83a76b0SSuyog Pawar ps_tile_params->i4_uniform_spacing_flag = ps_app_tile_prms->i4_uniform_spacing_flag;
178*c83a76b0SSuyog Pawar
179*c83a76b0SSuyog Pawar if(0 == ps_tile_params->i4_tiles_enabled_flag)
180*c83a76b0SSuyog Pawar {
181*c83a76b0SSuyog Pawar /* curr tile width and height */
182*c83a76b0SSuyog Pawar ps_tile_params->i4_curr_tile_width = i4_cu_aligned_tgt_frame_wd;
183*c83a76b0SSuyog Pawar ps_tile_params->i4_curr_tile_height = i4_cu_aligned_tgt_frame_ht;
184*c83a76b0SSuyog Pawar
185*c83a76b0SSuyog Pawar ps_tile_params->i4_first_ctb_x = 0;
186*c83a76b0SSuyog Pawar ps_tile_params->i4_first_ctb_y = 0;
187*c83a76b0SSuyog Pawar
188*c83a76b0SSuyog Pawar ps_tile_params->i4_first_sample_x = 0;
189*c83a76b0SSuyog Pawar ps_tile_params->i4_first_sample_y = 0;
190*c83a76b0SSuyog Pawar }
191*c83a76b0SSuyog Pawar else
192*c83a76b0SSuyog Pawar {
193*c83a76b0SSuyog Pawar if(0 == ps_app_tile_prms->i4_uniform_spacing_flag)
194*c83a76b0SSuyog Pawar {
195*c83a76b0SSuyog Pawar /* curr tile width */
196*c83a76b0SSuyog Pawar ps_tile_params->i4_curr_tile_width =
197*c83a76b0SSuyog Pawar ps_app_tile_prms->ai4_column_width[i4_curr_tile_id % i4_num_tile_cols];
198*c83a76b0SSuyog Pawar
199*c83a76b0SSuyog Pawar /* curr tile height */
200*c83a76b0SSuyog Pawar ps_tile_params->i4_curr_tile_height =
201*c83a76b0SSuyog Pawar ps_app_tile_prms->ai4_row_height[i4_curr_tile_id / i4_num_tile_cols];
202*c83a76b0SSuyog Pawar
203*c83a76b0SSuyog Pawar /* ctb_x and ctb_y of first ctb in tile */
204*c83a76b0SSuyog Pawar i4_pos = i4_curr_tile_id % i4_num_tile_cols;
205*c83a76b0SSuyog Pawar
206*c83a76b0SSuyog Pawar for(i4_i = 0; i4_i < i4_pos; i4_i++)
207*c83a76b0SSuyog Pawar {
208*c83a76b0SSuyog Pawar i4_x_y += ps_app_tile_prms->ai4_column_width[i4_i];
209*c83a76b0SSuyog Pawar }
210*c83a76b0SSuyog Pawar
211*c83a76b0SSuyog Pawar ps_tile_params->i4_first_sample_x = i4_x_y;
212*c83a76b0SSuyog Pawar ps_tile_params->i4_first_ctb_x = i4_x_y >> i4_max_log2_cu_size;
213*c83a76b0SSuyog Pawar
214*c83a76b0SSuyog Pawar i4_pos = i4_curr_tile_id / i4_num_tile_cols;
215*c83a76b0SSuyog Pawar
216*c83a76b0SSuyog Pawar i4_x_y = 0;
217*c83a76b0SSuyog Pawar
218*c83a76b0SSuyog Pawar for(i4_i = 0; i4_i < i4_pos; i4_i++)
219*c83a76b0SSuyog Pawar {
220*c83a76b0SSuyog Pawar i4_x_y += ps_app_tile_prms->ai4_row_height[i4_i];
221*c83a76b0SSuyog Pawar }
222*c83a76b0SSuyog Pawar
223*c83a76b0SSuyog Pawar ps_tile_params->i4_first_sample_y = i4_x_y;
224*c83a76b0SSuyog Pawar ps_tile_params->i4_first_ctb_y = i4_x_y >> i4_max_log2_cu_size;
225*c83a76b0SSuyog Pawar }
226*c83a76b0SSuyog Pawar else
227*c83a76b0SSuyog Pawar {
228*c83a76b0SSuyog Pawar /* below formula for tile width/height and start_x/start_y are derived from HM Decoder */
229*c83a76b0SSuyog Pawar WORD32 i4_start = 0;
230*c83a76b0SSuyog Pawar WORD32 i4_value = 0;
231*c83a76b0SSuyog Pawar /* curr tile width */
232*c83a76b0SSuyog Pawar for(i4_i = 0; i4_i < i4_num_tile_cols; i4_i++)
233*c83a76b0SSuyog Pawar {
234*c83a76b0SSuyog Pawar i4_value = ((i4_i + 1) * i4_pic_wd_in_ctb) / i4_num_tile_cols -
235*c83a76b0SSuyog Pawar (i4_i * i4_pic_wd_in_ctb) / i4_num_tile_cols;
236*c83a76b0SSuyog Pawar
237*c83a76b0SSuyog Pawar if(i4_i == (i4_curr_tile_id % i4_num_tile_cols))
238*c83a76b0SSuyog Pawar {
239*c83a76b0SSuyog Pawar ps_tile_params->i4_first_ctb_x = i4_start;
240*c83a76b0SSuyog Pawar ps_tile_params->i4_first_sample_x = (i4_start << i4_max_log2_cu_size);
241*c83a76b0SSuyog Pawar ps_tile_params->i4_curr_tile_width = (i4_value << i4_max_log2_cu_size);
242*c83a76b0SSuyog Pawar if(i4_i == (i4_num_tile_cols - 1))
243*c83a76b0SSuyog Pawar {
244*c83a76b0SSuyog Pawar if(i4_cu_aligned_tgt_frame_wd % i4_ctb_size)
245*c83a76b0SSuyog Pawar {
246*c83a76b0SSuyog Pawar ps_tile_params->i4_curr_tile_width =
247*c83a76b0SSuyog Pawar (ps_tile_params->i4_curr_tile_width - i4_ctb_size) +
248*c83a76b0SSuyog Pawar (i4_cu_aligned_tgt_frame_wd % i4_ctb_size);
249*c83a76b0SSuyog Pawar }
250*c83a76b0SSuyog Pawar }
251*c83a76b0SSuyog Pawar break;
252*c83a76b0SSuyog Pawar }
253*c83a76b0SSuyog Pawar i4_start += i4_value;
254*c83a76b0SSuyog Pawar }
255*c83a76b0SSuyog Pawar
256*c83a76b0SSuyog Pawar /* curr tile height */
257*c83a76b0SSuyog Pawar i4_start = 0;
258*c83a76b0SSuyog Pawar for(i4_i = 0; i4_i < i4_num_tile_rows; i4_i++)
259*c83a76b0SSuyog Pawar {
260*c83a76b0SSuyog Pawar i4_value = ((i4_i + 1) * i4_pic_ht_in_ctb) / i4_num_tile_rows -
261*c83a76b0SSuyog Pawar (i4_i * i4_pic_ht_in_ctb) / i4_num_tile_rows;
262*c83a76b0SSuyog Pawar
263*c83a76b0SSuyog Pawar if(i4_i == (i4_curr_tile_id / i4_num_tile_cols))
264*c83a76b0SSuyog Pawar {
265*c83a76b0SSuyog Pawar ps_tile_params->i4_first_ctb_y = i4_start;
266*c83a76b0SSuyog Pawar ps_tile_params->i4_first_sample_y = (i4_start << i4_max_log2_cu_size);
267*c83a76b0SSuyog Pawar ps_tile_params->i4_curr_tile_height = (i4_value << i4_max_log2_cu_size);
268*c83a76b0SSuyog Pawar if(i4_i == (i4_num_tile_rows - 1))
269*c83a76b0SSuyog Pawar {
270*c83a76b0SSuyog Pawar if(i4_cu_aligned_tgt_frame_ht % i4_ctb_size)
271*c83a76b0SSuyog Pawar {
272*c83a76b0SSuyog Pawar ps_tile_params->i4_curr_tile_height =
273*c83a76b0SSuyog Pawar (ps_tile_params->i4_curr_tile_height - i4_ctb_size) +
274*c83a76b0SSuyog Pawar (i4_cu_aligned_tgt_frame_ht % i4_ctb_size);
275*c83a76b0SSuyog Pawar }
276*c83a76b0SSuyog Pawar }
277*c83a76b0SSuyog Pawar break;
278*c83a76b0SSuyog Pawar }
279*c83a76b0SSuyog Pawar i4_start += i4_value;
280*c83a76b0SSuyog Pawar }
281*c83a76b0SSuyog Pawar }
282*c83a76b0SSuyog Pawar }
283*c83a76b0SSuyog Pawar
284*c83a76b0SSuyog Pawar /* Initiallize i4_curr_tile_wd_in_ctb_unit and i4_curr_tile_ht_in_ctb_unit */
285*c83a76b0SSuyog Pawar ps_tile_params->i4_curr_tile_wd_in_ctb_unit =
286*c83a76b0SSuyog Pawar ps_tile_params->i4_curr_tile_width +
287*c83a76b0SSuyog Pawar SET_CTB_ALIGN(ps_tile_params->i4_curr_tile_width, i4_ctb_size);
288*c83a76b0SSuyog Pawar
289*c83a76b0SSuyog Pawar ps_tile_params->i4_curr_tile_ht_in_ctb_unit =
290*c83a76b0SSuyog Pawar ps_tile_params->i4_curr_tile_height +
291*c83a76b0SSuyog Pawar SET_CTB_ALIGN(ps_tile_params->i4_curr_tile_height, i4_ctb_size);
292*c83a76b0SSuyog Pawar
293*c83a76b0SSuyog Pawar ps_tile_params->i4_curr_tile_wd_in_ctb_unit /= i4_ctb_size;
294*c83a76b0SSuyog Pawar ps_tile_params->i4_curr_tile_ht_in_ctb_unit /= i4_ctb_size;
295*c83a76b0SSuyog Pawar }
296*c83a76b0SSuyog Pawar
297*c83a76b0SSuyog Pawar /*!
298*c83a76b0SSuyog Pawar ******************************************************************************
299*c83a76b0SSuyog Pawar * \if Function name : ihevce_tiles_get_num_mem_recs \endif
300*c83a76b0SSuyog Pawar *
301*c83a76b0SSuyog Pawar * \brief
302*c83a76b0SSuyog Pawar * Returns the total no. of memory records needed for tile encoding
303*c83a76b0SSuyog Pawar *
304*c83a76b0SSuyog Pawar * \param
305*c83a76b0SSuyog Pawar * None
306*c83a76b0SSuyog Pawar *
307*c83a76b0SSuyog Pawar * \return
308*c83a76b0SSuyog Pawar * total no. of memory required
309*c83a76b0SSuyog Pawar *
310*c83a76b0SSuyog Pawar * \author
311*c83a76b0SSuyog Pawar * Ittiam
312*c83a76b0SSuyog Pawar *
313*c83a76b0SSuyog Pawar *****************************************************************************
314*c83a76b0SSuyog Pawar */
ihevce_tiles_get_num_mem_recs(void)315*c83a76b0SSuyog Pawar WORD32 ihevce_tiles_get_num_mem_recs(void)
316*c83a76b0SSuyog Pawar {
317*c83a76b0SSuyog Pawar WORD32 i4_total_memtabs_req = 0;
318*c83a76b0SSuyog Pawar
319*c83a76b0SSuyog Pawar /*------------------------------------------------------------------*/
320*c83a76b0SSuyog Pawar /* Get number of memtabs */
321*c83a76b0SSuyog Pawar /*------------------------------------------------------------------*/
322*c83a76b0SSuyog Pawar /* Memory for keeping all tile's parameters */
323*c83a76b0SSuyog Pawar i4_total_memtabs_req++;
324*c83a76b0SSuyog Pawar
325*c83a76b0SSuyog Pawar /* Memory for keeping frame level tile_id map */
326*c83a76b0SSuyog Pawar i4_total_memtabs_req++;
327*c83a76b0SSuyog Pawar
328*c83a76b0SSuyog Pawar return (i4_total_memtabs_req);
329*c83a76b0SSuyog Pawar }
330*c83a76b0SSuyog Pawar
331*c83a76b0SSuyog Pawar /*!
332*c83a76b0SSuyog Pawar ******************************************************************************
333*c83a76b0SSuyog Pawar * \if Function name : ihevce_tiles_get_mem_recs \endif
334*c83a76b0SSuyog Pawar *
335*c83a76b0SSuyog Pawar * \brief
336*c83a76b0SSuyog Pawar * Fills each memory record attributes of tiles
337*c83a76b0SSuyog Pawar *
338*c83a76b0SSuyog Pawar * \param[in,out] ps_mem_tab : pointer to memory descriptors table
339*c83a76b0SSuyog Pawar * \param[in] ps_tile_master_prms : master tile params
340*c83a76b0SSuyog Pawar * \param[in] i4_mem_space : memspace in whihc memory request should be done
341*c83a76b0SSuyog Pawar *
342*c83a76b0SSuyog Pawar * \return
343*c83a76b0SSuyog Pawar * total no. of mem records filled
344*c83a76b0SSuyog Pawar *
345*c83a76b0SSuyog Pawar * \author
346*c83a76b0SSuyog Pawar * Ittiam
347*c83a76b0SSuyog Pawar *
348*c83a76b0SSuyog Pawar *****************************************************************************
349*c83a76b0SSuyog Pawar */
ihevce_tiles_get_mem_recs(iv_mem_rec_t * ps_memtab,ihevce_static_cfg_params_t * ps_static_cfg_params,frm_ctb_ctxt_t * ps_frm_ctb_prms,WORD32 i4_resolution_id,WORD32 i4_mem_space)350*c83a76b0SSuyog Pawar WORD32 ihevce_tiles_get_mem_recs(
351*c83a76b0SSuyog Pawar iv_mem_rec_t *ps_memtab,
352*c83a76b0SSuyog Pawar ihevce_static_cfg_params_t *ps_static_cfg_params,
353*c83a76b0SSuyog Pawar frm_ctb_ctxt_t *ps_frm_ctb_prms,
354*c83a76b0SSuyog Pawar WORD32 i4_resolution_id,
355*c83a76b0SSuyog Pawar WORD32 i4_mem_space)
356*c83a76b0SSuyog Pawar {
357*c83a76b0SSuyog Pawar //WORD32 i4_frame_width, i4_frame_height;
358*c83a76b0SSuyog Pawar WORD32 i4_num_tiles;
359*c83a76b0SSuyog Pawar WORD32 i4_total_memtabs_filled = 0;
360*c83a76b0SSuyog Pawar WORD32 i4_num_tile_cols = 1;
361*c83a76b0SSuyog Pawar WORD32 i4_num_tile_rows = 1;
362*c83a76b0SSuyog Pawar WORD32 ctb_aligned_frame_width, ctb_aligned_frame_height;
363*c83a76b0SSuyog Pawar WORD32 u4_ctb_in_a_row, u4_ctb_rows_in_a_frame;
364*c83a76b0SSuyog Pawar
365*c83a76b0SSuyog Pawar ihevce_app_tile_params_t *ps_app_tile_params = &ps_static_cfg_params->s_app_tile_params;
366*c83a76b0SSuyog Pawar /*
367*c83a76b0SSuyog Pawar i4_frame_width = ps_tile_master_prms->i4_frame_width;
368*c83a76b0SSuyog Pawar i4_frame_height = ps_tile_master_prms->i4_frame_height;*/
369*c83a76b0SSuyog Pawar
370*c83a76b0SSuyog Pawar if(1 == ps_app_tile_params->i4_tiles_enabled_flag)
371*c83a76b0SSuyog Pawar {
372*c83a76b0SSuyog Pawar i4_num_tile_cols = ps_app_tile_params->i4_num_tile_cols;
373*c83a76b0SSuyog Pawar i4_num_tile_rows = ps_app_tile_params->i4_num_tile_rows;
374*c83a76b0SSuyog Pawar }
375*c83a76b0SSuyog Pawar
376*c83a76b0SSuyog Pawar i4_num_tiles = i4_num_tile_cols * i4_num_tile_rows;
377*c83a76b0SSuyog Pawar
378*c83a76b0SSuyog Pawar /* -------- Memory for storing all tile params ---------*/
379*c83a76b0SSuyog Pawar ps_memtab[0].i4_size = sizeof(iv_mem_rec_t);
380*c83a76b0SSuyog Pawar ps_memtab[0].i4_mem_size = i4_num_tiles * sizeof(ihevce_tile_params_t);
381*c83a76b0SSuyog Pawar ps_memtab[0].e_mem_type = (IV_MEM_TYPE_T)i4_mem_space;
382*c83a76b0SSuyog Pawar ps_memtab[0].i4_mem_alignment = 8;
383*c83a76b0SSuyog Pawar i4_total_memtabs_filled++;
384*c83a76b0SSuyog Pawar
385*c83a76b0SSuyog Pawar /* -------- Memory for CTB level tile-id map ---------*/
386*c83a76b0SSuyog Pawar ctb_aligned_frame_width =
387*c83a76b0SSuyog Pawar ps_static_cfg_params->s_tgt_lyr_prms.as_tgt_params[i4_resolution_id].i4_width;
388*c83a76b0SSuyog Pawar ctb_aligned_frame_height =
389*c83a76b0SSuyog Pawar ps_static_cfg_params->s_tgt_lyr_prms.as_tgt_params[i4_resolution_id].i4_height;
390*c83a76b0SSuyog Pawar
391*c83a76b0SSuyog Pawar /*making the width and height a multiple of CTB size*/
392*c83a76b0SSuyog Pawar ctb_aligned_frame_width += SET_CTB_ALIGN(
393*c83a76b0SSuyog Pawar ps_static_cfg_params->s_tgt_lyr_prms.as_tgt_params[i4_resolution_id].i4_width,
394*c83a76b0SSuyog Pawar MAX_CTB_SIZE);
395*c83a76b0SSuyog Pawar ctb_aligned_frame_height += SET_CTB_ALIGN(
396*c83a76b0SSuyog Pawar ps_static_cfg_params->s_tgt_lyr_prms.as_tgt_params[i4_resolution_id].i4_height,
397*c83a76b0SSuyog Pawar MAX_CTB_SIZE);
398*c83a76b0SSuyog Pawar
399*c83a76b0SSuyog Pawar u4_ctb_in_a_row = (ctb_aligned_frame_width / MAX_CTB_SIZE);
400*c83a76b0SSuyog Pawar u4_ctb_rows_in_a_frame = (ctb_aligned_frame_height / MAX_CTB_SIZE);
401*c83a76b0SSuyog Pawar
402*c83a76b0SSuyog Pawar ps_frm_ctb_prms->i4_tile_id_ctb_map_stride = (ctb_aligned_frame_width / MAX_CTB_SIZE);
403*c83a76b0SSuyog Pawar
404*c83a76b0SSuyog Pawar /* Memory for a frame level memory to store tile-id corresponding to each CTB of frame*/
405*c83a76b0SSuyog Pawar /* (u4_ctb_in_a_row + 1): Keeping an extra column on the left. Tile Id's will be set to -1 in it */
406*c83a76b0SSuyog Pawar /* (u4_ctb_rows_in_a_frame + 1): Keeping an extra column on the top. Tile Id's will be set to -1 in it */
407*c83a76b0SSuyog Pawar /* -1 -1 -1 -1 -1 -1 -1 ....... -1 -1
408*c83a76b0SSuyog Pawar -1 0 0 1 1 2 2 ....... M -1
409*c83a76b0SSuyog Pawar -1 0 0 1 1 2 2 ....... M -1
410*c83a76b0SSuyog Pawar .. .. .. .. .. .. .. ....... M -1
411*c83a76b0SSuyog Pawar .. .. .. .. .. .. .. ....... M -1
412*c83a76b0SSuyog Pawar -1 N N N+1 N+1 N+2 N+2 ....... N+M -1
413*c83a76b0SSuyog Pawar */
414*c83a76b0SSuyog Pawar ps_memtab[1].i4_size = sizeof(iv_mem_rec_t);
415*c83a76b0SSuyog Pawar ps_memtab[1].i4_mem_size =
416*c83a76b0SSuyog Pawar (1 + u4_ctb_in_a_row + 1) * (1 + u4_ctb_rows_in_a_frame) * sizeof(WORD32);
417*c83a76b0SSuyog Pawar ps_memtab[1].e_mem_type = (IV_MEM_TYPE_T)i4_mem_space;
418*c83a76b0SSuyog Pawar ps_memtab[1].i4_mem_alignment = 8;
419*c83a76b0SSuyog Pawar i4_total_memtabs_filled++;
420*c83a76b0SSuyog Pawar
421*c83a76b0SSuyog Pawar return (i4_total_memtabs_filled);
422*c83a76b0SSuyog Pawar }
423*c83a76b0SSuyog Pawar
424*c83a76b0SSuyog Pawar /*!
425*c83a76b0SSuyog Pawar ******************************************************************************
426*c83a76b0SSuyog Pawar * \if Function name : ihevce_tiles_mem_init \endif
427*c83a76b0SSuyog Pawar *
428*c83a76b0SSuyog Pawar * \brief
429*c83a76b0SSuyog Pawar * Initialization of shared buffer memories
430*c83a76b0SSuyog Pawar *
431*c83a76b0SSuyog Pawar * \param[in] ps_mem_tab : pointer to memory descriptors table
432*c83a76b0SSuyog Pawar * \param[in] ps_tile_master_prms : master tile params
433*c83a76b0SSuyog Pawar *
434*c83a76b0SSuyog Pawar * \return
435*c83a76b0SSuyog Pawar * None
436*c83a76b0SSuyog Pawar *
437*c83a76b0SSuyog Pawar * \author
438*c83a76b0SSuyog Pawar * Ittiam
439*c83a76b0SSuyog Pawar *
440*c83a76b0SSuyog Pawar *****************************************************************************
441*c83a76b0SSuyog Pawar */
ihevce_tiles_mem_init(iv_mem_rec_t * ps_memtab,ihevce_static_cfg_params_t * ps_static_cfg_prms,enc_ctxt_t * ps_enc_ctxt,WORD32 i4_resolution_id)442*c83a76b0SSuyog Pawar void *ihevce_tiles_mem_init(
443*c83a76b0SSuyog Pawar iv_mem_rec_t *ps_memtab,
444*c83a76b0SSuyog Pawar ihevce_static_cfg_params_t *ps_static_cfg_prms,
445*c83a76b0SSuyog Pawar enc_ctxt_t *ps_enc_ctxt,
446*c83a76b0SSuyog Pawar WORD32 i4_resolution_id)
447*c83a76b0SSuyog Pawar {
448*c83a76b0SSuyog Pawar WORD32 i4_num_tiles, tile_ctr;
449*c83a76b0SSuyog Pawar WORD32 ctb_row_ctr, ctb_col_ctr, i;
450*c83a76b0SSuyog Pawar WORD32 tile_pos_x, tile_pos_y;
451*c83a76b0SSuyog Pawar WORD32 tile_wd_in_ctb, tile_ht_in_ctb;
452*c83a76b0SSuyog Pawar WORD32 *pi4_tile_id_map_temp, *pi4_tile_id_map_base;
453*c83a76b0SSuyog Pawar WORD32 frame_width_in_ctb;
454*c83a76b0SSuyog Pawar WORD32 i4_num_tile_cols = 1;
455*c83a76b0SSuyog Pawar WORD32 i4_num_tile_rows = 1;
456*c83a76b0SSuyog Pawar
457*c83a76b0SSuyog Pawar ihevce_tile_params_t *ps_tile_params_base;
458*c83a76b0SSuyog Pawar frm_ctb_ctxt_t *ps_frm_ctb_prms = &ps_enc_ctxt->s_frm_ctb_prms;
459*c83a76b0SSuyog Pawar
460*c83a76b0SSuyog Pawar if(1 == ps_static_cfg_prms->s_app_tile_params.i4_tiles_enabled_flag)
461*c83a76b0SSuyog Pawar {
462*c83a76b0SSuyog Pawar i4_num_tile_cols = ps_static_cfg_prms->s_app_tile_params.i4_num_tile_cols;
463*c83a76b0SSuyog Pawar i4_num_tile_rows = ps_static_cfg_prms->s_app_tile_params.i4_num_tile_rows;
464*c83a76b0SSuyog Pawar }
465*c83a76b0SSuyog Pawar
466*c83a76b0SSuyog Pawar frame_width_in_ctb =
467*c83a76b0SSuyog Pawar ps_static_cfg_prms->s_tgt_lyr_prms.as_tgt_params[i4_resolution_id].i4_width;
468*c83a76b0SSuyog Pawar frame_width_in_ctb += SET_CTB_ALIGN(frame_width_in_ctb, MAX_CTB_SIZE);
469*c83a76b0SSuyog Pawar frame_width_in_ctb /= MAX_CTB_SIZE;
470*c83a76b0SSuyog Pawar
471*c83a76b0SSuyog Pawar /* -------- Memory for storing all tile params ---------*/
472*c83a76b0SSuyog Pawar ps_tile_params_base = (ihevce_tile_params_t *)ps_memtab->pv_base;
473*c83a76b0SSuyog Pawar ps_memtab++;
474*c83a76b0SSuyog Pawar
475*c83a76b0SSuyog Pawar i4_num_tiles = i4_num_tile_cols * i4_num_tile_rows;
476*c83a76b0SSuyog Pawar
477*c83a76b0SSuyog Pawar for(tile_ctr = 0; tile_ctr < i4_num_tiles; tile_ctr++)
478*c83a76b0SSuyog Pawar {
479*c83a76b0SSuyog Pawar WORD32 i4_i;
480*c83a76b0SSuyog Pawar ihevce_tile_params_t *ps_tile_params = (ps_tile_params_base + tile_ctr);
481*c83a76b0SSuyog Pawar
482*c83a76b0SSuyog Pawar /* Setting default values */
483*c83a76b0SSuyog Pawar memset(ps_tile_params, 0, sizeof(ihevce_tile_params_t));
484*c83a76b0SSuyog Pawar
485*c83a76b0SSuyog Pawar ps_tile_params->i4_curr_tile_id = tile_ctr; /* tile id */
486*c83a76b0SSuyog Pawar
487*c83a76b0SSuyog Pawar /* update create time tile params in each encoder context */
488*c83a76b0SSuyog Pawar ihevce_update_tile_params(ps_static_cfg_prms, ps_tile_params, i4_resolution_id);
489*c83a76b0SSuyog Pawar
490*c83a76b0SSuyog Pawar if(0 == ps_static_cfg_prms->s_app_tile_params.i4_uniform_spacing_flag)
491*c83a76b0SSuyog Pawar {
492*c83a76b0SSuyog Pawar /* Storing column width array and row height array inro enc ctxt */
493*c83a76b0SSuyog Pawar for(i4_i = 0; i4_i < i4_num_tile_cols; i4_i++)
494*c83a76b0SSuyog Pawar {
495*c83a76b0SSuyog Pawar ps_enc_ctxt->ai4_column_width_array[i4_i] =
496*c83a76b0SSuyog Pawar ps_static_cfg_prms->s_app_tile_params.ai4_column_width[i4_i];
497*c83a76b0SSuyog Pawar }
498*c83a76b0SSuyog Pawar for(i4_i = 0; i4_i < i4_num_tile_rows; i4_i++)
499*c83a76b0SSuyog Pawar {
500*c83a76b0SSuyog Pawar ps_enc_ctxt->ai4_row_height_array[i4_i] =
501*c83a76b0SSuyog Pawar ps_static_cfg_prms->s_app_tile_params.ai4_row_height[i4_i];
502*c83a76b0SSuyog Pawar }
503*c83a76b0SSuyog Pawar }
504*c83a76b0SSuyog Pawar }
505*c83a76b0SSuyog Pawar
506*c83a76b0SSuyog Pawar /* -------- Memory for CTB level tile-id map ---------*/
507*c83a76b0SSuyog Pawar pi4_tile_id_map_base = (WORD32 *)ps_memtab->pv_base;
508*c83a76b0SSuyog Pawar
509*c83a76b0SSuyog Pawar // An extra col and row at top, left and right aroun frame level memory. Is set to -1.
510*c83a76b0SSuyog Pawar ps_frm_ctb_prms->i4_tile_id_ctb_map_stride = frame_width_in_ctb + 2;
511*c83a76b0SSuyog Pawar ps_frm_ctb_prms->pi4_tile_id_map =
512*c83a76b0SSuyog Pawar pi4_tile_id_map_base + ps_frm_ctb_prms->i4_tile_id_ctb_map_stride + 1;
513*c83a76b0SSuyog Pawar ps_memtab++;
514*c83a76b0SSuyog Pawar
515*c83a76b0SSuyog Pawar /* Filling -1 in top row */
516*c83a76b0SSuyog Pawar for(i = 0; i < ps_frm_ctb_prms->i4_tile_id_ctb_map_stride; i++)
517*c83a76b0SSuyog Pawar {
518*c83a76b0SSuyog Pawar pi4_tile_id_map_base[i] = -1;
519*c83a76b0SSuyog Pawar }
520*c83a76b0SSuyog Pawar
521*c83a76b0SSuyog Pawar /* Now creating tile-id map */
522*c83a76b0SSuyog Pawar for(tile_ctr = 0; tile_ctr < ps_tile_params_base->i4_num_tiles; tile_ctr++)
523*c83a76b0SSuyog Pawar {
524*c83a76b0SSuyog Pawar ihevce_tile_params_t *ps_tile_params = ps_tile_params_base + tile_ctr;
525*c83a76b0SSuyog Pawar
526*c83a76b0SSuyog Pawar tile_pos_x = ps_tile_params->i4_first_ctb_x;
527*c83a76b0SSuyog Pawar tile_pos_y = ps_tile_params->i4_first_ctb_y;
528*c83a76b0SSuyog Pawar tile_wd_in_ctb = ps_tile_params->i4_curr_tile_wd_in_ctb_unit;
529*c83a76b0SSuyog Pawar tile_ht_in_ctb = ps_tile_params->i4_curr_tile_ht_in_ctb_unit;
530*c83a76b0SSuyog Pawar
531*c83a76b0SSuyog Pawar pi4_tile_id_map_temp = ps_frm_ctb_prms->pi4_tile_id_map +
532*c83a76b0SSuyog Pawar tile_pos_y * ps_frm_ctb_prms->i4_tile_id_ctb_map_stride + tile_pos_x;
533*c83a76b0SSuyog Pawar
534*c83a76b0SSuyog Pawar for(ctb_row_ctr = 0; (ctb_row_ctr < tile_ht_in_ctb); ctb_row_ctr++)
535*c83a76b0SSuyog Pawar {
536*c83a76b0SSuyog Pawar if(tile_pos_x == 0)
537*c83a76b0SSuyog Pawar { /* Filling -1 in left column */
538*c83a76b0SSuyog Pawar pi4_tile_id_map_temp[-1] = -1;
539*c83a76b0SSuyog Pawar }
540*c83a76b0SSuyog Pawar
541*c83a76b0SSuyog Pawar for(ctb_col_ctr = 0; (ctb_col_ctr < tile_wd_in_ctb); ctb_col_ctr++)
542*c83a76b0SSuyog Pawar {
543*c83a76b0SSuyog Pawar pi4_tile_id_map_temp[ctb_col_ctr] = tile_ctr;
544*c83a76b0SSuyog Pawar }
545*c83a76b0SSuyog Pawar
546*c83a76b0SSuyog Pawar if(frame_width_in_ctb == (tile_pos_x + tile_wd_in_ctb))
547*c83a76b0SSuyog Pawar { /* Filling -1 in right column */
548*c83a76b0SSuyog Pawar pi4_tile_id_map_temp[tile_wd_in_ctb] = -1;
549*c83a76b0SSuyog Pawar }
550*c83a76b0SSuyog Pawar
551*c83a76b0SSuyog Pawar pi4_tile_id_map_temp += ps_frm_ctb_prms->i4_tile_id_ctb_map_stride;
552*c83a76b0SSuyog Pawar }
553*c83a76b0SSuyog Pawar }
554*c83a76b0SSuyog Pawar
555*c83a76b0SSuyog Pawar return (void *)ps_tile_params_base;
556*c83a76b0SSuyog Pawar }
557*c83a76b0SSuyog Pawar
558*c83a76b0SSuyog Pawar /*!
559*c83a76b0SSuyog Pawar ******************************************************************************
560*c83a76b0SSuyog Pawar * \if Function name : update_last_coded_cu_qp \endif
561*c83a76b0SSuyog Pawar *
562*c83a76b0SSuyog Pawar * \brief Update i1_last_cu_qp based on CTB's position in tile
563*c83a76b0SSuyog Pawar *
564*c83a76b0SSuyog Pawar * \param[in] pi1_top_last_cu_qp
565*c83a76b0SSuyog Pawar * Pointer to the CTB row's Qp storage
566*c83a76b0SSuyog Pawar * \param[in] i1_entropy_coding_sync_enabled_flag
567*c83a76b0SSuyog Pawar * flag to indicate rate control mode
568*c83a76b0SSuyog Pawar * \param[in] ps_frm_ctb_prms
569*c83a76b0SSuyog Pawar * Frame ctb parameters
570*c83a76b0SSuyog Pawar * \param[in] i1_frame_qp
571*c83a76b0SSuyog Pawar * Frame qp
572*c83a76b0SSuyog Pawar * \param[in] vert_ctr
573*c83a76b0SSuyog Pawar * first CTB row of frame
574*c83a76b0SSuyog Pawar * \param[in] ctb_ctr
575*c83a76b0SSuyog Pawar * ct row count
576*c83a76b0SSuyog Pawar * \param[out] pi1_last_cu_qp
577*c83a76b0SSuyog Pawar * Qp of the last CU of previous CTB row
578*c83a76b0SSuyog Pawar *
579*c83a76b0SSuyog Pawar * \return
580*c83a76b0SSuyog Pawar * None
581*c83a76b0SSuyog Pawar *
582*c83a76b0SSuyog Pawar * \author
583*c83a76b0SSuyog Pawar * Ittiam
584*c83a76b0SSuyog Pawar *
585*c83a76b0SSuyog Pawar *****************************************************************************
586*c83a76b0SSuyog Pawar */
update_last_coded_cu_qp(WORD8 * pi1_top_last_cu_qp,WORD8 i1_entropy_coding_sync_enabled_flag,frm_ctb_ctxt_t * ps_frm_ctb_prms,WORD8 i1_frame_qp,WORD32 vert_ctr,WORD32 ctb_ctr,WORD8 * pi1_last_cu_qp)587*c83a76b0SSuyog Pawar void update_last_coded_cu_qp(
588*c83a76b0SSuyog Pawar WORD8 *pi1_top_last_cu_qp,
589*c83a76b0SSuyog Pawar WORD8 i1_entropy_coding_sync_enabled_flag,
590*c83a76b0SSuyog Pawar frm_ctb_ctxt_t *ps_frm_ctb_prms,
591*c83a76b0SSuyog Pawar WORD8 i1_frame_qp,
592*c83a76b0SSuyog Pawar WORD32 vert_ctr,
593*c83a76b0SSuyog Pawar WORD32 ctb_ctr,
594*c83a76b0SSuyog Pawar WORD8 *pi1_last_cu_qp)
595*c83a76b0SSuyog Pawar {
596*c83a76b0SSuyog Pawar WORD32 i4_curr_ctb_tile_id, i4_left_ctb_tile_id, i4_top_ctb_tile_id;
597*c83a76b0SSuyog Pawar WORD32 *pi4_tile_id_map_temp;
598*c83a76b0SSuyog Pawar
599*c83a76b0SSuyog Pawar pi4_tile_id_map_temp = ps_frm_ctb_prms->pi4_tile_id_map +
600*c83a76b0SSuyog Pawar vert_ctr * ps_frm_ctb_prms->i4_tile_id_ctb_map_stride + ctb_ctr;
601*c83a76b0SSuyog Pawar
602*c83a76b0SSuyog Pawar i4_curr_ctb_tile_id = *(pi4_tile_id_map_temp);
603*c83a76b0SSuyog Pawar i4_left_ctb_tile_id = *(pi4_tile_id_map_temp - 1);
604*c83a76b0SSuyog Pawar i4_top_ctb_tile_id = *(pi4_tile_id_map_temp - ps_frm_ctb_prms->i4_tile_id_ctb_map_stride);
605*c83a76b0SSuyog Pawar
606*c83a76b0SSuyog Pawar if(i4_curr_ctb_tile_id == i4_left_ctb_tile_id)
607*c83a76b0SSuyog Pawar {
608*c83a76b0SSuyog Pawar return;
609*c83a76b0SSuyog Pawar }
610*c83a76b0SSuyog Pawar else if(i4_curr_ctb_tile_id != i4_top_ctb_tile_id)
611*c83a76b0SSuyog Pawar { /* First CTB of tile */
612*c83a76b0SSuyog Pawar *pi1_last_cu_qp = i1_frame_qp;
613*c83a76b0SSuyog Pawar }
614*c83a76b0SSuyog Pawar else
615*c83a76b0SSuyog Pawar { /* First CTB of CTB-row */
616*c83a76b0SSuyog Pawar if(1 == i1_entropy_coding_sync_enabled_flag)
617*c83a76b0SSuyog Pawar {
618*c83a76b0SSuyog Pawar *pi1_last_cu_qp = i1_frame_qp;
619*c83a76b0SSuyog Pawar }
620*c83a76b0SSuyog Pawar else
621*c83a76b0SSuyog Pawar {
622*c83a76b0SSuyog Pawar *pi1_last_cu_qp = *(pi1_top_last_cu_qp);
623*c83a76b0SSuyog Pawar }
624*c83a76b0SSuyog Pawar }
625*c83a76b0SSuyog Pawar }
626