xref: /aosp_15_r20/external/llvm/test/CodeGen/AArch64/arm64-alloc-no-stack-realign.ll (revision 9880d6810fe72a1726cb53787c6711e909410d58)
1*9880d681SAndroid Build Coastguard Worker; RUN: llc < %s -mtriple=arm64-apple-darwin -enable-misched=false -enable-post-misched=false | FileCheck %s
2*9880d681SAndroid Build Coastguard Worker
3*9880d681SAndroid Build Coastguard Worker; rdar://12713765
4*9880d681SAndroid Build Coastguard Worker; Make sure we are not creating stack objects that are assumed to be 64-byte
5*9880d681SAndroid Build Coastguard Worker; aligned.
6*9880d681SAndroid Build Coastguard Worker@T3_retval = common global <16 x float> zeroinitializer, align 16
7*9880d681SAndroid Build Coastguard Worker
8*9880d681SAndroid Build Coastguard Workerdefine void @test(<16 x float>* noalias sret %agg.result) nounwind ssp {
9*9880d681SAndroid Build Coastguard Workerentry:
10*9880d681SAndroid Build Coastguard Worker; CHECK: test
11*9880d681SAndroid Build Coastguard Worker; CHECK: stp [[Q1:q[0-9]+]], [[Q2:q[0-9]+]], [sp, #32]
12*9880d681SAndroid Build Coastguard Worker; CHECK: stp [[Q1:q[0-9]+]], [[Q2:q[0-9]+]], [sp]
13*9880d681SAndroid Build Coastguard Worker; CHECK: stp [[Q1:q[0-9]+]], [[Q2:q[0-9]+]], {{\[}}[[BASE:x[0-9]+]], #32]
14*9880d681SAndroid Build Coastguard Worker; CHECK: stp [[Q1:q[0-9]+]], [[Q2:q[0-9]+]], {{\[}}[[BASE]]]
15*9880d681SAndroid Build Coastguard Worker %retval = alloca <16 x float>, align 16
16*9880d681SAndroid Build Coastguard Worker %0 = load <16 x float>, <16 x float>* @T3_retval, align 16
17*9880d681SAndroid Build Coastguard Worker store <16 x float> %0, <16 x float>* %retval
18*9880d681SAndroid Build Coastguard Worker %1 = load <16 x float>, <16 x float>* %retval
19*9880d681SAndroid Build Coastguard Worker store <16 x float> %1, <16 x float>* %agg.result, align 16
20*9880d681SAndroid Build Coastguard Worker ret void
21*9880d681SAndroid Build Coastguard Worker}
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