1*9880d681SAndroid Build Coastguard Worker; RUN: llc < %s -march=arm64 -aarch64-neon-syntax=apple | FileCheck %s 2*9880d681SAndroid Build Coastguard Worker 3*9880d681SAndroid Build Coastguard Worker;CHECK: @func63 4*9880d681SAndroid Build Coastguard Worker;CHECK: cmeq.4h v0, v0, v1 5*9880d681SAndroid Build Coastguard Worker 6*9880d681SAndroid Build Coastguard Worker;FIXME: currently, it will generate 3 instructions: 7*9880d681SAndroid Build Coastguard Worker; ushll.4s v0, v0, #0 8*9880d681SAndroid Build Coastguard Worker; shl.4s v0, v0, #31 9*9880d681SAndroid Build Coastguard Worker; sshr.4s v0, v0, #31 10*9880d681SAndroid Build Coastguard Worker;But these instrucitons can be optimized into 1 instruction: 11*9880d681SAndroid Build Coastguard Worker; sshll.4s v0, v0, #0 12*9880d681SAndroid Build Coastguard Worker 13*9880d681SAndroid Build Coastguard Worker;CHECK: bsl.16b v0, v2, v3 14*9880d681SAndroid Build Coastguard Worker;CHECK: str q0, [x0] 15*9880d681SAndroid Build Coastguard Worker;CHECK: ret 16*9880d681SAndroid Build Coastguard Worker 17*9880d681SAndroid Build Coastguard Worker%T0_63 = type <4 x i16> 18*9880d681SAndroid Build Coastguard Worker%T1_63 = type <4 x i32> 19*9880d681SAndroid Build Coastguard Worker%T2_63 = type <4 x i1> 20*9880d681SAndroid Build Coastguard Workerdefine void @func63(%T1_63* %out, %T0_63 %v0, %T0_63 %v1, %T1_63 %v2, %T1_63 %v3) { 21*9880d681SAndroid Build Coastguard Worker %cond = icmp eq %T0_63 %v0, %v1 22*9880d681SAndroid Build Coastguard Worker %r = select %T2_63 %cond, %T1_63 %v2, %T1_63 %v3 23*9880d681SAndroid Build Coastguard Worker store %T1_63 %r, %T1_63* %out 24*9880d681SAndroid Build Coastguard Worker ret void 25*9880d681SAndroid Build Coastguard Worker} 26