1*9880d681SAndroid Build Coastguard Worker; RUN: llc -mtriple=aarch64-none-eabi -mattr=-fp-armv8 %s -o - | FileCheck %s -check-prefix=nofp 2*9880d681SAndroid Build Coastguard Worker 3*9880d681SAndroid Build Coastguard Worker; In the novfp case, the compiler is forced to assign a core register, 4*9880d681SAndroid Build Coastguard Worker; even if the input is a float. 5*9880d681SAndroid Build Coastguard Worker 6*9880d681SAndroid Build Coastguard Worker; nofp-LABEL: f1 7*9880d681SAndroid Build Coastguard Worker; nofp-CHECK: ldr x0, [sp] 8*9880d681SAndroid Build Coastguard Worker 9*9880d681SAndroid Build Coastguard Worker; This can be generated by a function such as: 10*9880d681SAndroid Build Coastguard Worker; void f1(float f) {asm volatile ("ldr $0, [sp]" : : "X" (f));} 11*9880d681SAndroid Build Coastguard Worker 12*9880d681SAndroid Build Coastguard Workerdefine void @f1(float %f) { 13*9880d681SAndroid Build Coastguard Workerentry: 14*9880d681SAndroid Build Coastguard Worker call void asm sideeffect "ldr $0, [sp]", "X" (float %f) nounwind 15*9880d681SAndroid Build Coastguard Worker 16*9880d681SAndroid Build Coastguard Worker ret void 17*9880d681SAndroid Build Coastguard Worker} 18