1*9880d681SAndroid Build Coastguard Worker; RUN: llc < %s -mtriple=aarch64-eabi -O=3 | FileCheck %s 2*9880d681SAndroid Build Coastguard Worker 3*9880d681SAndroid Build Coastguard Workerdefine void @test() { 4*9880d681SAndroid Build Coastguard Worker ; CHECK: dmb sy 5*9880d681SAndroid Build Coastguard Worker call void @llvm.aarch64.dmb(i32 15) 6*9880d681SAndroid Build Coastguard Worker ; CHECK: dmb osh 7*9880d681SAndroid Build Coastguard Worker call void @llvm.aarch64.dmb(i32 3) 8*9880d681SAndroid Build Coastguard Worker ; CHECK: dsb sy 9*9880d681SAndroid Build Coastguard Worker call void @llvm.aarch64.dsb(i32 15) 10*9880d681SAndroid Build Coastguard Worker ; CHECK: dsb ishld 11*9880d681SAndroid Build Coastguard Worker call void @llvm.aarch64.dsb(i32 9) 12*9880d681SAndroid Build Coastguard Worker ; CHECK: isb 13*9880d681SAndroid Build Coastguard Worker call void @llvm.aarch64.isb(i32 15) 14*9880d681SAndroid Build Coastguard Worker ret void 15*9880d681SAndroid Build Coastguard Worker} 16*9880d681SAndroid Build Coastguard Worker 17*9880d681SAndroid Build Coastguard Worker; Important point is that the compiler should not reorder memory access 18*9880d681SAndroid Build Coastguard Worker; instructions around DMB. 19*9880d681SAndroid Build Coastguard Worker; Failure to do so, two STRs will collapse into one STP. 20*9880d681SAndroid Build Coastguard Workerdefine void @test_dmb_reordering(i32 %a, i32 %b, i32* %d) { 21*9880d681SAndroid Build Coastguard Worker store i32 %a, i32* %d ; CHECK: str {{w[0-9]+}}, [{{x[0-9]+}}] 22*9880d681SAndroid Build Coastguard Worker 23*9880d681SAndroid Build Coastguard Worker call void @llvm.aarch64.dmb(i32 15); CHECK: dmb sy 24*9880d681SAndroid Build Coastguard Worker 25*9880d681SAndroid Build Coastguard Worker %d1 = getelementptr i32, i32* %d, i64 1 26*9880d681SAndroid Build Coastguard Worker store i32 %b, i32* %d1 ; CHECK: str {{w[0-9]+}}, [{{x[0-9]+}}, #4] 27*9880d681SAndroid Build Coastguard Worker 28*9880d681SAndroid Build Coastguard Worker ret void 29*9880d681SAndroid Build Coastguard Worker} 30*9880d681SAndroid Build Coastguard Worker 31*9880d681SAndroid Build Coastguard Worker; Similarly for DSB. 32*9880d681SAndroid Build Coastguard Workerdefine void @test_dsb_reordering(i32 %a, i32 %b, i32* %d) { 33*9880d681SAndroid Build Coastguard Worker store i32 %a, i32* %d ; CHECK: str {{w[0-9]+}}, [{{x[0-9]+}}] 34*9880d681SAndroid Build Coastguard Worker 35*9880d681SAndroid Build Coastguard Worker call void @llvm.aarch64.dsb(i32 15); CHECK: dsb sy 36*9880d681SAndroid Build Coastguard Worker 37*9880d681SAndroid Build Coastguard Worker %d1 = getelementptr i32, i32* %d, i64 1 38*9880d681SAndroid Build Coastguard Worker store i32 %b, i32* %d1 ; CHECK: str {{w[0-9]+}}, [{{x[0-9]+}}, #4] 39*9880d681SAndroid Build Coastguard Worker 40*9880d681SAndroid Build Coastguard Worker ret void 41*9880d681SAndroid Build Coastguard Worker} 42*9880d681SAndroid Build Coastguard Worker 43*9880d681SAndroid Build Coastguard Worker; And ISB. 44*9880d681SAndroid Build Coastguard Workerdefine void @test_isb_reordering(i32 %a, i32 %b, i32* %d) { 45*9880d681SAndroid Build Coastguard Worker store i32 %a, i32* %d ; CHECK: str {{w[0-9]+}}, [{{x[0-9]+}}] 46*9880d681SAndroid Build Coastguard Worker 47*9880d681SAndroid Build Coastguard Worker call void @llvm.aarch64.isb(i32 15); CHECK: isb 48*9880d681SAndroid Build Coastguard Worker 49*9880d681SAndroid Build Coastguard Worker %d1 = getelementptr i32, i32* %d, i64 1 50*9880d681SAndroid Build Coastguard Worker store i32 %b, i32* %d1 ; CHECK: str {{w[0-9]+}}, [{{x[0-9]+}}, #4] 51*9880d681SAndroid Build Coastguard Worker 52*9880d681SAndroid Build Coastguard Worker ret void 53*9880d681SAndroid Build Coastguard Worker} 54*9880d681SAndroid Build Coastguard Worker 55*9880d681SAndroid Build Coastguard Workerdeclare void @llvm.aarch64.dmb(i32) 56*9880d681SAndroid Build Coastguard Workerdeclare void @llvm.aarch64.dsb(i32) 57*9880d681SAndroid Build Coastguard Workerdeclare void @llvm.aarch64.isb(i32) 58