1*9880d681SAndroid Build Coastguard Worker; RUN: llc -verify-machineinstrs -o - %s -mtriple=aarch64-linux-gnu | FileCheck %s 2*9880d681SAndroid Build Coastguard Worker 3*9880d681SAndroid Build Coastguard Worker@var32 = global i32 0 4*9880d681SAndroid Build Coastguard Worker@var64 = global i64 0 5*9880d681SAndroid Build Coastguard Worker 6*9880d681SAndroid Build Coastguard Workerdefine void @test_zr() { 7*9880d681SAndroid Build Coastguard Worker; CHECK-LABEL: test_zr: 8*9880d681SAndroid Build Coastguard Worker 9*9880d681SAndroid Build Coastguard Worker store i32 0, i32* @var32 10*9880d681SAndroid Build Coastguard Worker; CHECK: str wzr, [{{x[0-9]+}}, {{#?}}:lo12:var32] 11*9880d681SAndroid Build Coastguard Worker store i64 0, i64* @var64 12*9880d681SAndroid Build Coastguard Worker; CHECK: str xzr, [{{x[0-9]+}}, {{#?}}:lo12:var64] 13*9880d681SAndroid Build Coastguard Worker 14*9880d681SAndroid Build Coastguard Worker ret void 15*9880d681SAndroid Build Coastguard Worker; CHECK: ret 16*9880d681SAndroid Build Coastguard Worker} 17*9880d681SAndroid Build Coastguard Worker 18*9880d681SAndroid Build Coastguard Workerdefine void @test_sp(i32 %val) { 19*9880d681SAndroid Build Coastguard Worker; CHECK-LABEL: test_sp: 20*9880d681SAndroid Build Coastguard Worker 21*9880d681SAndroid Build Coastguard Worker; Important correctness point here is that LLVM doesn't try to use xzr 22*9880d681SAndroid Build Coastguard Worker; as an addressing register: "str w0, [xzr]" is not a valid A64 23*9880d681SAndroid Build Coastguard Worker; instruction (0b11111 in the Rn field would mean "sp"). 24*9880d681SAndroid Build Coastguard Worker %addr = getelementptr i32, i32* null, i64 0 25*9880d681SAndroid Build Coastguard Worker store i32 %val, i32* %addr 26*9880d681SAndroid Build Coastguard Worker; CHECK: str {{w[0-9]+}}, [{{x[0-9]+|sp}}] 27*9880d681SAndroid Build Coastguard Worker 28*9880d681SAndroid Build Coastguard Worker ret void 29*9880d681SAndroid Build Coastguard Worker; CHECK: ret 30*9880d681SAndroid Build Coastguard Worker} 31