xref: /aosp_15_r20/external/llvm/test/CodeGen/AMDGPU/fmax3.ll (revision 9880d6810fe72a1726cb53787c6711e909410d58)
1*9880d681SAndroid Build Coastguard Worker; RUN: llc -march=amdgcn -mcpu=SI -verify-machineinstrs < %s | FileCheck -check-prefix=SI %s
2*9880d681SAndroid Build Coastguard Worker; RUN: llc -march=amdgcn -mcpu=tonga -verify-machineinstrs < %s | FileCheck -check-prefix=SI %s
3*9880d681SAndroid Build Coastguard Worker
4*9880d681SAndroid Build Coastguard Workerdeclare float @llvm.maxnum.f32(float, float) nounwind readnone
5*9880d681SAndroid Build Coastguard Worker
6*9880d681SAndroid Build Coastguard Worker; SI-LABEL: {{^}}test_fmax3_olt_0:
7*9880d681SAndroid Build Coastguard Worker; SI: buffer_load_dword [[REGC:v[0-9]+]]
8*9880d681SAndroid Build Coastguard Worker; SI: buffer_load_dword [[REGB:v[0-9]+]]
9*9880d681SAndroid Build Coastguard Worker; SI: buffer_load_dword [[REGA:v[0-9]+]]
10*9880d681SAndroid Build Coastguard Worker; SI: v_max3_f32 [[RESULT:v[0-9]+]], [[REGC]], [[REGB]], [[REGA]]
11*9880d681SAndroid Build Coastguard Worker; SI: buffer_store_dword [[RESULT]],
12*9880d681SAndroid Build Coastguard Worker; SI: s_endpgm
13*9880d681SAndroid Build Coastguard Workerdefine void @test_fmax3_olt_0(float addrspace(1)* %out, float addrspace(1)* %aptr, float addrspace(1)* %bptr, float addrspace(1)* %cptr) nounwind {
14*9880d681SAndroid Build Coastguard Worker  %a = load volatile  float, float addrspace(1)* %aptr, align 4
15*9880d681SAndroid Build Coastguard Worker  %b = load volatile float, float addrspace(1)* %bptr, align 4
16*9880d681SAndroid Build Coastguard Worker  %c = load volatile float, float addrspace(1)* %cptr, align 4
17*9880d681SAndroid Build Coastguard Worker  %f0 = call float @llvm.maxnum.f32(float %a, float %b) nounwind readnone
18*9880d681SAndroid Build Coastguard Worker  %f1 = call float @llvm.maxnum.f32(float %f0, float %c) nounwind readnone
19*9880d681SAndroid Build Coastguard Worker  store float %f1, float addrspace(1)* %out, align 4
20*9880d681SAndroid Build Coastguard Worker  ret void
21*9880d681SAndroid Build Coastguard Worker}
22*9880d681SAndroid Build Coastguard Worker
23*9880d681SAndroid Build Coastguard Worker; Commute operand of second fmax
24*9880d681SAndroid Build Coastguard Worker; SI-LABEL: {{^}}test_fmax3_olt_1:
25*9880d681SAndroid Build Coastguard Worker; SI: buffer_load_dword [[REGB:v[0-9]+]]
26*9880d681SAndroid Build Coastguard Worker; SI: buffer_load_dword [[REGA:v[0-9]+]]
27*9880d681SAndroid Build Coastguard Worker; SI: buffer_load_dword [[REGC:v[0-9]+]]
28*9880d681SAndroid Build Coastguard Worker; SI: v_max3_f32 [[RESULT:v[0-9]+]], [[REGC]], [[REGB]], [[REGA]]
29*9880d681SAndroid Build Coastguard Worker; SI: buffer_store_dword [[RESULT]],
30*9880d681SAndroid Build Coastguard Worker; SI: s_endpgm
31*9880d681SAndroid Build Coastguard Workerdefine void @test_fmax3_olt_1(float addrspace(1)* %out, float addrspace(1)* %aptr, float addrspace(1)* %bptr, float addrspace(1)* %cptr) nounwind {
32*9880d681SAndroid Build Coastguard Worker  %a = load volatile float, float addrspace(1)* %aptr, align 4
33*9880d681SAndroid Build Coastguard Worker  %b = load volatile float, float addrspace(1)* %bptr, align 4
34*9880d681SAndroid Build Coastguard Worker  %c = load volatile float, float addrspace(1)* %cptr, align 4
35*9880d681SAndroid Build Coastguard Worker  %f0 = call float @llvm.maxnum.f32(float %a, float %b) nounwind readnone
36*9880d681SAndroid Build Coastguard Worker  %f1 = call float @llvm.maxnum.f32(float %c, float %f0) nounwind readnone
37*9880d681SAndroid Build Coastguard Worker  store float %f1, float addrspace(1)* %out, align 4
38*9880d681SAndroid Build Coastguard Worker  ret void
39*9880d681SAndroid Build Coastguard Worker}
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