xref: /aosp_15_r20/external/llvm/test/CodeGen/AMDGPU/llvm.amdgcn.queue.ptr.ll (revision 9880d6810fe72a1726cb53787c6711e909410d58)
1*9880d681SAndroid Build Coastguard Worker; RUN: llc -mtriple=amdgcn--amdhsa -mcpu=kaveri -verify-machineinstrs < %s | FileCheck -check-prefix=GCN %s
2*9880d681SAndroid Build Coastguard Worker; RUN: not llc -mtriple=amdgcn-unknown-unknown -mcpu=kaveri -verify-machineinstrs < %s 2>&1 | FileCheck -check-prefix=ERROR %s
3*9880d681SAndroid Build Coastguard Worker
4*9880d681SAndroid Build Coastguard Worker; ERROR: in function test{{.*}}: unsupported hsa intrinsic without hsa target
5*9880d681SAndroid Build Coastguard Worker
6*9880d681SAndroid Build Coastguard Worker; GCN-LABEL: {{^}}test:
7*9880d681SAndroid Build Coastguard Worker; GCN: enable_sgpr_queue_ptr = 1
8*9880d681SAndroid Build Coastguard Worker; GCN: s_load_dword s{{[0-9]+}}, s[4:5], 0x0
9*9880d681SAndroid Build Coastguard Workerdefine void @test(i32 addrspace(1)* %out) {
10*9880d681SAndroid Build Coastguard Worker  %queue_ptr = call noalias i8 addrspace(2)* @llvm.amdgcn.queue.ptr() #0
11*9880d681SAndroid Build Coastguard Worker  %header_ptr = bitcast i8 addrspace(2)* %queue_ptr to i32 addrspace(2)*
12*9880d681SAndroid Build Coastguard Worker  %value = load i32, i32 addrspace(2)* %header_ptr
13*9880d681SAndroid Build Coastguard Worker  store i32 %value, i32 addrspace(1)* %out
14*9880d681SAndroid Build Coastguard Worker  ret void
15*9880d681SAndroid Build Coastguard Worker}
16*9880d681SAndroid Build Coastguard Worker
17*9880d681SAndroid Build Coastguard Workerdeclare noalias i8 addrspace(2)* @llvm.amdgcn.queue.ptr() #0
18*9880d681SAndroid Build Coastguard Worker
19*9880d681SAndroid Build Coastguard Workerattributes #0 = { nounwind readnone }
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