1*9880d681SAndroid Build Coastguard Worker;RUN: llc < %s -march=amdgcn -mcpu=verde -verify-machineinstrs | FileCheck %s 2*9880d681SAndroid Build Coastguard Worker;RUN: llc < %s -march=amdgcn -mcpu=tonga -verify-machineinstrs | FileCheck %s 3*9880d681SAndroid Build Coastguard Worker 4*9880d681SAndroid Build Coastguard Worker;CHECK: v_mov_b32_e32 v{{[0-9]+}}, 0xaaaaaaab 5*9880d681SAndroid Build Coastguard Worker;CHECK: v_mul_hi_u32 v0, {{v[0-9]+}}, {{s[0-9]+}} 6*9880d681SAndroid Build Coastguard Worker;CHECK-NEXT: v_lshrrev_b32_e32 v0, 1, v0 7*9880d681SAndroid Build Coastguard Worker 8*9880d681SAndroid Build Coastguard Workerdefine void @test(i32 %p) { 9*9880d681SAndroid Build Coastguard Worker %i = udiv i32 %p, 3 10*9880d681SAndroid Build Coastguard Worker %r = bitcast i32 %i to float 11*9880d681SAndroid Build Coastguard Worker call void @llvm.SI.export(i32 15, i32 0, i32 1, i32 12, i32 0, float %r, float %r, float %r, float %r) 12*9880d681SAndroid Build Coastguard Worker ret void 13*9880d681SAndroid Build Coastguard Worker} 14*9880d681SAndroid Build Coastguard Worker 15*9880d681SAndroid Build Coastguard Workerdeclare <4 x float> @llvm.SI.sample.(i32, <4 x i32>, <8 x i32>, <4 x i32>, i32) readnone 16*9880d681SAndroid Build Coastguard Worker 17*9880d681SAndroid Build Coastguard Workerdeclare void @llvm.SI.export(i32, i32, i32, i32, i32, float, float, float, float) 18