xref: /aosp_15_r20/external/llvm/test/CodeGen/ARM/crc32.ll (revision 9880d6810fe72a1726cb53787c6711e909410d58)
1*9880d681SAndroid Build Coastguard Worker; RUN: llc -mtriple=thumbv8 -o - %s | FileCheck %s
2*9880d681SAndroid Build Coastguard Worker
3*9880d681SAndroid Build Coastguard Workerdefine i32 @test_crc32b(i32 %cur, i8 %next) {
4*9880d681SAndroid Build Coastguard Worker; CHECK-LABEL: test_crc32b:
5*9880d681SAndroid Build Coastguard Worker; CHECK: crc32b r0, r0, r1
6*9880d681SAndroid Build Coastguard Worker  %bits = zext i8 %next to i32
7*9880d681SAndroid Build Coastguard Worker  %val = call i32 @llvm.arm.crc32b(i32 %cur, i32 %bits)
8*9880d681SAndroid Build Coastguard Worker  ret i32 %val
9*9880d681SAndroid Build Coastguard Worker}
10*9880d681SAndroid Build Coastguard Worker
11*9880d681SAndroid Build Coastguard Workerdefine i32 @test_crc32h(i32 %cur, i16 %next) {
12*9880d681SAndroid Build Coastguard Worker; CHECK-LABEL: test_crc32h:
13*9880d681SAndroid Build Coastguard Worker; CHECK: crc32h r0, r0, r1
14*9880d681SAndroid Build Coastguard Worker  %bits = zext i16 %next to i32
15*9880d681SAndroid Build Coastguard Worker  %val = call i32 @llvm.arm.crc32h(i32 %cur, i32 %bits)
16*9880d681SAndroid Build Coastguard Worker  ret i32 %val
17*9880d681SAndroid Build Coastguard Worker}
18*9880d681SAndroid Build Coastguard Worker
19*9880d681SAndroid Build Coastguard Workerdefine i32 @test_crc32w(i32 %cur, i32 %next) {
20*9880d681SAndroid Build Coastguard Worker; CHECK-LABEL: test_crc32w:
21*9880d681SAndroid Build Coastguard Worker; CHECK: crc32w r0, r0, r1
22*9880d681SAndroid Build Coastguard Worker  %val = call i32 @llvm.arm.crc32w(i32 %cur, i32 %next)
23*9880d681SAndroid Build Coastguard Worker  ret i32 %val
24*9880d681SAndroid Build Coastguard Worker}
25*9880d681SAndroid Build Coastguard Worker
26*9880d681SAndroid Build Coastguard Workerdefine i32 @test_crc32cb(i32 %cur, i8 %next) {
27*9880d681SAndroid Build Coastguard Worker; CHECK-LABEL: test_crc32cb:
28*9880d681SAndroid Build Coastguard Worker; CHECK: crc32cb r0, r0, r1
29*9880d681SAndroid Build Coastguard Worker  %bits = zext i8 %next to i32
30*9880d681SAndroid Build Coastguard Worker  %val = call i32 @llvm.arm.crc32cb(i32 %cur, i32 %bits)
31*9880d681SAndroid Build Coastguard Worker  ret i32 %val
32*9880d681SAndroid Build Coastguard Worker}
33*9880d681SAndroid Build Coastguard Worker
34*9880d681SAndroid Build Coastguard Workerdefine i32 @test_crc32ch(i32 %cur, i16 %next) {
35*9880d681SAndroid Build Coastguard Worker; CHECK-LABEL: test_crc32ch:
36*9880d681SAndroid Build Coastguard Worker; CHECK: crc32ch r0, r0, r1
37*9880d681SAndroid Build Coastguard Worker  %bits = zext i16 %next to i32
38*9880d681SAndroid Build Coastguard Worker  %val = call i32 @llvm.arm.crc32ch(i32 %cur, i32 %bits)
39*9880d681SAndroid Build Coastguard Worker  ret i32 %val
40*9880d681SAndroid Build Coastguard Worker}
41*9880d681SAndroid Build Coastguard Worker
42*9880d681SAndroid Build Coastguard Workerdefine i32 @test_crc32cw(i32 %cur, i32 %next) {
43*9880d681SAndroid Build Coastguard Worker; CHECK-LABEL: test_crc32cw:
44*9880d681SAndroid Build Coastguard Worker; CHECK: crc32cw r0, r0, r1
45*9880d681SAndroid Build Coastguard Worker  %val = call i32 @llvm.arm.crc32cw(i32 %cur, i32 %next)
46*9880d681SAndroid Build Coastguard Worker  ret i32 %val
47*9880d681SAndroid Build Coastguard Worker}
48*9880d681SAndroid Build Coastguard Worker
49*9880d681SAndroid Build Coastguard Worker
50*9880d681SAndroid Build Coastguard Workerdeclare i32 @llvm.arm.crc32b(i32, i32)
51*9880d681SAndroid Build Coastguard Workerdeclare i32 @llvm.arm.crc32h(i32, i32)
52*9880d681SAndroid Build Coastguard Workerdeclare i32 @llvm.arm.crc32w(i32, i32)
53*9880d681SAndroid Build Coastguard Workerdeclare i32 @llvm.arm.crc32x(i32, i64)
54*9880d681SAndroid Build Coastguard Worker
55*9880d681SAndroid Build Coastguard Workerdeclare i32 @llvm.arm.crc32cb(i32, i32)
56*9880d681SAndroid Build Coastguard Workerdeclare i32 @llvm.arm.crc32ch(i32, i32)
57*9880d681SAndroid Build Coastguard Workerdeclare i32 @llvm.arm.crc32cw(i32, i32)
58*9880d681SAndroid Build Coastguard Workerdeclare i32 @llvm.arm.crc32cx(i32, i64)
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