xref: /aosp_15_r20/external/llvm/test/CodeGen/ARM/fpcmp_ueq.ll (revision 9880d6810fe72a1726cb53787c6711e909410d58) 
1*9880d681SAndroid Build Coastguard Worker; RUN: llc < %s -mtriple=arm-apple-darwin | grep moveq
2*9880d681SAndroid Build Coastguard Worker; RUN: llc < %s -mtriple=armv7-apple-darwin -mcpu=cortex-a8 | FileCheck %s
3*9880d681SAndroid Build Coastguard Worker
4*9880d681SAndroid Build Coastguard Workerdefine i32 @f7(float %a, float %b) {
5*9880d681SAndroid Build Coastguard Workerentry:
6*9880d681SAndroid Build Coastguard Worker; CHECK-LABEL: f7:
7*9880d681SAndroid Build Coastguard Worker; CHECK: vcmpe.f32
8*9880d681SAndroid Build Coastguard Worker; CHECK: vmrs APSR_nzcv, fpscr
9*9880d681SAndroid Build Coastguard Worker; CHECK: movweq
10*9880d681SAndroid Build Coastguard Worker; CHECK-NOT: vmrs
11*9880d681SAndroid Build Coastguard Worker; CHECK: movwvs
12*9880d681SAndroid Build Coastguard Worker    %tmp = fcmp ueq float %a,%b
13*9880d681SAndroid Build Coastguard Worker    %retval = select i1 %tmp, i32 666, i32 42
14*9880d681SAndroid Build Coastguard Worker    ret i32 %retval
15*9880d681SAndroid Build Coastguard Worker}
16*9880d681SAndroid Build Coastguard Worker
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