1*9880d681SAndroid Build Coastguard Worker; Test all important variants of the unconditional 'br' instruction. 2*9880d681SAndroid Build Coastguard Worker 3*9880d681SAndroid Build Coastguard Worker; RUN: llc -march=mips -mcpu=mips32 -asm-show-inst < %s | FileCheck %s -check-prefixes=ALL,NOT-R6 4*9880d681SAndroid Build Coastguard Worker; RUN: llc -march=mips -mcpu=mips32r2 -asm-show-inst < %s | FileCheck %s -check-prefixes=ALL,NOT-R6 5*9880d681SAndroid Build Coastguard Worker; RUN: llc -march=mips -mcpu=mips32r3 -asm-show-inst < %s | FileCheck %s -check-prefixes=ALL,NOT-R6 6*9880d681SAndroid Build Coastguard Worker; RUN: llc -march=mips -mcpu=mips32r5 -asm-show-inst < %s | FileCheck %s -check-prefixes=ALL,NOT-R6 7*9880d681SAndroid Build Coastguard Worker; RUN: llc -march=mips -mcpu=mips32r6 -asm-show-inst < %s | FileCheck %s -check-prefixes=ALL,R6C 8*9880d681SAndroid Build Coastguard Worker; RUN: llc -march=mips64 -mcpu=mips4 -asm-show-inst < %s | FileCheck %s -check-prefixes=ALL,NOT-R6 9*9880d681SAndroid Build Coastguard Worker; RUN: llc -march=mips64 -mcpu=mips64 -asm-show-inst < %s | FileCheck %s -check-prefixes=ALL,NOT-R6 10*9880d681SAndroid Build Coastguard Worker; RUN: llc -march=mips64 -mcpu=mips64r2 -asm-show-inst < %s | FileCheck %s -check-prefixes=ALL,NOT-R6 11*9880d681SAndroid Build Coastguard Worker; RUN: llc -march=mips64 -mcpu=mips64r3 -asm-show-inst < %s | FileCheck %s -check-prefixes=ALL,NOT-R6 12*9880d681SAndroid Build Coastguard Worker; RUN: llc -march=mips64 -mcpu=mips64r5 -asm-show-inst < %s | FileCheck %s -check-prefixes=ALL,NOT-R6 13*9880d681SAndroid Build Coastguard Worker; RUN: llc -march=mips64 -mcpu=mips64r6 -asm-show-inst < %s | FileCheck %s -check-prefixes=ALL,R6 14*9880d681SAndroid Build Coastguard Worker 15*9880d681SAndroid Build Coastguard Workerdefine i32 @br(i8 *%addr) { 16*9880d681SAndroid Build Coastguard Worker; ALL-LABEL: br: 17*9880d681SAndroid Build Coastguard Worker; NOT-R6: jr $4 # <MCInst #{{[0-9]+}} JR 18*9880d681SAndroid Build Coastguard Worker; R6C: jrc $4 # <MCInst #{{[0-9]+}} JIC 19*9880d681SAndroid Build Coastguard Worker 20*9880d681SAndroid Build Coastguard Worker 21*9880d681SAndroid Build Coastguard Worker; ALL: $BB0_1: # %L1 22*9880d681SAndroid Build Coastguard Worker; NOT-R6: jr $ra # <MCInst #{{[0-9]+}} JR 23*9880d681SAndroid Build Coastguard Worker; R6: jr $ra # <MCInst #{{[0-9]+}} JALR 24*9880d681SAndroid Build Coastguard Worker; R6C: jr $ra # <MCInst #{{[0-9]+}} JALR 25*9880d681SAndroid Build Coastguard Worker; ALL: addiu $2, $zero, 0 26*9880d681SAndroid Build Coastguard Worker 27*9880d681SAndroid Build Coastguard Worker; ALL: $BB0_2: # %L2 28*9880d681SAndroid Build Coastguard Worker; NOT-R6: jr $ra # <MCInst #{{[0-9]+}} JR 29*9880d681SAndroid Build Coastguard Worker; R6: jr $ra # <MCInst #{{[0-9]+}} JALR 30*9880d681SAndroid Build Coastguard Worker; R6C: jr $ra # <MCInst #{{[0-9]+}} JALR 31*9880d681SAndroid Build Coastguard Worker; ALL: addiu $2, $zero, 1 32*9880d681SAndroid Build Coastguard Worker 33*9880d681SAndroid Build Coastguard Workerentry: 34*9880d681SAndroid Build Coastguard Worker indirectbr i8* %addr, [label %L1, label %L2] 35*9880d681SAndroid Build Coastguard Worker 36*9880d681SAndroid Build Coastguard WorkerL1: 37*9880d681SAndroid Build Coastguard Worker ret i32 0 38*9880d681SAndroid Build Coastguard Worker 39*9880d681SAndroid Build Coastguard WorkerL2: 40*9880d681SAndroid Build Coastguard Worker ret i32 1 41*9880d681SAndroid Build Coastguard Worker} 42