1*9880d681SAndroid Build Coastguard Worker; RUN: llc -march=mipsel -mcpu=mips32r2 -mattr=+micromips \ 2*9880d681SAndroid Build Coastguard Worker; RUN: -relocation-model=pic -O3 < %s | FileCheck %s 3*9880d681SAndroid Build Coastguard Worker; RUN: llc -O0 -march=mips -mcpu=mips32r2 -mattr=+micromips \ 4*9880d681SAndroid Build Coastguard Worker; RUN: -asm-show-inst < %s | FileCheck %s 5*9880d681SAndroid Build Coastguard Worker 6*9880d681SAndroid Build Coastguard Worker; Branch instruction added to enable FastISel::selectOperator 7*9880d681SAndroid Build Coastguard Worker; to select OR instruction 8*9880d681SAndroid Build Coastguard Workerdefine i32 @f1(i32 signext %a, i32 signext %b) { 9*9880d681SAndroid Build Coastguard Worker; CHECK-LABEL: f1 10*9880d681SAndroid Build Coastguard Worker; CHECK-NOT: OR16_MMR6 11*9880d681SAndroid Build Coastguard Worker %1 = or i32 %a, %b 12*9880d681SAndroid Build Coastguard Worker br label %b1 13*9880d681SAndroid Build Coastguard Workerb1: 14*9880d681SAndroid Build Coastguard Worker ret i32 %1 15*9880d681SAndroid Build Coastguard Worker} 16*9880d681SAndroid Build Coastguard Worker 17*9880d681SAndroid Build Coastguard Workerdefine i32 @f2(i32 signext %a, i32 signext %b) { 18*9880d681SAndroid Build Coastguard Workerentry: 19*9880d681SAndroid Build Coastguard Worker; CHECK-LABEL: f2 20*9880d681SAndroid Build Coastguard Worker; CHECK: or16 21*9880d681SAndroid Build Coastguard Worker %0 = or i32 %a, %b 22*9880d681SAndroid Build Coastguard Worker ret i32 %0 23*9880d681SAndroid Build Coastguard Worker} 24