1*9880d681SAndroid Build Coastguard Worker; RUN: llc < %s | FileCheck %s 2*9880d681SAndroid Build Coastguard Workertarget datalayout = "E-m:e-p:32:32-i64:64-n32" 3*9880d681SAndroid Build Coastguard Workertarget triple = "powerpc-unknown-unknown" 4*9880d681SAndroid Build Coastguard Worker 5*9880d681SAndroid Build Coastguard Worker; Function Attrs: nounwind 6*9880d681SAndroid Build Coastguard Workerdefine i64 @testullf(float %arg) #0 { 7*9880d681SAndroid Build Coastguard Workerentry: 8*9880d681SAndroid Build Coastguard Worker %arg.addr = alloca float, align 4 9*9880d681SAndroid Build Coastguard Worker store float %arg, float* %arg.addr, align 4 10*9880d681SAndroid Build Coastguard Worker %0 = load float, float* %arg.addr, align 4 11*9880d681SAndroid Build Coastguard Worker %conv = fptoui float %0 to i64 12*9880d681SAndroid Build Coastguard Worker ret i64 %conv 13*9880d681SAndroid Build Coastguard Worker 14*9880d681SAndroid Build Coastguard Worker; CHECK-LABEL: @testullf 15*9880d681SAndroid Build Coastguard Worker; CHECK: fctiduz [[REG1:[0-9]+]], 1 16*9880d681SAndroid Build Coastguard Worker; CHECK: stfd [[REG1]], [[OFF:[0-9]+]](1) 17*9880d681SAndroid Build Coastguard Worker; CHECK-DAG: lwz 3, [[OFF]](1) 18*9880d681SAndroid Build Coastguard Worker; CHECK-DAG: lwz 4, {{[0-9]+}}(1) 19*9880d681SAndroid Build Coastguard Worker; CHECK: blr 20*9880d681SAndroid Build Coastguard Worker} 21*9880d681SAndroid Build Coastguard Worker 22*9880d681SAndroid Build Coastguard Workerattributes #0 = { nounwind "target-cpu"="a2" } 23*9880d681SAndroid Build Coastguard Worker 24