1*9880d681SAndroid Build Coastguard Worker; RUN: llc < %s -enable-misched -pre-RA-sched=source -scheditins=false \ 2*9880d681SAndroid Build Coastguard Worker; RUN: -disable-ifcvt-triangle-false -disable-post-ra | FileCheck %s 3*9880d681SAndroid Build Coastguard Worker; 4*9880d681SAndroid Build Coastguard Workertarget datalayout = "E-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-f128:128:128-v128:128:128-n32:64" 5*9880d681SAndroid Build Coastguard Workertarget triple = "powerpc64-bgq-linux" 6*9880d681SAndroid Build Coastguard Worker 7*9880d681SAndroid Build Coastguard Worker; %val1 is a load live out of %entry. It should be hoisted 8*9880d681SAndroid Build Coastguard Worker; above the add. 9*9880d681SAndroid Build Coastguard Worker; CHECK-LABEL: testload: 10*9880d681SAndroid Build Coastguard Worker; CHECK: %entry 11*9880d681SAndroid Build Coastguard Worker; CHECK: lwz 12*9880d681SAndroid Build Coastguard Worker; CHECK: addi 13*9880d681SAndroid Build Coastguard Worker; CHECK: bne 14*9880d681SAndroid Build Coastguard Worker; CHECK: %true 15*9880d681SAndroid Build Coastguard Workerdefine i32 @testload(i32 *%ptr, i32 %sumin) { 16*9880d681SAndroid Build Coastguard Workerentry: 17*9880d681SAndroid Build Coastguard Worker %sum1 = add i32 %sumin, 1 18*9880d681SAndroid Build Coastguard Worker %val1 = load i32, i32* %ptr 19*9880d681SAndroid Build Coastguard Worker %p = icmp eq i32 %sumin, 0 20*9880d681SAndroid Build Coastguard Worker br i1 %p, label %true, label %end 21*9880d681SAndroid Build Coastguard Workertrue: 22*9880d681SAndroid Build Coastguard Worker %sum2 = add i32 %sum1, 1 23*9880d681SAndroid Build Coastguard Worker %ptr2 = getelementptr i32, i32* %ptr, i32 1 24*9880d681SAndroid Build Coastguard Worker %val = load i32, i32* %ptr2 25*9880d681SAndroid Build Coastguard Worker %val2 = add i32 %val1, %val 26*9880d681SAndroid Build Coastguard Worker br label %end 27*9880d681SAndroid Build Coastguard Workerend: 28*9880d681SAndroid Build Coastguard Worker %valmerge = phi i32 [ %val1, %entry], [ %val2, %true ] 29*9880d681SAndroid Build Coastguard Worker %summerge = phi i32 [ %sum1, %entry], [ %sum2, %true ] 30*9880d681SAndroid Build Coastguard Worker %sumout = add i32 %valmerge, %summerge 31*9880d681SAndroid Build Coastguard Worker ret i32 %sumout 32*9880d681SAndroid Build Coastguard Worker} 33*9880d681SAndroid Build Coastguard Worker 34*9880d681SAndroid Build Coastguard Worker; The prefetch gets a default latency of 3 cycles and should be hoisted 35*9880d681SAndroid Build Coastguard Worker; above the add. 36*9880d681SAndroid Build Coastguard Worker; 37*9880d681SAndroid Build Coastguard Worker; CHECK-LABEL: testprefetch: 38*9880d681SAndroid Build Coastguard Worker; CHECK: %entry 39*9880d681SAndroid Build Coastguard Worker; CHECK: dcbt 40*9880d681SAndroid Build Coastguard Worker; CHECK: addi 41*9880d681SAndroid Build Coastguard Worker; CHECK: blr 42*9880d681SAndroid Build Coastguard Workerdefine i32 @testprefetch(i8 *%ptr, i32 %i) { 43*9880d681SAndroid Build Coastguard Workerentry: 44*9880d681SAndroid Build Coastguard Worker %val1 = add i32 %i, 1 45*9880d681SAndroid Build Coastguard Worker tail call void @llvm.prefetch( i8* %ptr, i32 0, i32 3, i32 1 ) 46*9880d681SAndroid Build Coastguard Worker %p = icmp eq i32 %i, 0 47*9880d681SAndroid Build Coastguard Worker br i1 %p, label %true, label %end 48*9880d681SAndroid Build Coastguard Workertrue: 49*9880d681SAndroid Build Coastguard Worker %val2 = add i32 %val1, 1 50*9880d681SAndroid Build Coastguard Worker br label %end 51*9880d681SAndroid Build Coastguard Workerend: 52*9880d681SAndroid Build Coastguard Worker %valmerge = phi i32 [ %val1, %entry], [ %val2, %true ] 53*9880d681SAndroid Build Coastguard Worker ret i32 %valmerge 54*9880d681SAndroid Build Coastguard Worker} 55*9880d681SAndroid Build Coastguard Workerdeclare void @llvm.prefetch(i8*, i32, i32, i32) nounwind 56