1*9880d681SAndroid Build Coastguard Worker; Test 16-bit byteswaps from memory to registers. 2*9880d681SAndroid Build Coastguard Worker; 3*9880d681SAndroid Build Coastguard Worker; RUN: llc < %s -mtriple=s390x-linux-gnu | FileCheck %s 4*9880d681SAndroid Build Coastguard Worker 5*9880d681SAndroid Build Coastguard Workerdeclare i16 @llvm.bswap.i16(i16 %a) 6*9880d681SAndroid Build Coastguard Worker 7*9880d681SAndroid Build Coastguard Worker; Check LRVH with no displacement. 8*9880d681SAndroid Build Coastguard Workerdefine i16 @f1(i16 *%src) { 9*9880d681SAndroid Build Coastguard Worker; CHECK-LABEL: f1: 10*9880d681SAndroid Build Coastguard Worker; CHECK: lrvh %r2, 0(%r2) 11*9880d681SAndroid Build Coastguard Worker; CHECK: br %r14 12*9880d681SAndroid Build Coastguard Worker %a = load i16 , i16 *%src 13*9880d681SAndroid Build Coastguard Worker %swapped = call i16 @llvm.bswap.i16(i16 %a) 14*9880d681SAndroid Build Coastguard Worker ret i16 %swapped 15*9880d681SAndroid Build Coastguard Worker} 16*9880d681SAndroid Build Coastguard Worker 17*9880d681SAndroid Build Coastguard Worker; Check the high end of the aligned LRVH range. 18*9880d681SAndroid Build Coastguard Workerdefine i16 @f2(i16 *%src) { 19*9880d681SAndroid Build Coastguard Worker; CHECK-LABEL: f2: 20*9880d681SAndroid Build Coastguard Worker; CHECK: lrvh %r2, 524286(%r2) 21*9880d681SAndroid Build Coastguard Worker; CHECK: br %r14 22*9880d681SAndroid Build Coastguard Worker %ptr = getelementptr i16, i16 *%src, i64 262143 23*9880d681SAndroid Build Coastguard Worker %a = load i16 , i16 *%ptr 24*9880d681SAndroid Build Coastguard Worker %swapped = call i16 @llvm.bswap.i16(i16 %a) 25*9880d681SAndroid Build Coastguard Worker ret i16 %swapped 26*9880d681SAndroid Build Coastguard Worker} 27*9880d681SAndroid Build Coastguard Worker 28*9880d681SAndroid Build Coastguard Worker; Check the next word up, which needs separate address logic. 29*9880d681SAndroid Build Coastguard Worker; Other sequences besides this one would be OK. 30*9880d681SAndroid Build Coastguard Workerdefine i16 @f3(i16 *%src) { 31*9880d681SAndroid Build Coastguard Worker; CHECK-LABEL: f3: 32*9880d681SAndroid Build Coastguard Worker; CHECK: agfi %r2, 524288 33*9880d681SAndroid Build Coastguard Worker; CHECK: lrvh %r2, 0(%r2) 34*9880d681SAndroid Build Coastguard Worker; CHECK: br %r14 35*9880d681SAndroid Build Coastguard Worker %ptr = getelementptr i16, i16 *%src, i64 262144 36*9880d681SAndroid Build Coastguard Worker %a = load i16 , i16 *%ptr 37*9880d681SAndroid Build Coastguard Worker %swapped = call i16 @llvm.bswap.i16(i16 %a) 38*9880d681SAndroid Build Coastguard Worker ret i16 %swapped 39*9880d681SAndroid Build Coastguard Worker} 40*9880d681SAndroid Build Coastguard Worker 41*9880d681SAndroid Build Coastguard Worker; Check the high end of the negative aligned LRVH range. 42*9880d681SAndroid Build Coastguard Workerdefine i16 @f4(i16 *%src) { 43*9880d681SAndroid Build Coastguard Worker; CHECK-LABEL: f4: 44*9880d681SAndroid Build Coastguard Worker; CHECK: lrvh %r2, -2(%r2) 45*9880d681SAndroid Build Coastguard Worker; CHECK: br %r14 46*9880d681SAndroid Build Coastguard Worker %ptr = getelementptr i16, i16 *%src, i64 -1 47*9880d681SAndroid Build Coastguard Worker %a = load i16 , i16 *%ptr 48*9880d681SAndroid Build Coastguard Worker %swapped = call i16 @llvm.bswap.i16(i16 %a) 49*9880d681SAndroid Build Coastguard Worker ret i16 %swapped 50*9880d681SAndroid Build Coastguard Worker} 51*9880d681SAndroid Build Coastguard Worker 52*9880d681SAndroid Build Coastguard Worker; Check the low end of the LRVH range. 53*9880d681SAndroid Build Coastguard Workerdefine i16 @f5(i16 *%src) { 54*9880d681SAndroid Build Coastguard Worker; CHECK-LABEL: f5: 55*9880d681SAndroid Build Coastguard Worker; CHECK: lrvh %r2, -524288(%r2) 56*9880d681SAndroid Build Coastguard Worker; CHECK: br %r14 57*9880d681SAndroid Build Coastguard Worker %ptr = getelementptr i16, i16 *%src, i64 -262144 58*9880d681SAndroid Build Coastguard Worker %a = load i16 , i16 *%ptr 59*9880d681SAndroid Build Coastguard Worker %swapped = call i16 @llvm.bswap.i16(i16 %a) 60*9880d681SAndroid Build Coastguard Worker ret i16 %swapped 61*9880d681SAndroid Build Coastguard Worker} 62*9880d681SAndroid Build Coastguard Worker 63*9880d681SAndroid Build Coastguard Worker; Check the next word down, which needs separate address logic. 64*9880d681SAndroid Build Coastguard Worker; Other sequences besides this one would be OK. 65*9880d681SAndroid Build Coastguard Workerdefine i16 @f6(i16 *%src) { 66*9880d681SAndroid Build Coastguard Worker; CHECK-LABEL: f6: 67*9880d681SAndroid Build Coastguard Worker; CHECK: agfi %r2, -524290 68*9880d681SAndroid Build Coastguard Worker; CHECK: lrvh %r2, 0(%r2) 69*9880d681SAndroid Build Coastguard Worker; CHECK: br %r14 70*9880d681SAndroid Build Coastguard Worker %ptr = getelementptr i16, i16 *%src, i64 -262145 71*9880d681SAndroid Build Coastguard Worker %a = load i16 , i16 *%ptr 72*9880d681SAndroid Build Coastguard Worker %swapped = call i16 @llvm.bswap.i16(i16 %a) 73*9880d681SAndroid Build Coastguard Worker ret i16 %swapped 74*9880d681SAndroid Build Coastguard Worker} 75*9880d681SAndroid Build Coastguard Worker 76*9880d681SAndroid Build Coastguard Worker; Check that LRVH allows an index. 77*9880d681SAndroid Build Coastguard Workerdefine i16 @f7(i64 %src, i64 %index) { 78*9880d681SAndroid Build Coastguard Worker; CHECK-LABEL: f7: 79*9880d681SAndroid Build Coastguard Worker; CHECK: lrvh %r2, 524287({{%r3,%r2|%r2,%r3}}) 80*9880d681SAndroid Build Coastguard Worker; CHECK: br %r14 81*9880d681SAndroid Build Coastguard Worker %add1 = add i64 %src, %index 82*9880d681SAndroid Build Coastguard Worker %add2 = add i64 %add1, 524287 83*9880d681SAndroid Build Coastguard Worker %ptr = inttoptr i64 %add2 to i16 * 84*9880d681SAndroid Build Coastguard Worker %a = load i16 , i16 *%ptr 85*9880d681SAndroid Build Coastguard Worker %swapped = call i16 @llvm.bswap.i16(i16 %a) 86*9880d681SAndroid Build Coastguard Worker ret i16 %swapped 87*9880d681SAndroid Build Coastguard Worker} 88*9880d681SAndroid Build Coastguard Worker 89*9880d681SAndroid Build Coastguard Worker; Check that volatile accesses do not use LRVH, which might access the 90*9880d681SAndroid Build Coastguard Worker; storage multple times. 91*9880d681SAndroid Build Coastguard Workerdefine i16 @f8(i16 *%src) { 92*9880d681SAndroid Build Coastguard Worker; CHECK-LABEL: f8: 93*9880d681SAndroid Build Coastguard Worker; CHECK: lh [[REG:%r[0-5]]], 0(%r2) 94*9880d681SAndroid Build Coastguard Worker; CHECK: lrvr %r2, [[REG]] 95*9880d681SAndroid Build Coastguard Worker; CHECK: br %r14 96*9880d681SAndroid Build Coastguard Worker %a = load volatile i16 , i16 *%src 97*9880d681SAndroid Build Coastguard Worker %swapped = call i16 @llvm.bswap.i16(i16 %a) 98*9880d681SAndroid Build Coastguard Worker ret i16 %swapped 99*9880d681SAndroid Build Coastguard Worker} 100