1*9880d681SAndroid Build Coastguard Worker;; X's live range extends beyond the shift, so the register allocator 2*9880d681SAndroid Build Coastguard Worker;; cannot coalesce it with Y. Because of this, a copy needs to be 3*9880d681SAndroid Build Coastguard Worker;; emitted before the shift to save the register value before it is 4*9880d681SAndroid Build Coastguard Worker;; clobbered. However, this copy is not needed if the register 5*9880d681SAndroid Build Coastguard Worker;; allocator turns the shift into an LEA. This also occurs for ADD. 6*9880d681SAndroid Build Coastguard Worker 7*9880d681SAndroid Build Coastguard Worker; Check that the shift gets turned into an LEA. 8*9880d681SAndroid Build Coastguard Worker 9*9880d681SAndroid Build Coastguard Worker; RUN: llc < %s -march=x86 -x86-asm-syntax=intel | \ 10*9880d681SAndroid Build Coastguard Worker; RUN: not grep "mov E.X, E.X" 11*9880d681SAndroid Build Coastguard Worker 12*9880d681SAndroid Build Coastguard Worker@G = external global i32 ; <i32*> [#uses=1] 13*9880d681SAndroid Build Coastguard Worker 14*9880d681SAndroid Build Coastguard Workerdefine i32 @test1(i32 %X) { 15*9880d681SAndroid Build Coastguard Worker %Z = shl i32 %X, 2 ; <i32> [#uses=1] 16*9880d681SAndroid Build Coastguard Worker store volatile i32 %Z, i32* @G 17*9880d681SAndroid Build Coastguard Worker ret i32 %X 18*9880d681SAndroid Build Coastguard Worker} 19*9880d681SAndroid Build Coastguard Worker 20