1*9880d681SAndroid Build Coastguard Worker; RUN: llc < %s -mcpu=x86-64 -x86-experimental-vector-widening-legalization | FileCheck %s 2*9880d681SAndroid Build Coastguard Worker 3*9880d681SAndroid Build Coastguard Workertarget datalayout = "e-m:e-i64:64-f80:128-n8:16:32:64-S128" 4*9880d681SAndroid Build Coastguard Workertarget triple = "x86_64-unknown-unknown" 5*9880d681SAndroid Build Coastguard Worker 6*9880d681SAndroid Build Coastguard Workerdefine <4 x i32> @zext_v4i8_to_v4i32(<4 x i8>* %ptr) { 7*9880d681SAndroid Build Coastguard Worker; CHECK-LABEL: zext_v4i8_to_v4i32: 8*9880d681SAndroid Build Coastguard Worker; 9*9880d681SAndroid Build Coastguard Worker; CHECK: movd (%{{.*}}), %[[X:xmm[0-9]+]] 10*9880d681SAndroid Build Coastguard Worker; CHECK-NEXT: pxor %[[Z:xmm[0-9]+]], %[[Z]] 11*9880d681SAndroid Build Coastguard Worker; CHECK-NEXT: punpcklbw %[[Z]], %[[X]] 12*9880d681SAndroid Build Coastguard Worker; CHECK-NEXT: punpcklwd %[[Z]], %[[X]] 13*9880d681SAndroid Build Coastguard Worker; CHECK-NEXT: ret 14*9880d681SAndroid Build Coastguard Worker 15*9880d681SAndroid Build Coastguard Worker %val = load <4 x i8>, <4 x i8>* %ptr 16*9880d681SAndroid Build Coastguard Worker %ext = zext <4 x i8> %val to <4 x i32> 17*9880d681SAndroid Build Coastguard Worker ret <4 x i32> %ext 18*9880d681SAndroid Build Coastguard Worker} 19