1*c9945492SAndroid Build Coastguard Worker #define REG_REG0 0 2*c9945492SAndroid Build Coastguard Worker #define REG_REG15 15 3*c9945492SAndroid Build Coastguard Worker #define REG_PC 16 4*c9945492SAndroid Build Coastguard Worker #define REG_PR 17 5*c9945492SAndroid Build Coastguard Worker #define REG_SR 18 6*c9945492SAndroid Build Coastguard Worker #define REG_GBR 19 7*c9945492SAndroid Build Coastguard Worker #define REG_MACH 20 8*c9945492SAndroid Build Coastguard Worker #define REG_MACL 21 9*c9945492SAndroid Build Coastguard Worker #define REG_SYSCALL 22 10*c9945492SAndroid Build Coastguard Worker #define REG_FPREG0 23 11*c9945492SAndroid Build Coastguard Worker #define REG_FPREG15 38 12*c9945492SAndroid Build Coastguard Worker #define REG_XFREG0 39 13*c9945492SAndroid Build Coastguard Worker #define REG_XFREG15 54 14*c9945492SAndroid Build Coastguard Worker #define REG_FPSCR 55 15*c9945492SAndroid Build Coastguard Worker #define REG_FPUL 56 16*c9945492SAndroid Build Coastguard Worker 17*c9945492SAndroid Build Coastguard Worker struct user_fpu_struct { 18*c9945492SAndroid Build Coastguard Worker unsigned long fp_regs[16]; 19*c9945492SAndroid Build Coastguard Worker unsigned long xfp_regs[16]; 20*c9945492SAndroid Build Coastguard Worker unsigned long fpscr; 21*c9945492SAndroid Build Coastguard Worker unsigned long fpul; 22*c9945492SAndroid Build Coastguard Worker }; 23*c9945492SAndroid Build Coastguard Worker 24*c9945492SAndroid Build Coastguard Worker #define ELF_NGREG 23 25*c9945492SAndroid Build Coastguard Worker typedef unsigned long elf_greg_t; 26*c9945492SAndroid Build Coastguard Worker typedef elf_greg_t elf_gregset_t[ELF_NGREG]; 27*c9945492SAndroid Build Coastguard Worker typedef struct user_fpu_struct elf_fpregset_t; 28*c9945492SAndroid Build Coastguard Worker 29*c9945492SAndroid Build Coastguard Worker struct user { 30*c9945492SAndroid Build Coastguard Worker struct { 31*c9945492SAndroid Build Coastguard Worker unsigned long regs[16]; 32*c9945492SAndroid Build Coastguard Worker unsigned long pc, pr, sr, gbr, mach, macl; 33*c9945492SAndroid Build Coastguard Worker long tra; 34*c9945492SAndroid Build Coastguard Worker } regs; 35*c9945492SAndroid Build Coastguard Worker struct user_fpu_struct fpu; 36*c9945492SAndroid Build Coastguard Worker int u_fpvalid; 37*c9945492SAndroid Build Coastguard Worker unsigned long u_tsize; 38*c9945492SAndroid Build Coastguard Worker unsigned long u_dsize; 39*c9945492SAndroid Build Coastguard Worker unsigned long u_ssize; 40*c9945492SAndroid Build Coastguard Worker unsigned long start_code; 41*c9945492SAndroid Build Coastguard Worker unsigned long start_data; 42*c9945492SAndroid Build Coastguard Worker unsigned long start_stack; 43*c9945492SAndroid Build Coastguard Worker long int signal; 44*c9945492SAndroid Build Coastguard Worker unsigned long u_ar0; 45*c9945492SAndroid Build Coastguard Worker struct user_fpu_struct *u_fpstate; 46*c9945492SAndroid Build Coastguard Worker unsigned long magic; 47*c9945492SAndroid Build Coastguard Worker char u_comm[32]; 48*c9945492SAndroid Build Coastguard Worker }; 49