xref: /aosp_15_r20/external/tcpdump/print-dsa.c (revision 05b00f6010a2396e3db2409989fc67270046269f)
1*05b00f60SXin Li /*
2*05b00f60SXin Li  * Copyright (c) 1988, 1989, 1990, 1991, 1992, 1993, 1994, 1995, 1996, 1997
3*05b00f60SXin Li  *	The Regents of the University of California.  All rights reserved.
4*05b00f60SXin Li  *
5*05b00f60SXin Li  * Redistribution and use in source and binary forms, with or without
6*05b00f60SXin Li  * modification, are permitted provided that: (1) source code distributions
7*05b00f60SXin Li  * retain the above copyright notice and this paragraph in its entirety, (2)
8*05b00f60SXin Li  * distributions including binary code include the above copyright notice and
9*05b00f60SXin Li  * this paragraph in its entirety in the documentation or other materials
10*05b00f60SXin Li  * provided with the distribution, and (3) all advertising materials mentioning
11*05b00f60SXin Li  * features or use of this software display the following acknowledgement:
12*05b00f60SXin Li  * ``This product includes software developed by the University of California,
13*05b00f60SXin Li  * Lawrence Berkeley Laboratory and its contributors.'' Neither the name of
14*05b00f60SXin Li  * the University nor the names of its contributors may be used to endorse
15*05b00f60SXin Li  * or promote products derived from this software without specific prior
16*05b00f60SXin Li  * written permission.
17*05b00f60SXin Li  * THIS SOFTWARE IS PROVIDED ``AS IS'' AND WITHOUT ANY EXPRESS OR IMPLIED
18*05b00f60SXin Li  * WARRANTIES, INCLUDING, WITHOUT LIMITATION, THE IMPLIED WARRANTIES OF
19*05b00f60SXin Li  * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE.
20*05b00f60SXin Li  */
21*05b00f60SXin Li 
22*05b00f60SXin Li /* \summary: Marvell (Ethertype) Distributed Switch Architecture printer */
23*05b00f60SXin Li 
24*05b00f60SXin Li #ifdef HAVE_CONFIG_H
25*05b00f60SXin Li #include <config.h>
26*05b00f60SXin Li #endif
27*05b00f60SXin Li 
28*05b00f60SXin Li #include "netdissect-stdinc.h"
29*05b00f60SXin Li 
30*05b00f60SXin Li #include "netdissect.h"
31*05b00f60SXin Li #include "ethertype.h"
32*05b00f60SXin Li #include "addrtoname.h"
33*05b00f60SXin Li #include "extract.h"
34*05b00f60SXin Li 
35*05b00f60SXin Li /*
36*05b00f60SXin Li  * Format of (Ethertyped or not) DSA tagged frames:
37*05b00f60SXin Li  *
38*05b00f60SXin Li  *      7   6   5   4   3   2   1   0
39*05b00f60SXin Li  *    .   .   .   .   .   .   .   .   .
40*05b00f60SXin Li  *  0 +---+---+---+---+---+---+---+---+
41*05b00f60SXin Li  *    |   Ether Destination Address   |
42*05b00f60SXin Li  * +6 +---+---+---+---+---+---+---+---+
43*05b00f60SXin Li  *    |     Ether Source Address      |
44*05b00f60SXin Li  * +6 +---+---+---+---+---+---+---+---+  +-
45*05b00f60SXin Li  *    |  Prog. DSA Ether Type [15:8]  |  | (8-byte) EDSA Tag
46*05b00f60SXin Li  * +1 +---+---+---+---+---+---+---+---+  | Contains a programmable Ether type,
47*05b00f60SXin Li  *    |  Prog. DSA Ether Type [7:0]   |  | two reserved bytes (always 0),
48*05b00f60SXin Li  * +1 +---+---+---+---+---+---+---+---+  | and a standard DSA tag.
49*05b00f60SXin Li  *    |     Reserved (0x00 0x00)      |  |
50*05b00f60SXin Li  * +2 +---+---+---+---+---+---+---+---+  |  +-
51*05b00f60SXin Li  *    | Mode  |b29|    Src/Trg Dev    |  |  | (4-byte) DSA Tag
52*05b00f60SXin Li  * +1 +---+---+---+---+---+---+---+---+  |  | Contains a DSA tag mode,
53*05b00f60SXin Li  *    |Src/Trg Port/Trunk |b18|b17|b16|  |  | source or target switch device,
54*05b00f60SXin Li  * +1 +---+---+---+---+---+---+---+---+  |  | source or target port or trunk,
55*05b00f60SXin Li  *    | PRI [2:0] |b12|  VID [11:8]   |  |  | and misc (IEEE and FPri) bits.
56*05b00f60SXin Li  * +1 +---+---+---+---+---+---+---+---+  |  |
57*05b00f60SXin Li  *    |           VID [7:0]           |  |  |
58*05b00f60SXin Li  * +1 +---+---+---+---+---+---+---+---+  +- +-
59*05b00f60SXin Li  *    |       Ether Length/Type       |
60*05b00f60SXin Li  * +2 +---+---+---+---+---+---+---+---+
61*05b00f60SXin Li  *    .   .   .   .   .   .   .   .   .
62*05b00f60SXin Li  *
63*05b00f60SXin Li  * Mode: Forward, To_CPU, From_CPU, To_Sniffer
64*05b00f60SXin Li  * b29: (Source or Target) IEEE Tag Mode
65*05b00f60SXin Li  * b18: Forward's Src_Is_Trunk, To_CPU's Code[2], To_Sniffer's Rx_Sniff
66*05b00f60SXin Li  * b17: To_CPU's Code[1]
67*05b00f60SXin Li  * b16: Original frame's CFI
68*05b00f60SXin Li  * b12: To_CPU's Code[0]
69*05b00f60SXin Li  */
70*05b00f60SXin Li 
71*05b00f60SXin Li #define TOK(tag, byte, mask, shift) ((GET_U_1(&(((const u_char *) tag)[byte])) & (mask)) >> (shift))
72*05b00f60SXin Li 
73*05b00f60SXin Li #define DSA_LEN 4
74*05b00f60SXin Li #define DSA_MODE(tag) TOK(tag, 0, 0xc0, 6)
75*05b00f60SXin Li #define  DSA_MODE_TO_CPU 0x0
76*05b00f60SXin Li #define  DSA_MODE_FROM_CPU 0x1
77*05b00f60SXin Li #define  DSA_MODE_TO_SNIFFER 0x2
78*05b00f60SXin Li #define  DSA_MODE_FORWARD 0x3
79*05b00f60SXin Li #define DSA_TAGGED(tag) TOK(tag, 0, 0x20, 5)
80*05b00f60SXin Li #define DSA_DEV(tag) TOK(tag, 0, 0x1f, 0)
81*05b00f60SXin Li #define DSA_PORT(tag) TOK(tag, 1, 0xf8, 3)
82*05b00f60SXin Li #define DSA_TRUNK(tag) TOK(tag, 1, 0x04, 2)
83*05b00f60SXin Li #define DSA_RX_SNIFF(tag) TOK(tag, 1, 0x04, 2)
84*05b00f60SXin Li #define DSA_CFI(tag) TOK(tag, 1, 0x01, 0)
85*05b00f60SXin Li #define DSA_PRI(tag) TOK(tag, 2, 0xe0, 5)
86*05b00f60SXin Li #define DSA_VID(tag) ((u_short)((TOK(tag, 2, 0x0f, 0) << 8) | (TOK(tag, 3, 0xff, 0))))
87*05b00f60SXin Li #define DSA_CODE(tag) ((TOK(tag, 1, 0x06, 1) << 1) | TOK(tag, 2, 0x10, 4))
88*05b00f60SXin Li 
89*05b00f60SXin Li #define EDSA_LEN 8
90*05b00f60SXin Li 
91*05b00f60SXin Li static const struct tok dsa_mode_values[] = {
92*05b00f60SXin Li 	{ DSA_MODE_TO_CPU, "To CPU" },
93*05b00f60SXin Li 	{ DSA_MODE_FROM_CPU, "From CPU" },
94*05b00f60SXin Li 	{ DSA_MODE_TO_SNIFFER, "To Sniffer"},
95*05b00f60SXin Li 	{ DSA_MODE_FORWARD, "Forward" },
96*05b00f60SXin Li 	{ 0, NULL }
97*05b00f60SXin Li };
98*05b00f60SXin Li 
99*05b00f60SXin Li static const struct tok dsa_code_values[] = {
100*05b00f60SXin Li 	{ 0x0, "BPDU (MGMT) Trap" },
101*05b00f60SXin Li 	{ 0x1, "Frame2Reg" },
102*05b00f60SXin Li 	{ 0x2, "IGMP/MLD Trap" },
103*05b00f60SXin Li 	{ 0x3, "Policy Trap" },
104*05b00f60SXin Li 	{ 0x4, "ARP Mirror" },
105*05b00f60SXin Li 	{ 0x5, "Policy Mirror" },
106*05b00f60SXin Li 	{ 0, NULL }
107*05b00f60SXin Li };
108*05b00f60SXin Li 
109*05b00f60SXin Li static void
tag_common_print(netdissect_options * ndo,const u_char * p)110*05b00f60SXin Li tag_common_print(netdissect_options *ndo, const u_char *p)
111*05b00f60SXin Li {
112*05b00f60SXin Li 	if (ndo->ndo_eflag) {
113*05b00f60SXin Li 		ND_PRINT("mode %s, ", tok2str(dsa_mode_values, "unknown", DSA_MODE(p)));
114*05b00f60SXin Li 
115*05b00f60SXin Li 		switch (DSA_MODE(p)) {
116*05b00f60SXin Li 		case DSA_MODE_FORWARD:
117*05b00f60SXin Li 			ND_PRINT("dev %u, %s %u, ", DSA_DEV(p),
118*05b00f60SXin Li 				 DSA_TRUNK(p) ? "trunk" : "port", DSA_PORT(p));
119*05b00f60SXin Li 			break;
120*05b00f60SXin Li 		case DSA_MODE_FROM_CPU:
121*05b00f60SXin Li 			ND_PRINT("target dev %u, port %u, ",
122*05b00f60SXin Li 				 DSA_DEV(p), DSA_PORT(p));
123*05b00f60SXin Li 			break;
124*05b00f60SXin Li 		case DSA_MODE_TO_CPU:
125*05b00f60SXin Li 			ND_PRINT("source dev %u, port %u, ",
126*05b00f60SXin Li 				 DSA_DEV(p), DSA_PORT(p));
127*05b00f60SXin Li 			ND_PRINT("code %s, ",
128*05b00f60SXin Li 				 tok2str(dsa_code_values, "reserved", DSA_CODE(p)));
129*05b00f60SXin Li 			break;
130*05b00f60SXin Li 		case DSA_MODE_TO_SNIFFER:
131*05b00f60SXin Li 			ND_PRINT("source dev %u, port %u, ",
132*05b00f60SXin Li 				 DSA_DEV(p), DSA_PORT(p));
133*05b00f60SXin Li 			ND_PRINT("%s sniff, ",
134*05b00f60SXin Li 				 DSA_RX_SNIFF(p) ? "ingress" : "egress");
135*05b00f60SXin Li 			break;
136*05b00f60SXin Li 		default:
137*05b00f60SXin Li 			break;
138*05b00f60SXin Li 		}
139*05b00f60SXin Li 
140*05b00f60SXin Li 		ND_PRINT("%s, ", DSA_TAGGED(p) ? "tagged" : "untagged");
141*05b00f60SXin Li 		ND_PRINT("%s", DSA_CFI(p) ? "CFI, " : "");
142*05b00f60SXin Li 		ND_PRINT("VID %u, ", DSA_VID(p));
143*05b00f60SXin Li 		ND_PRINT("FPri %u, ", DSA_PRI(p));
144*05b00f60SXin Li 	} else {
145*05b00f60SXin Li 		switch (DSA_MODE(p)) {
146*05b00f60SXin Li 		case DSA_MODE_FORWARD:
147*05b00f60SXin Li 			ND_PRINT("Forward %s %u.%u, ",
148*05b00f60SXin Li 				 DSA_TRUNK(p) ? "trunk" : "port",
149*05b00f60SXin Li 				 DSA_DEV(p), DSA_PORT(p));
150*05b00f60SXin Li 			break;
151*05b00f60SXin Li 		case DSA_MODE_FROM_CPU:
152*05b00f60SXin Li 			ND_PRINT("CPU > port %u.%u, ",
153*05b00f60SXin Li 				 DSA_DEV(p), DSA_PORT(p));
154*05b00f60SXin Li 			break;
155*05b00f60SXin Li 		case DSA_MODE_TO_CPU:
156*05b00f60SXin Li 			ND_PRINT("port %u.%u > CPU, ",
157*05b00f60SXin Li 				 DSA_DEV(p), DSA_PORT(p));
158*05b00f60SXin Li 			break;
159*05b00f60SXin Li 		case DSA_MODE_TO_SNIFFER:
160*05b00f60SXin Li 			ND_PRINT("port %u.%u > %s Sniffer, ",
161*05b00f60SXin Li 				 DSA_DEV(p), DSA_PORT(p),
162*05b00f60SXin Li 				 DSA_RX_SNIFF(p) ? "Rx" : "Tx");
163*05b00f60SXin Li 			break;
164*05b00f60SXin Li 		default:
165*05b00f60SXin Li 			break;
166*05b00f60SXin Li 		}
167*05b00f60SXin Li 
168*05b00f60SXin Li 		ND_PRINT("VLAN %u%c, ", DSA_VID(p), DSA_TAGGED(p) ? 't' : 'u');
169*05b00f60SXin Li 	}
170*05b00f60SXin Li }
171*05b00f60SXin Li 
172*05b00f60SXin Li static void
dsa_tag_print(netdissect_options * ndo,const u_char * bp)173*05b00f60SXin Li dsa_tag_print(netdissect_options *ndo, const u_char *bp)
174*05b00f60SXin Li {
175*05b00f60SXin Li 	if (ndo->ndo_eflag)
176*05b00f60SXin Li 		ND_PRINT("Marvell DSA ");
177*05b00f60SXin Li 	else
178*05b00f60SXin Li 		ND_PRINT("DSA ");
179*05b00f60SXin Li 	tag_common_print(ndo, bp);
180*05b00f60SXin Li }
181*05b00f60SXin Li 
182*05b00f60SXin Li static void
edsa_tag_print(netdissect_options * ndo,const u_char * bp)183*05b00f60SXin Li edsa_tag_print(netdissect_options *ndo, const u_char *bp)
184*05b00f60SXin Li {
185*05b00f60SXin Li 	const u_char *p = bp;
186*05b00f60SXin Li 	uint16_t edsa_etype;
187*05b00f60SXin Li 
188*05b00f60SXin Li 	edsa_etype = GET_BE_U_2(p);
189*05b00f60SXin Li 	if (ndo->ndo_eflag) {
190*05b00f60SXin Li 		ND_PRINT("Marvell EDSA ethertype 0x%04x (%s), ", edsa_etype,
191*05b00f60SXin Li 			 tok2str(ethertype_values, "Unknown", edsa_etype));
192*05b00f60SXin Li 		ND_PRINT("rsvd %u %u, ", GET_U_1(p + 2), GET_U_1(p + 3));
193*05b00f60SXin Li 	} else
194*05b00f60SXin Li 		ND_PRINT("EDSA 0x%04x, ", edsa_etype);
195*05b00f60SXin Li 	p += 4;
196*05b00f60SXin Li 	tag_common_print(ndo, p);
197*05b00f60SXin Li }
198*05b00f60SXin Li 
199*05b00f60SXin Li void
dsa_if_print(netdissect_options * ndo,const struct pcap_pkthdr * h,const u_char * p)200*05b00f60SXin Li dsa_if_print(netdissect_options *ndo, const struct pcap_pkthdr *h, const u_char *p)
201*05b00f60SXin Li {
202*05b00f60SXin Li 	u_int caplen = h->caplen;
203*05b00f60SXin Li 	u_int length = h->len;
204*05b00f60SXin Li 
205*05b00f60SXin Li 	ndo->ndo_protocol = "dsa";
206*05b00f60SXin Li 	ndo->ndo_ll_hdr_len +=
207*05b00f60SXin Li 		ether_switch_tag_print(ndo, p, length, caplen, dsa_tag_print, DSA_LEN);
208*05b00f60SXin Li }
209*05b00f60SXin Li 
210*05b00f60SXin Li void
edsa_if_print(netdissect_options * ndo,const struct pcap_pkthdr * h,const u_char * p)211*05b00f60SXin Li edsa_if_print(netdissect_options *ndo, const struct pcap_pkthdr *h, const u_char *p)
212*05b00f60SXin Li {
213*05b00f60SXin Li 	u_int caplen = h->caplen;
214*05b00f60SXin Li 	u_int length = h->len;
215*05b00f60SXin Li 
216*05b00f60SXin Li 	ndo->ndo_protocol = "edsa";
217*05b00f60SXin Li 	ndo->ndo_ll_hdr_len +=
218*05b00f60SXin Li 		ether_switch_tag_print(ndo, p, length, caplen, edsa_tag_print, EDSA_LEN);
219*05b00f60SXin Li }
220