xref: /btstack/3rd-party/micro-ecc/scripts/square_arm.py (revision 6ccd8248590f666db07dd7add13fecb4f5664fb5)
1*6ccd8248SMilanka Ringwald#!/usr/bin/env python3
2af03003cSMatthias Ringwald
3af03003cSMatthias Ringwaldimport sys
4af03003cSMatthias Ringwald
5af03003cSMatthias Ringwaldif len(sys.argv) < 2:
6*6ccd8248SMilanka Ringwald    print("Provide the integer size in 32-bit words")
7af03003cSMatthias Ringwald    sys.exit(1)
8af03003cSMatthias Ringwald
9af03003cSMatthias Ringwaldsize = int(sys.argv[1])
10af03003cSMatthias Ringwald
11af03003cSMatthias Ringwaldif size > 8:
12*6ccd8248SMilanka Ringwald    print("This script doesn't work with integer size %s due to laziness" % (size))
13af03003cSMatthias Ringwald    sys.exit(1)
14af03003cSMatthias Ringwald
15af03003cSMatthias Ringwaldinit_size = 0
16af03003cSMatthias Ringwaldif size > 6:
17af03003cSMatthias Ringwald    init_size = size - 6
18af03003cSMatthias Ringwald
19af03003cSMatthias Ringwalddef emit(line, *args):
20af03003cSMatthias Ringwald    s = '"' + line + r' \n\t"'
21*6ccd8248SMilanka Ringwald    print(s % args)
22af03003cSMatthias Ringwald
23af03003cSMatthias Ringwalddef mulacc(acc, r1, r2):
24af03003cSMatthias Ringwald    if size <= 6:
25af03003cSMatthias Ringwald        emit("umull r1, r14, r%s, r%s", r1, r2)
26af03003cSMatthias Ringwald        emit("adds r%s, r1", acc[0])
27af03003cSMatthias Ringwald        emit("adcs r%s, r14", acc[1])
28af03003cSMatthias Ringwald        emit("adc r%s, #0", acc[2])
29af03003cSMatthias Ringwald    else:
30af03003cSMatthias Ringwald        emit("mov r14, r%s", acc[1])
31af03003cSMatthias Ringwald        emit("umlal r%s, r%s, r%s, r%s", acc[0], acc[1], r1, r2)
32af03003cSMatthias Ringwald        emit("cmp r14, r%s", acc[1])
33af03003cSMatthias Ringwald        emit("it hi")
34af03003cSMatthias Ringwald        emit("adchi r%s, #0", acc[2])
35af03003cSMatthias Ringwald
36af03003cSMatthias Ringwaldr = [2, 3, 4, 5, 6, 7]
37af03003cSMatthias Ringwald
38af03003cSMatthias Ringwalds = size - init_size
39af03003cSMatthias Ringwald
40af03003cSMatthias Ringwaldif init_size == 1:
41af03003cSMatthias Ringwald    emit("ldmia r1!, {r2}")
42af03003cSMatthias Ringwald    emit("add r1, %s", (size - init_size * 2) * 4)
43af03003cSMatthias Ringwald    emit("ldmia r1!, {r5}")
44af03003cSMatthias Ringwald
45af03003cSMatthias Ringwald    emit("add r0, %s", (size - init_size) * 4)
46af03003cSMatthias Ringwald    emit("umull r8, r9, r2, r5")
47af03003cSMatthias Ringwald    emit("stmia r0!, {r8, r9}")
48af03003cSMatthias Ringwald
49af03003cSMatthias Ringwald    emit("sub r0, %s", (size + init_size) * 4)
50af03003cSMatthias Ringwald    emit("sub r1, %s", (size) * 4)
51*6ccd8248SMilanka Ringwald    print("")
52af03003cSMatthias Ringwaldelif init_size == 2:
53af03003cSMatthias Ringwald    emit("ldmia r1!, {r2, r3}")
54af03003cSMatthias Ringwald    emit("add r1, %s", (size - init_size * 2) * 4)
55af03003cSMatthias Ringwald    emit("ldmia r1!, {r5, r6}")
56af03003cSMatthias Ringwald
57af03003cSMatthias Ringwald    emit("add r0, %s", (size - init_size) * 4)
58*6ccd8248SMilanka Ringwald    print("")
59af03003cSMatthias Ringwald
60af03003cSMatthias Ringwald    emit("umull r8, r9, r2, r5")
61af03003cSMatthias Ringwald    emit("stmia r0!, {r8}")
62*6ccd8248SMilanka Ringwald    print("")
63af03003cSMatthias Ringwald
64af03003cSMatthias Ringwald    emit("umull r12, r10, r2, r6")
65af03003cSMatthias Ringwald    emit("adds r9, r12")
66af03003cSMatthias Ringwald    emit("adc r10, #0")
67af03003cSMatthias Ringwald    emit("stmia r0!, {r9}")
68*6ccd8248SMilanka Ringwald    print("")
69af03003cSMatthias Ringwald
70af03003cSMatthias Ringwald    emit("umull r8, r9, r3, r6")
71af03003cSMatthias Ringwald    emit("adds r10, r8")
72af03003cSMatthias Ringwald    emit("adc r11, r9, #0")
73af03003cSMatthias Ringwald    emit("stmia r0!, {r10, r11}")
74*6ccd8248SMilanka Ringwald    print("")
75af03003cSMatthias Ringwald
76af03003cSMatthias Ringwald    emit("sub r0, %s", (size + init_size) * 4)
77af03003cSMatthias Ringwald    emit("sub r1, %s", (size) * 4)
78af03003cSMatthias Ringwald
79af03003cSMatthias Ringwald# load input words
80*6ccd8248SMilanka Ringwaldemit("ldmia r1!, {%s}", ", ".join(["r%s" % (r[i]) for i in range(s)]))
81*6ccd8248SMilanka Ringwaldprint("")
82af03003cSMatthias Ringwald
83af03003cSMatthias Ringwaldemit("umull r11, r12, r2, r2")
84af03003cSMatthias Ringwaldemit("stmia r0!, {r11}")
85*6ccd8248SMilanka Ringwaldprint("")
86af03003cSMatthias Ringwaldemit("mov r9, #0")
87af03003cSMatthias Ringwaldemit("umull r10, r11, r2, r3")
88af03003cSMatthias Ringwaldemit("adds r12, r10")
89af03003cSMatthias Ringwaldemit("adcs r8, r11, #0")
90af03003cSMatthias Ringwaldemit("adc r9, #0")
91af03003cSMatthias Ringwaldemit("adds r12, r10")
92af03003cSMatthias Ringwaldemit("adcs r8, r11")
93af03003cSMatthias Ringwaldemit("adc r9, #0")
94af03003cSMatthias Ringwaldemit("stmia r0!, {r12}")
95*6ccd8248SMilanka Ringwaldprint("")
96af03003cSMatthias Ringwaldemit("mov r10, #0")
97af03003cSMatthias Ringwaldemit("umull r11, r12, r2, r4")
98af03003cSMatthias Ringwaldemit("adds r11, r11")
99af03003cSMatthias Ringwaldemit("adcs r12, r12")
100af03003cSMatthias Ringwaldemit("adc r10, #0")
101af03003cSMatthias Ringwaldemit("adds r8, r11")
102af03003cSMatthias Ringwaldemit("adcs r9, r12")
103af03003cSMatthias Ringwaldemit("adc r10, #0")
104af03003cSMatthias Ringwaldemit("umull r11, r12, r3, r3")
105af03003cSMatthias Ringwaldemit("adds r8, r11")
106af03003cSMatthias Ringwaldemit("adcs r9, r12")
107af03003cSMatthias Ringwaldemit("adc r10, #0")
108af03003cSMatthias Ringwaldemit("stmia r0!, {r8}")
109*6ccd8248SMilanka Ringwaldprint("")
110af03003cSMatthias Ringwald
111af03003cSMatthias Ringwaldacc = [8, 9, 10]
112af03003cSMatthias Ringwaldold_acc = [11, 12]
113*6ccd8248SMilanka Ringwaldfor i in range(3, s):
114af03003cSMatthias Ringwald    emit("mov r%s, #0", old_acc[1])
115af03003cSMatthias Ringwald    tmp = [acc[1], acc[2]]
116af03003cSMatthias Ringwald    acc = [acc[0], old_acc[0], old_acc[1]]
117af03003cSMatthias Ringwald    old_acc = tmp
118af03003cSMatthias Ringwald
119af03003cSMatthias Ringwald    # gather non-equal words
120af03003cSMatthias Ringwald    emit("umull r%s, r%s, r%s, r%s", acc[0], acc[1], r[0], r[i])
121*6ccd8248SMilanka Ringwald    for j in range(1, (i+1)//2):
122af03003cSMatthias Ringwald        mulacc(acc, r[j], r[i-j])
123af03003cSMatthias Ringwald    # multiply by 2
124af03003cSMatthias Ringwald    emit("adds r%s, r%s", acc[0], acc[0])
125af03003cSMatthias Ringwald    emit("adcs r%s, r%s", acc[1], acc[1])
126af03003cSMatthias Ringwald    emit("adc r%s, r%s", acc[2], acc[2])
127af03003cSMatthias Ringwald
128af03003cSMatthias Ringwald    # add equal word (if any)
129af03003cSMatthias Ringwald    if ((i+1) % 2) != 0:
130af03003cSMatthias Ringwald        mulacc(acc, r[i//2], r[i//2])
131af03003cSMatthias Ringwald
132af03003cSMatthias Ringwald    # add old accumulator
133af03003cSMatthias Ringwald    emit("adds r%s, r%s", acc[0], old_acc[0])
134af03003cSMatthias Ringwald    emit("adcs r%s, r%s", acc[1], old_acc[1])
135af03003cSMatthias Ringwald    emit("adc r%s, #0", acc[2])
136af03003cSMatthias Ringwald
137af03003cSMatthias Ringwald    # store
138af03003cSMatthias Ringwald    emit("stmia r0!, {r%s}", acc[0])
139*6ccd8248SMilanka Ringwald    print("")
140af03003cSMatthias Ringwald
141af03003cSMatthias Ringwaldregs = list(r)
142*6ccd8248SMilanka Ringwaldfor i in range(init_size):
143af03003cSMatthias Ringwald    regs = regs[1:] + regs[:1]
144af03003cSMatthias Ringwald    emit("ldmia r1!, {r%s}", regs[5])
145af03003cSMatthias Ringwald
146af03003cSMatthias Ringwald    for limit in [4, 5]:
147af03003cSMatthias Ringwald        emit("mov r%s, #0", old_acc[1])
148af03003cSMatthias Ringwald        tmp = [acc[1], acc[2]]
149af03003cSMatthias Ringwald        acc = [acc[0], old_acc[0], old_acc[1]]
150af03003cSMatthias Ringwald        old_acc = tmp
151af03003cSMatthias Ringwald
152af03003cSMatthias Ringwald        # gather non-equal words
153af03003cSMatthias Ringwald        emit("umull r%s, r%s, r%s, r%s", acc[0], acc[1], regs[0], regs[limit])
154*6ccd8248SMilanka Ringwald        for j in range(1, (limit+1)//2):
155af03003cSMatthias Ringwald            mulacc(acc, regs[j], regs[limit-j])
156af03003cSMatthias Ringwald
157af03003cSMatthias Ringwald        emit("ldr r14, [r0]") # load stored value from initial block, and add to accumulator
158af03003cSMatthias Ringwald        emit("adds r%s, r14", acc[0])
159af03003cSMatthias Ringwald        emit("adcs r%s, #0", acc[1])
160af03003cSMatthias Ringwald        emit("adc r%s, #0", acc[2])
161af03003cSMatthias Ringwald
162af03003cSMatthias Ringwald        # multiply by 2
163af03003cSMatthias Ringwald        emit("adds r%s, r%s", acc[0], acc[0])
164af03003cSMatthias Ringwald        emit("adcs r%s, r%s", acc[1], acc[1])
165af03003cSMatthias Ringwald        emit("adc r%s, r%s", acc[2], acc[2])
166af03003cSMatthias Ringwald
167af03003cSMatthias Ringwald        # add equal word
168af03003cSMatthias Ringwald        if limit == 4:
169af03003cSMatthias Ringwald            mulacc(acc, regs[2], regs[2])
170af03003cSMatthias Ringwald
171af03003cSMatthias Ringwald        # add old accumulator
172af03003cSMatthias Ringwald        emit("adds r%s, r%s", acc[0], old_acc[0])
173af03003cSMatthias Ringwald        emit("adcs r%s, r%s", acc[1], old_acc[1])
174af03003cSMatthias Ringwald        emit("adc r%s, #0", acc[2])
175af03003cSMatthias Ringwald
176af03003cSMatthias Ringwald        # store
177af03003cSMatthias Ringwald        emit("stmia r0!, {r%s}", acc[0])
178*6ccd8248SMilanka Ringwald        print("")
179af03003cSMatthias Ringwald
180*6ccd8248SMilanka Ringwaldfor i in range(1, s-3):
181af03003cSMatthias Ringwald    emit("mov r%s, #0", old_acc[1])
182af03003cSMatthias Ringwald    tmp = [acc[1], acc[2]]
183af03003cSMatthias Ringwald    acc = [acc[0], old_acc[0], old_acc[1]]
184af03003cSMatthias Ringwald    old_acc = tmp
185af03003cSMatthias Ringwald
186af03003cSMatthias Ringwald    # gather non-equal words
187af03003cSMatthias Ringwald    emit("umull r%s, r%s, r%s, r%s", acc[0], acc[1], regs[i], regs[s - 1])
188*6ccd8248SMilanka Ringwald    for j in range(1, (s-i)//2):
189af03003cSMatthias Ringwald        mulacc(acc, regs[i+j], regs[s - 1 - j])
190af03003cSMatthias Ringwald
191af03003cSMatthias Ringwald    # multiply by 2
192af03003cSMatthias Ringwald    emit("adds r%s, r%s", acc[0], acc[0])
193af03003cSMatthias Ringwald    emit("adcs r%s, r%s", acc[1], acc[1])
194af03003cSMatthias Ringwald    emit("adc r%s, r%s", acc[2], acc[2])
195af03003cSMatthias Ringwald
196af03003cSMatthias Ringwald    # add equal word (if any)
197af03003cSMatthias Ringwald    if ((s-i) % 2) != 0:
198af03003cSMatthias Ringwald        mulacc(acc, regs[i + (s-i)//2], regs[i + (s-i)//2])
199af03003cSMatthias Ringwald
200af03003cSMatthias Ringwald    # add old accumulator
201af03003cSMatthias Ringwald    emit("adds r%s, r%s", acc[0], old_acc[0])
202af03003cSMatthias Ringwald    emit("adcs r%s, r%s", acc[1], old_acc[1])
203af03003cSMatthias Ringwald    emit("adc r%s, #0", acc[2])
204af03003cSMatthias Ringwald
205af03003cSMatthias Ringwald    # store
206af03003cSMatthias Ringwald    emit("stmia r0!, {r%s}", acc[0])
207*6ccd8248SMilanka Ringwald    print("")
208af03003cSMatthias Ringwald
209af03003cSMatthias Ringwaldacc = acc[1:] + acc[:1]
210af03003cSMatthias Ringwaldemit("mov r%s, #0", acc[2])
211af03003cSMatthias Ringwaldemit("umull r1, r%s, r%s, r%s", old_acc[1], regs[s - 3], regs[s - 1])
212af03003cSMatthias Ringwaldemit("adds r1, r1")
213af03003cSMatthias Ringwaldemit("adcs r%s, r%s", old_acc[1], old_acc[1])
214af03003cSMatthias Ringwaldemit("adc r%s, #0", acc[2])
215af03003cSMatthias Ringwaldemit("adds r%s, r1", acc[0])
216af03003cSMatthias Ringwaldemit("adcs r%s, r%s", acc[1], old_acc[1])
217af03003cSMatthias Ringwaldemit("adc r%s, #0", acc[2])
218af03003cSMatthias Ringwaldemit("umull r1, r%s, r%s, r%s", old_acc[1], regs[s - 2], regs[s - 2])
219af03003cSMatthias Ringwaldemit("adds r%s, r1", acc[0])
220af03003cSMatthias Ringwaldemit("adcs r%s, r%s", acc[1], old_acc[1])
221af03003cSMatthias Ringwaldemit("adc r%s, #0", acc[2])
222af03003cSMatthias Ringwaldemit("stmia r0!, {r%s}", acc[0])
223*6ccd8248SMilanka Ringwaldprint("")
224af03003cSMatthias Ringwald
225af03003cSMatthias Ringwaldacc = acc[1:] + acc[:1]
226af03003cSMatthias Ringwaldemit("mov r%s, #0", acc[2])
227af03003cSMatthias Ringwaldemit("umull r1, r%s, r%s, r%s", old_acc[1], regs[s - 2], regs[s - 1])
228af03003cSMatthias Ringwaldemit("adds r1, r1")
229af03003cSMatthias Ringwaldemit("adcs r%s, r%s", old_acc[1], old_acc[1])
230af03003cSMatthias Ringwaldemit("adc r%s, #0", acc[2])
231af03003cSMatthias Ringwaldemit("adds r%s, r1", acc[0])
232af03003cSMatthias Ringwaldemit("adcs r%s, r%s", acc[1], old_acc[1])
233af03003cSMatthias Ringwaldemit("adc r%s, #0", acc[2])
234af03003cSMatthias Ringwaldemit("stmia r0!, {r%s}", acc[0])
235*6ccd8248SMilanka Ringwaldprint("")
236af03003cSMatthias Ringwald
237af03003cSMatthias Ringwaldacc = acc[1:] + acc[:1]
238af03003cSMatthias Ringwaldemit("umull r1, r%s, r%s, r%s", old_acc[1], regs[s - 1], regs[s - 1])
239af03003cSMatthias Ringwaldemit("adds r%s, r1", acc[0])
240af03003cSMatthias Ringwaldemit("adcs r%s, r%s", acc[1], old_acc[1])
241af03003cSMatthias Ringwaldemit("stmia r0!, {r%s}", acc[0])
242af03003cSMatthias Ringwaldemit("stmia r0!, {r%s}", acc[1])
243