xref: /btstack/port/archive/msp-exp430f5438-cc2564b/firmware/hal_board.h (revision 1664436fd643daf66517dc309e6cc72448e8a86d)
1*1664436fSMatthias Ringwald /************************************************************************
2*1664436fSMatthias Ringwald     Filename: hal_board.h
3*1664436fSMatthias Ringwald 
4*1664436fSMatthias Ringwald     Copyright 2008 Texas Instruments, Inc.
5*1664436fSMatthias Ringwald ***************************************************************************/
6*1664436fSMatthias Ringwald #ifndef HAL_BOARD_H
7*1664436fSMatthias Ringwald #define HAL_BOARD_H
8*1664436fSMatthias Ringwald 
9*1664436fSMatthias Ringwald // LED 1 = P1.0
10*1664436fSMatthias Ringwald #define LED1_DIR P1DIR
11*1664436fSMatthias Ringwald #define LED1_OUT P1OUT
12*1664436fSMatthias Ringwald #define LED1_PIN BIT0
13*1664436fSMatthias Ringwald 
14*1664436fSMatthias Ringwald // LED 2 = P1.1
15*1664436fSMatthias Ringwald #define LED2_DIR P1DIR
16*1664436fSMatthias Ringwald #define LED2_OUT P1OUT
17*1664436fSMatthias Ringwald #define LED2_PIN BIT1
18*1664436fSMatthias Ringwald 
19*1664436fSMatthias Ringwald #define CLK_PORT_DIR      P11DIR
20*1664436fSMatthias Ringwald #define CLK_PORT_OUT      P11OUT
21*1664436fSMatthias Ringwald #define CLK_PORT_SEL      P11SEL
22*1664436fSMatthias Ringwald 
23*1664436fSMatthias Ringwald #define ACLK_PIN          BIT0
24*1664436fSMatthias Ringwald #define MCLK_PIN          BIT1
25*1664436fSMatthias Ringwald #define SMCLK_PIN         BIT2
26*1664436fSMatthias Ringwald 
27*1664436fSMatthias Ringwald #define XT1_XTAL_DIR      P7DIR
28*1664436fSMatthias Ringwald #define XT1_XTAL_SEL      P7SEL
29*1664436fSMatthias Ringwald #define XT1_XTAL_OUT      P7OUT
30*1664436fSMatthias Ringwald 
31*1664436fSMatthias Ringwald #define SYSCLK_1MHZ             0
32*1664436fSMatthias Ringwald #define SYSCLK_4MHZ             1
33*1664436fSMatthias Ringwald #define SYSCLK_8MHZ             2
34*1664436fSMatthias Ringwald #define SYSCLK_12MHZ            3
35*1664436fSMatthias Ringwald #define SYSCLK_16MHZ            4
36*1664436fSMatthias Ringwald #define SYSCLK_20MHZ            5
37*1664436fSMatthias Ringwald #define SYSCLK_25MHZ            6
38*1664436fSMatthias Ringwald 
39*1664436fSMatthias Ringwald #define DCO_MULT_1MHZ           30
40*1664436fSMatthias Ringwald #define DCO_MULT_4MHZ           122
41*1664436fSMatthias Ringwald #define DCO_MULT_8MHZ           244
42*1664436fSMatthias Ringwald #define DCO_MULT_12MHZ          366
43*1664436fSMatthias Ringwald #define DCO_MULT_16MHZ          488
44*1664436fSMatthias Ringwald #define DCO_MULT_20MHZ          610
45*1664436fSMatthias Ringwald #define DCO_MULT_25MHZ          763
46*1664436fSMatthias Ringwald 
47*1664436fSMatthias Ringwald #define DCORSEL_1MHZ            DCORSEL_2
48*1664436fSMatthias Ringwald #define DCORSEL_4MHZ            DCORSEL_4
49*1664436fSMatthias Ringwald #define DCORSEL_8MHZ            DCORSEL_4
50*1664436fSMatthias Ringwald #define DCORSEL_12MHZ           DCORSEL_5
51*1664436fSMatthias Ringwald #define DCORSEL_16MHZ           DCORSEL_5
52*1664436fSMatthias Ringwald #define DCORSEL_20MHZ           DCORSEL_6
53*1664436fSMatthias Ringwald #define DCORSEL_25MHZ           DCORSEL_7
54*1664436fSMatthias Ringwald 
55*1664436fSMatthias Ringwald // Due to erratum FLASH28 the expected VCORE settings, as follows,
56*1664436fSMatthias Ringwald // cannot be achieved. The Vcore setting should not be changed.
57*1664436fSMatthias Ringwald //#define VCORE_1MHZ              PMMCOREV_0
58*1664436fSMatthias Ringwald //#define VCORE_4MHZ              PMMCOREV_0
59*1664436fSMatthias Ringwald //#define VCORE_8MHZ              PMMCOREV_0
60*1664436fSMatthias Ringwald //#define VCORE_12MHZ             PMMCOREV_0
61*1664436fSMatthias Ringwald //#define VCORE_16MHZ             PMMCOREV_1
62*1664436fSMatthias Ringwald //#define VCORE_20MHZ             PMMCOREV_2
63*1664436fSMatthias Ringwald //#define VCORE_25MHZ             PMMCOREV_3
64*1664436fSMatthias Ringwald #define VCORE_1MHZ              PMMCOREV_2
65*1664436fSMatthias Ringwald #define VCORE_4MHZ              PMMCOREV_2
66*1664436fSMatthias Ringwald #define VCORE_8MHZ              PMMCOREV_2
67*1664436fSMatthias Ringwald #define VCORE_12MHZ             PMMCOREV_2
68*1664436fSMatthias Ringwald #define VCORE_16MHZ             PMMCOREV_2
69*1664436fSMatthias Ringwald 
70*1664436fSMatthias Ringwald // Due to erratum FLASH28 the expected VCORE settings, as follows,
71*1664436fSMatthias Ringwald // cannot be achieved. The Vcore setting should not be changed.
72*1664436fSMatthias Ringwald //#define VCORE_1_35V             PMMCOREV_0
73*1664436fSMatthias Ringwald //#define VCORE_1_55V             PMMCOREV_1
74*1664436fSMatthias Ringwald #define VCORE_1_75V             PMMCOREV_2
75*1664436fSMatthias Ringwald //#define VCORE_1_85V             PMMCOREV_3
76*1664436fSMatthias Ringwald 
77*1664436fSMatthias Ringwald /*----------------------------------------------------------------
78*1664436fSMatthias Ringwald  *                  Function Prototypes
79*1664436fSMatthias Ringwald  *----------------------------------------------------------------
80*1664436fSMatthias Ringwald  */
81*1664436fSMatthias Ringwald 
82*1664436fSMatthias Ringwald void halBoardSetVCore(unsigned char level);
83*1664436fSMatthias Ringwald void halBoardDisableSVS(void);
84*1664436fSMatthias Ringwald void halBoardEnableSVS(void);
85*1664436fSMatthias Ringwald void halBoardStartXT1(void);
86*1664436fSMatthias Ringwald void halBoardSetSystemClock(unsigned char systemClockSpeed);
87*1664436fSMatthias Ringwald void halBoardOutputSystemClock(void);
88*1664436fSMatthias Ringwald void halBoardStopOutputSystemClock(void);
89*1664436fSMatthias Ringwald void halBoardInit(void);
90*1664436fSMatthias Ringwald 
91*1664436fSMatthias Ringwald #endif
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