1*49a45ad9SMatthias Ringwald# MAX3263x HDK CMSIS-DAP SWD firmware load script 2*49a45ad9SMatthias Ringwald 3*49a45ad9SMatthias Ringwaldinterface cmsis-dap 4*49a45ad9SMatthias Ringwald 5*49a45ad9SMatthias Ringwald# adapter speed 6*49a45ad9SMatthias Ringwaldadapter_khz 2000 7*49a45ad9SMatthias Ringwald 8*49a45ad9SMatthias Ringwald# reset pin configuration 9*49a45ad9SMatthias Ringwaldreset_config srst_only 10*49a45ad9SMatthias Ringwald 11*49a45ad9SMatthias Ringwald# SWD DAP 12*49a45ad9SMatthias Ringwaldswd newdap max32630 cpu -irlen 4 -irmask 0xf -ircapture 0x1 -expected-id 0x07f67197 -ignore-version 13*49a45ad9SMatthias Ringwald 14*49a45ad9SMatthias Ringwald# target configuration 15*49a45ad9SMatthias Ringwaldtarget create max32630.cpu cortex_m -chain-position max32630.cpu 16*49a45ad9SMatthias Ringwaldmax32630.cpu configure -work-area-phys 0x20005000 -work-area-size 0x2000 17*49a45ad9SMatthias Ringwald 18*49a45ad9SMatthias Ringwald# Config Command: flash bank name driver base size chip_width bus_width target [driver_options] 19*49a45ad9SMatthias Ringwald# flash bank <name> maxim <base> <size> 0 0 <target> <flc base> <sector> <clk> <burst> 20*49a45ad9SMatthias Ringwald# max32630 flash base address 0x00000000 21*49a45ad9SMatthias Ringwald# max32630 flash size 0x200000 (2MB) 22*49a45ad9SMatthias Ringwald# max32630 FLC base address 0x40002000 23*49a45ad9SMatthias Ringwald# max32630 sector (page) size 0x2000 (8kB) 24*49a45ad9SMatthias Ringwald# max32630 clock speed 96 (MHz) 25*49a45ad9SMatthias Ringwaldflash bank max32630.flash maxim 0x00000000 0x200000 0 0 max32630.cpu 0x40002000 0x2000 96 26