xref: /btstack/port/max32630-fthr/src/btstack_port.c (revision 7dc86dfd3569d69491d87d64749fd45afb46c67a)
1 /*******************************************************************************
2 * Copyright (C) 2016 Maxim Integrated Products, Inc., All Rights Reserved.
3 * Author: Ismail H. Kose <[email protected]>
4 *
5 * Permission is hereby granted, free of charge, to any person obtaining a
6 * copy of this software and associated documentation files (the "Software"),
7 * to deal in the Software without restriction, including without limitation
8 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
9 * and/or sell copies of the Software, and to permit persons to whom the
10 * Software is furnished to do so, subject to the following conditions:
11 *
12 * The above copyright notice and this permission notice shall be included
13 * in all copies or substantial portions of the Software.
14 *
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
16 * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
17 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
18 * IN NO EVENT SHALL MAXIM INTEGRATED BE LIABLE FOR ANY CLAIM, DAMAGES
19 * OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
20 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
21 * OTHER DEALINGS IN THE SOFTWARE.
22 *
23 * Except as contained in this notice, the name of Maxim Integrated
24 * Products, Inc. shall not be used except as stated in the Maxim Integrated
25 * Products, Inc. Branding Policy.
26 *
27 * The mere transfer of this software does not imply any licenses
28 * of trade secrets, proprietary technology, copyrights, patents,
29 * trademarks, maskwork rights, or any other form of intellectual
30 * property whatsoever. Maxim Integrated Products, Inc. retains all
31 * ownership rights.
32 *******************************************************************************
33 */
34 
35 #include <stdio.h>
36 #include <string.h>
37 
38 // MXC
39 #include "lp.h"
40 #include "uart.h"
41 #include "board.h"
42 #include "led.h"
43 
44 // BTstack Core
45 #include "btstack_debug.h"
46 #include "btstack.h"
47 #include "btstack_config.h"
48 #include "btstack_run_loop_embedded.h"
49 #include "btstack_chipset_cc256x.h"
50 
51 // BTstack HALs
52 #include "hal_tick.h"
53 #include "hal_stdin.h"
54 
55 #include "btstack_port.h"
56 
57 #define CC256X_UART_ID             0
58 #define UART_RXFIFO_USABLE     (MXC_UART_FIFO_DEPTH-3)
59 
60 static uint32_t baud_rate;
61 
62 // rx state
63 static int  bytes_to_read = 0;
64 static uint8_t * rx_buffer_ptr = 0;
65 
66 // tx state
67 static int bytes_to_write = 0;
68 static uint8_t * tx_buffer_ptr = 0;
69 
70 const gpio_cfg_t PAN1326_SLOW_CLK = { PORT_1, PIN_7, GPIO_FUNC_GPIO,
71 		GPIO_PAD_NORMAL };
72 const gpio_cfg_t PAN1326_nSHUTD = { PORT_1, PIN_6, GPIO_FUNC_GPIO,
73 		GPIO_PAD_NORMAL };
74 const gpio_cfg_t PAN1326_HCIRTS = { PORT_0, PIN_3, GPIO_FUNC_GPIO,
75 		GPIO_PAD_NORMAL };
76 
77 static void dummy_handler(void) {};
78 static void (*rx_done_handler)(void) = dummy_handler;
79 static void (*tx_done_handler)(void) = dummy_handler;
80 
81 
82 
83 void hal_cpu_disable_irqs(void)
84 {
85 	__disable_irq();
86 }
87 
88 void hal_cpu_enable_irqs(void)
89 {
90 	__enable_irq();
91 }
92 void hal_cpu_enable_irqs_and_sleep(void)
93 {
94 	__enable_irq();
95 	/* TODO: Add sleep mode */
96 }
97 
98 void hal_uart_dma_send_block(const uint8_t *buffer, uint16_t len)
99 {
100 	tx_buffer_ptr = (uint8_t *)buffer;
101 	bytes_to_write = len;
102 }
103 
104 void hal_uart_dma_receive_block(uint8_t *buffer, uint16_t len)
105 {
106 	rx_buffer_ptr = buffer;
107 	bytes_to_read = len;
108 }
109 
110 void hal_btstack_run_loop_execute_once(void)
111 {
112 	int rx_avail;
113 	int num_rx_bytes;
114 	int tx_avail;
115 	int rx_bytes;
116 	int tx_bytes;
117 	int ret;
118 
119     while (bytes_to_read) {
120 		rx_avail = UART_NumReadAvail(MXC_UART_GET_UART(CC256X_UART_ID));
121 		if (!rx_avail)
122 			break;
123 
124 		if (bytes_to_read > rx_avail)
125 			num_rx_bytes = rx_avail;
126 		else
127 			num_rx_bytes = bytes_to_read;
128 
129 		ret = UART_Read(MXC_UART_GET_UART(CC256X_UART_ID), rx_buffer_ptr, num_rx_bytes, &rx_bytes);
130 		if (ret < 0)
131 			break;
132 
133 		rx_buffer_ptr += rx_bytes;
134         bytes_to_read -= rx_bytes;
135 
136 		 if (bytes_to_read < 0) {
137 			bytes_to_read = 0;
138 		}
139 
140          if (bytes_to_read == 0){
141              (*rx_done_handler)();
142          }
143      }
144 
145      while (bytes_to_write) {
146 		tx_avail = UART_NumWriteAvail(MXC_UART_GET_UART(CC256X_UART_ID));
147 		if (!tx_avail)
148 			break;
149 
150 		if (bytes_to_write > tx_avail)
151 			tx_bytes = tx_avail;
152 		else
153 			tx_bytes = bytes_to_write;
154 
155 		ret = UART_Write(MXC_UART_GET_UART(CC256X_UART_ID), tx_buffer_ptr, tx_bytes);
156 		if (ret < 0)
157 			break;
158 		bytes_to_write -= tx_bytes;
159 		tx_buffer_ptr += tx_bytes;
160 		if (bytes_to_write < 0) {
161 			bytes_to_write = 0;
162 		}
163 
164         if (bytes_to_write == 0){
165              (*tx_done_handler)();
166         }
167      }
168 
169 	btstack_run_loop_embedded_execute_once();
170 }
171 
172 void hal_uart_init(void)
173 {
174 	int error = 0;
175 	uart_cfg_t cfg;
176 
177 	cfg.parity = UART_PARITY_DISABLE;
178 	cfg.size = UART_DATA_SIZE_8_BITS;
179 	cfg.extra_stop = 0;
180 	cfg.cts = 1;
181 	cfg.rts = 1;
182 
183 	cfg.baud = baud_rate;
184 
185 	sys_cfg_uart_t sys_cfg;
186 	sys_cfg.clk_scale = CLKMAN_SCALE_AUTO;
187 
188 	sys_cfg.io_cfg = (ioman_cfg_t )IOMAN_UART(0,
189 			IOMAN_MAP_B, // io_map
190 			IOMAN_MAP_B, // cts_map
191 			IOMAN_MAP_B, // rts_map
192 			1, // io_en
193 			1, // cts_en
194 			1); //rts_en
195 
196 	if ((error = UART_Init(MXC_UART_GET_UART(CC256X_UART_ID), &cfg, &sys_cfg)) != E_NO_ERROR) {
197 		printf("Error initializing UART %d\n", error);
198 		while (1);
199 	} else {
200 		printf("BTSTACK UART Initialized\n");
201 	}
202 
203 	MXC_UART_GET_UART(CC256X_UART_ID)->ctrl |= MXC_F_UART_CTRL_CTS_POLARITY | MXC_F_UART_CTRL_RTS_POLARITY;
204 	MXC_UART_GET_UART(CC256X_UART_ID)->ctrl &= ~((MXC_UART_FIFO_DEPTH - 4) << (MXC_F_UART_CTRL_RTS_LEVEL_POS));
205 	MXC_UART_GET_UART(CC256X_UART_ID)->ctrl |= ((UART_RXFIFO_USABLE) << MXC_F_UART_CTRL_RTS_LEVEL_POS);
206 }
207 
208 int hal_uart_dma_set_baud(uint32_t baud){
209 	baud_rate = baud;
210 	printf("BAUD RATE IS = %d \n", baud);
211 	hal_uart_init();
212 	return baud_rate;
213 }
214 
215 void hal_uart_dma_init(void){
216 	bytes_to_write = 0;
217 	bytes_to_read = 0;
218 	hal_uart_dma_set_baud(115200);
219 }
220 
221 void hal_uart_dma_set_block_received( void (*block_handler)(void)){
222 	rx_done_handler = block_handler;
223 }
224 
225 void hal_uart_dma_set_block_sent( void (*block_handler)(void)){
226 
227 	tx_done_handler = block_handler;
228 }
229 
230 void hal_uart_dma_set_csr_irq_handler( void (*csr_irq_handler)(void)){
231 
232 }
233 
234 void hal_uart_dma_set_sleep(uint8_t sleep){
235 
236 }
237 
238 void init_slow_clock(void)
239 {
240 	MXC_PWRSEQ->reg0 &= ~(MXC_F_PWRSEQ_REG0_PWR_RTCEN_RUN | MXC_F_PWRSEQ_REG0_PWR_RTCEN_SLP);
241 	MXC_PWRSEQ->reg4 &= ~MXC_F_PWRSEQ_REG4_PWR_PSEQ_32K_EN;
242 	MXC_PWRSEQ->reg0 |= MXC_F_PWRSEQ_REG0_PWR_RTCEN_RUN | MXC_F_PWRSEQ_REG0_PWR_RTCEN_SLP; // Enable RTC
243 	hal_delay_us(1);
244 	MXC_PWRSEQ->reg4 |= MXC_F_PWRSEQ_REG4_PWR_PSEQ_32K_EN; // Enable the RTC out of P1.7
245 }
246 
247 int bt_comm_init() {
248 	int error = 0;
249 	int cnt = 0;
250 
251 	hal_tick_init();
252 	hal_delay_us(1);
253 	if ((error = GPIO_Config(&PAN1326_HCIRTS)) != E_NO_ERROR) {
254 		printf("Error setting PAN1326_HCIRTS %d\n", error);
255 	}
256 	GPIO_OutSet(&PAN1326_HCIRTS);
257 	init_slow_clock();
258 	/*
259 	 * when enabling the P1.7 RTC output, P1.6 will be hardcoded to an input with 25k pullup enabled.
260 	 * There is an internal pullup, so when it is set as an input, it will float high.
261 	 * The PAN1326B data sheet says the NSHUTD pin is pulled down, but the input impedance is stated at 1Meg Ohm,
262 	 * The so the 25k pullup should be enough to reach the minimum 1.42V to enable the device.
263 	 * */
264 	while (GPIO_InGet(&PAN1326_HCIRTS)) {
265 		cnt++;
266 	}
267 
268 	printf("%s CC256X init completed. cnt: %d \n", __func__, cnt);
269 	return 0;
270 }
271 
272 static hci_transport_config_uart_t config = {
273 	    HCI_TRANSPORT_CONFIG_UART,
274 	    115200,
275 	    4000000,
276 	    1, // flow control
277 	    "max32630fthr",
278 	};
279 
280 // hal_led.h implementation
281 #include "hal_led.h"
282 void hal_led_off(void){
283 	LED_Off(LED_BLUE);
284 }
285 
286 void hal_led_on(void){
287 	LED_On(LED_BLUE);
288 }
289 
290 void hal_led_toggle(void){
291 	LED_Toggle(LED_BLUE);
292 }
293 
294 // hal_stdin.h
295 static uint8_t stdin_buffer[1];
296 static void (*stdin_handler)(char c);
297 
298 static uart_req_t uart_byte_request;
299 
300 static void uart_rx_handler(uart_req_t *request, int error)
301 {
302     if (stdin_handler){
303         (*stdin_handler)(stdin_buffer[0]);
304     }
305 	UART_ReadAsync(MXC_UART_GET_UART(CONSOLE_UART), &uart_byte_request);
306 }
307 
308 void hal_stdin_setup(void (*handler)(char c)){
309     // set handler
310     stdin_handler = handler;
311 
312 	/* set input handler */
313 	uart_byte_request.callback = uart_rx_handler;
314 	uart_byte_request.data = stdin_buffer;
315 	uart_byte_request.len = sizeof(uint8_t);
316 	UART_ReadAsync(MXC_UART_GET_UART(CONSOLE_UART), &uart_byte_request);
317 }
318 
319 #if 0
320 
321 #include "btstack_stdin.h"
322 
323 static btstack_data_source_t stdin_data_source;
324 static void (*stdin_handler)(char c);
325 
326 static uart_req_t uart_byte_request;
327 static volatile int stdin_character_received;
328 static uint8_t stdin_buffer[1];
329 
330 static void stdin_rx_complete(void) {
331     stdin_character_received = 1;
332 }
333 
334 static void uart_rx_handler(uart_req_t *request, int error)
335 {
336 	stdin_rx_complete();
337 }
338 
339 static void stdin_process(struct btstack_data_source *ds, btstack_data_source_callback_type_t callback_type){
340     if (!stdin_character_received) return;
341     if (stdin_handler){
342         (*stdin_handler)(stdin_buffer[0]);
343     }
344     stdin_character_received = 0;
345 	UART_ReadAsync(MXC_UART_GET_UART(CONSOLE_UART), &uart_byte_request);
346 }
347 
348 static void btstack_stdin_handler(char c){
349     stdin_character_received = 1;
350     btstack_run_loop_embedded_trigger();
351     printf("Received: %c\n", c);
352 }
353 
354 void btstack_stdin_setup(void (*handler)(char c)){
355     // set handler
356     stdin_handler = handler;
357 
358     // set up polling data_source
359     btstack_run_loop_set_data_source_handler(&stdin_data_source, &stdin_process);
360     btstack_run_loop_enable_data_source_callbacks(&stdin_data_source, DATA_SOURCE_CALLBACK_POLL);
361     btstack_run_loop_add_data_source(&stdin_data_source);
362 
363 	/* set input handler */
364 	uart_byte_request.callback = uart_rx_handler;
365 	uart_byte_request.data = stdin_buffer;
366 	uart_byte_request.len = sizeof(uint8_t);
367 	UART_ReadAsync(MXC_UART_GET_UART(CONSOLE_UART), &uart_byte_request);
368 }
369 #endif
370 
371 #include "hal_flash_bank_mxc.h"
372 #include "btstack_tlv.h"
373 #include "btstack_tlv_flash_bank.h"
374 #include "btstack_link_key_db_tlv.h"
375 #include "le_device_db_tlv.h"
376 
377 #define HAL_FLASH_BANK_SIZE    0x2000
378 #define HAL_FLASH_BANK_0_ADDR  0x1FC000
379 #define HAL_FLASH_BANK_1_ADDR  0x1FE000
380 
381 static hal_flash_bank_mxc_t hal_flash_bank_context;
382 static btstack_tlv_flash_bank_t btstack_tlv_flash_bank_context;
383 
384 
385 /******************************************************************************/
386 int bluetooth_main(void)
387 {
388 	LED_Off(LED_GREEN);
389 	LED_On(LED_RED);
390 	LED_Off(LED_BLUE);
391 
392 	bt_comm_init();
393 	/* BT Stack Initialization */
394 	btstack_memory_init();
395 	btstack_run_loop_init(btstack_run_loop_embedded_get_instance());
396 
397 	// enable packet logger
398 	//hci_dump_open(NULL, HCI_DUMP_STDOUT);
399 
400 	/* Init HCI */
401 	const hci_transport_t * transport = hci_transport_h4_instance(btstack_uart_block_embedded_instance());
402 	hci_init(transport, &config);
403 	hci_set_chipset(btstack_chipset_cc256x_instance());
404 
405     // setup TLV Flash Bank implementation
406     const hal_flash_bank_t * hal_flash_bank_impl = hal_flash_bank_mxc_init_instance(
407 		&hal_flash_bank_context,
408 		HAL_FLASH_BANK_SIZE,
409 			HAL_FLASH_BANK_0_ADDR,
410 			HAL_FLASH_BANK_1_ADDR);
411     const btstack_tlv_t * btstack_tlv_impl = btstack_tlv_flash_bank_init_instance(
412 		&btstack_tlv_flash_bank_context,
413 			hal_flash_bank_impl,
414 			&hal_flash_bank_context);
415 
416     // setup Link Key DB using TLV
417     const btstack_link_key_db_t * btstack_link_key_db = btstack_link_key_db_tlv_get_instance(btstack_tlv_impl, &btstack_tlv_flash_bank_context);
418     hci_set_link_key_db(btstack_link_key_db);
419 
420     // setup LE Device DB using TLV
421     le_device_db_tlv_configure(btstack_tlv_impl, &btstack_tlv_flash_bank_context);
422 
423     // go
424 	btstack_main(0, (void *)NULL);
425 	return 0;
426 }
427