1 // Author: Xianjun Jiao, Michael Mehari, Wei Liu 2 // SPDX-FileCopyrightText: 2019 UGent 3 // SPDX-License-Identifier: AGPL-3.0-or-later 4 5 #include <linux/bitops.h> 6 #include <linux/dmapool.h> 7 #include <linux/io.h> 8 #include <linux/iopoll.h> 9 #include <linux/of_address.h> 10 #include <linux/of_platform.h> 11 #include <linux/of_irq.h> 12 #include <linux/slab.h> 13 #include <linux/clk.h> 14 #include <linux/io-64-nonatomic-lo-hi.h> 15 16 #include <linux/delay.h> 17 #include <linux/interrupt.h> 18 19 #include <linux/dmaengine.h> 20 #include <linux/slab.h> 21 #include <linux/delay.h> 22 #include <linux/etherdevice.h> 23 24 #include <linux/init.h> 25 #include <linux/kthread.h> 26 #include <linux/module.h> 27 #include <linux/of_dma.h> 28 #include <linux/platform_device.h> 29 #include <linux/random.h> 30 #include <linux/slab.h> 31 #include <linux/wait.h> 32 #include <linux/sched/task.h> 33 #include <linux/dma/xilinx_dma.h> 34 #include <linux/spi/spi.h> 35 #include <net/mac80211.h> 36 37 #include <linux/clk.h> 38 #include <linux/clkdev.h> 39 #include <linux/clk-provider.h> 40 41 #include <linux/iio/iio.h> 42 #include <linux/iio/sysfs.h> 43 44 #include <linux/gpio.h> 45 #include <linux/leds.h> 46 47 #define IIO_AD9361_USE_PRIVATE_H_ 48 #include <../../drivers/iio/adc/ad9361_regs.h> 49 #include <../../drivers/iio/adc/ad9361.h> 50 #include <../../drivers/iio/adc/ad9361_private.h> 51 52 #include <../../drivers/iio/frequency/cf_axi_dds.h> 53 extern int ad9361_get_tx_atten(struct ad9361_rf_phy *phy, u32 tx_num); 54 extern int ad9361_set_tx_atten(struct ad9361_rf_phy *phy, u32 atten_mdb, 55 bool tx1, bool tx2, bool immed); 56 extern int ad9361_ctrl_outs_setup(struct ad9361_rf_phy *phy, 57 struct ctrl_outs_control *ctrl); 58 59 #include "../user_space/sdrctl_src/nl80211_testmode_def.h" 60 #include "hw_def.h" 61 #include "sdr.h" 62 #include "git_rev.h" 63 64 // driver API of component driver 65 extern struct tx_intf_driver_api *tx_intf_api; 66 extern struct rx_intf_driver_api *rx_intf_api; 67 extern struct openofdm_tx_driver_api *openofdm_tx_api; 68 extern struct openofdm_rx_driver_api *openofdm_rx_api; 69 extern struct xpu_driver_api *xpu_api; 70 71 static int test_mode = 0; // 0 normal; 1 rx test 72 73 MODULE_AUTHOR("Xianjun Jiao"); 74 MODULE_DESCRIPTION("SDR driver"); 75 MODULE_LICENSE("GPL v2"); 76 77 module_param(test_mode, int, 0); 78 MODULE_PARM_DESC(myint, "test_mode. 0 normal; 1 rx test"); 79 80 // ---------------rfkill--------------------------------------- 81 static bool openwifi_is_radio_enabled(struct openwifi_priv *priv) 82 { 83 int reg; 84 85 if (priv->tx_intf_cfg == TX_INTF_BW_20MHZ_AT_N_10MHZ_ANT1) 86 reg = ad9361_get_tx_atten(priv->ad9361_phy, 2); 87 else 88 reg = ad9361_get_tx_atten(priv->ad9361_phy, 1); 89 90 if (reg == AD9361_RADIO_ON_TX_ATT) 91 return true;// 0 off, 1 on 92 return false; 93 } 94 95 void openwifi_rfkill_init(struct ieee80211_hw *hw) 96 { 97 struct openwifi_priv *priv = hw->priv; 98 99 priv->rfkill_off = openwifi_is_radio_enabled(priv); 100 printk("%s openwifi_rfkill_init: wireless switch is %s\n", sdr_compatible_str, priv->rfkill_off ? "on" : "off"); 101 wiphy_rfkill_set_hw_state(hw->wiphy, !priv->rfkill_off); 102 wiphy_rfkill_start_polling(hw->wiphy); 103 } 104 105 void openwifi_rfkill_poll(struct ieee80211_hw *hw) 106 { 107 bool enabled; 108 struct openwifi_priv *priv = hw->priv; 109 110 enabled = openwifi_is_radio_enabled(priv); 111 // printk("%s openwifi_rfkill_poll: wireless radio switch turned %s\n", sdr_compatible_str, enabled ? "on" : "off"); 112 if (unlikely(enabled != priv->rfkill_off)) { 113 priv->rfkill_off = enabled; 114 printk("%s openwifi_rfkill_poll: WARNING wireless radio switch turned %s\n", sdr_compatible_str, enabled ? "on" : "off"); 115 wiphy_rfkill_set_hw_state(hw->wiphy, !enabled); 116 } 117 } 118 119 void openwifi_rfkill_exit(struct ieee80211_hw *hw) 120 { 121 printk("%s openwifi_rfkill_exit\n", sdr_compatible_str); 122 wiphy_rfkill_stop_polling(hw->wiphy); 123 } 124 //----------------rfkill end----------------------------------- 125 126 //static void ad9361_rf_init(void); 127 //static void ad9361_rf_stop(void); 128 //static void ad9361_rf_calc_rssi(void); 129 static void ad9361_rf_set_channel(struct ieee80211_hw *dev, 130 struct ieee80211_conf *conf) 131 { 132 struct openwifi_priv *priv = dev->priv; 133 u32 actual_rx_lo = conf->chandef.chan->center_freq - priv->rx_freq_offset_to_lo_MHz + priv->drv_rx_reg_val[DRV_RX_REG_IDX_EXTRA_FO]; 134 u32 actual_tx_lo; 135 bool change_flag = (actual_rx_lo != priv->actual_rx_lo); 136 int static_lbt_th, auto_lbt_th, fpga_lbt_th; 137 138 if (change_flag) { 139 priv->actual_rx_lo = actual_rx_lo; 140 141 actual_tx_lo = conf->chandef.chan->center_freq - priv->tx_freq_offset_to_lo_MHz; 142 143 clk_set_rate(priv->ad9361_phy->clks[RX_RFPLL], ( ((u64)1000000ull)*((u64)actual_rx_lo )>>1) ); 144 clk_set_rate(priv->ad9361_phy->clks[TX_RFPLL], ( ((u64)1000000ull)*((u64)actual_tx_lo )>>1) ); 145 146 if (actual_rx_lo<2412) { 147 priv->rssi_correction = 153; 148 } else if (actual_rx_lo<=2484) { 149 priv->rssi_correction = 153; 150 } else if (actual_rx_lo<5160) { 151 priv->rssi_correction = 153; 152 } else if (actual_rx_lo<=5240) { 153 priv->rssi_correction = 145; 154 } else if (actual_rx_lo<=5320) { 155 priv->rssi_correction = 148; 156 } else { 157 priv->rssi_correction = 148; 158 } 159 160 // xpu_api->XPU_REG_LBT_TH_write((priv->rssi_correction-62)<<1); // -62dBm 161 // xpu_api->XPU_REG_LBT_TH_write((priv->rssi_correction-62-16)<<1); // wei's magic value is 135, here is 134 @ ch 44 162 auto_lbt_th = ((priv->rssi_correction-62-16)<<1); 163 static_lbt_th = priv->drv_xpu_reg_val[DRV_XPU_REG_IDX_LBT_TH]; 164 fpga_lbt_th = (static_lbt_th==0?auto_lbt_th:static_lbt_th); 165 xpu_api->XPU_REG_LBT_TH_write(fpga_lbt_th); 166 167 priv->last_auto_fpga_lbt_th = auto_lbt_th; 168 169 if (actual_rx_lo < 2500) { 170 //priv->slot_time = 20; //20 is default slot time in ERP(OFDM)/11g 2.4G; short one is 9. 171 //xpu_api->XPU_REG_BAND_CHANNEL_write(BAND_2_4GHZ<<16); 172 if (priv->band != BAND_2_4GHZ) { 173 priv->band = BAND_2_4GHZ; 174 xpu_api->XPU_REG_BAND_CHANNEL_write( (priv->use_short_slot<<24)|(priv->band<<16) ); 175 } 176 // //xpu_api->XPU_REG_RECV_ACK_COUNT_TOP_write( (((45+2)*10)<<16) | 10 ); // high 16 bits to cover sig valid of ACK packet, low 16 bits is adjustment of fcs valid waiting time. let's add 2us for those device that is really "slow"! 177 // xpu_api->XPU_REG_RECV_ACK_COUNT_TOP_write( (((45+2+2)*10)<<16) | 10 );//add 2us for longer fir. BUT corrding to FPGA probing test, we do not need this 178 // xpu_api->XPU_REG_SEND_ACK_WAIT_TOP_write( 0 ); 179 // tx_intf_api->TX_INTF_REG_CTS_TOSELF_WAIT_SIFS_TOP_write(((10)*10)<<16); 180 } 181 else { 182 //priv->slot_time = 9; //default slot time of OFDM PHY (OFDM by default means 5GHz) 183 // xpu_api->XPU_REG_BAND_CHANNEL_write(BAND_5_8GHZ<<16); 184 if (priv->band != BAND_5_8GHZ) { 185 priv->band = BAND_5_8GHZ; 186 xpu_api->XPU_REG_BAND_CHANNEL_write( (priv->use_short_slot<<24)|(priv->band<<16) ); 187 } 188 // //xpu_api->XPU_REG_RECV_ACK_COUNT_TOP_write( (((51+2)*10)<<16) | 10 ); // because 5GHz needs longer SIFS (16 instead of 10), we need 58 instead of 48 for XPU low mac setting. let's add 2us for those device that is really "slow"! 189 // xpu_api->XPU_REG_RECV_ACK_COUNT_TOP_write( (((51+2+2)*10)<<16) | 10 );//add 2us for longer fir. BUT corrding to FPGA probing test, we do not need this 190 // //xpu_api->XPU_REG_SEND_ACK_WAIT_TOP_write( 60*10 ); 191 // xpu_api->XPU_REG_SEND_ACK_WAIT_TOP_write( 50*10 );// for longer fir we need this delay 1us shorter 192 // tx_intf_api->TX_INTF_REG_CTS_TOSELF_WAIT_SIFS_TOP_write(((16)*10)<<16); 193 } 194 //printk("%s ad9361_rf_set_channel %dM rssi_correction %d\n", sdr_compatible_str,conf->chandef.chan->center_freq,priv->rssi_correction); 195 // //-- use less 196 //clk_prepare_enable(priv->ad9361_phy->clks[RX_RFPLL]); 197 //printk("%s ad9361_rf_set_channel tune to %d read back %llu\n", sdr_compatible_str,conf->chandef.chan->center_freq,2*priv->ad9361_phy->state->current_rx_lo_freq); 198 //ad9361_set_trx_clock_chain_default(priv->ad9361_phy); 199 //printk("%s ad9361_rf_set_channel tune to %d read back %llu\n", sdr_compatible_str,conf->chandef.chan->center_freq,2*priv->ad9361_phy->state->current_rx_lo_freq); 200 printk("%s ad9361_rf_set_channel %dM rssi_correction %d (change flag %d) fpga_lbt_th %d (auto %d static %d)\n", sdr_compatible_str,conf->chandef.chan->center_freq,priv->rssi_correction,change_flag,fpga_lbt_th,auto_lbt_th,static_lbt_th); 201 } 202 } 203 204 const struct openwifi_rf_ops ad9361_rf_ops = { 205 .name = "ad9361", 206 // .init = ad9361_rf_init, 207 // .stop = ad9361_rf_stop, 208 .set_chan = ad9361_rf_set_channel, 209 // .calc_rssi = ad9361_rf_calc_rssi, 210 }; 211 212 u16 reverse16(u16 d) { 213 union u16_byte2 tmp0, tmp1; 214 tmp0.a = d; 215 tmp1.c[0] = tmp0.c[1]; 216 tmp1.c[1] = tmp0.c[0]; 217 return(tmp1.a); 218 } 219 220 u32 reverse32(u32 d) { 221 union u32_byte4 tmp0, tmp1; 222 tmp0.a = d; 223 tmp1.c[0] = tmp0.c[3]; 224 tmp1.c[1] = tmp0.c[2]; 225 tmp1.c[2] = tmp0.c[1]; 226 tmp1.c[3] = tmp0.c[0]; 227 return(tmp1.a); 228 } 229 230 static int openwifi_init_tx_ring(struct openwifi_priv *priv, int ring_idx) 231 { 232 struct openwifi_ring *ring = &(priv->tx_ring[ring_idx]); 233 int i; 234 235 ring->stop_flag = 0; 236 ring->bd_wr_idx = 0; 237 ring->bd_rd_idx = 0; 238 ring->bds = kmalloc(sizeof(struct openwifi_buffer_descriptor)*NUM_TX_BD,GFP_KERNEL); 239 if (ring->bds==NULL) { 240 printk("%s openwifi_init_tx_ring: WARNING Cannot allocate TX ring\n",sdr_compatible_str); 241 return -ENOMEM; 242 } 243 244 for (i = 0; i < NUM_TX_BD; i++) { 245 ring->bds[i].skb_linked=0; // for tx, skb is from upper layer 246 //at first right after skb allocated, head, data, tail are the same. 247 ring->bds[i].dma_mapping_addr = 0; // for tx, mapping is done after skb is received from upper layer in tx routine 248 } 249 250 return 0; 251 } 252 253 static void openwifi_free_tx_ring(struct openwifi_priv *priv, int ring_idx) 254 { 255 struct openwifi_ring *ring = &(priv->tx_ring[ring_idx]); 256 int i; 257 258 ring->stop_flag = 0; 259 ring->bd_wr_idx = 0; 260 ring->bd_rd_idx = 0; 261 for (i = 0; i < NUM_TX_BD; i++) { 262 if (ring->bds[i].skb_linked == 0 && ring->bds[i].dma_mapping_addr == 0) 263 continue; 264 if (ring->bds[i].dma_mapping_addr != 0) 265 dma_unmap_single(priv->tx_chan->device->dev, ring->bds[i].dma_mapping_addr,ring->bds[i].skb_linked->len, DMA_MEM_TO_DEV); 266 // if (ring->bds[i].skb_linked!=NULL) 267 // dev_kfree_skb(ring->bds[i].skb_linked); // only use dev_kfree_skb when there is exception 268 if ( (ring->bds[i].dma_mapping_addr != 0 && ring->bds[i].skb_linked == 0) || 269 (ring->bds[i].dma_mapping_addr == 0 && ring->bds[i].skb_linked != 0)) 270 printk("%s openwifi_free_tx_ring: WARNING ring %d i %d skb_linked %p dma_mapping_addr %08x\n", sdr_compatible_str, 271 ring_idx, i, (void*)(ring->bds[i].skb_linked), (unsigned int)(ring->bds[i].dma_mapping_addr)); 272 273 ring->bds[i].skb_linked=0; 274 ring->bds[i].dma_mapping_addr = 0; 275 } 276 if (ring->bds) 277 kfree(ring->bds); 278 ring->bds = NULL; 279 } 280 281 static int openwifi_init_rx_ring(struct openwifi_priv *priv) 282 { 283 int i; 284 u8 *pdata_tmp; 285 286 priv->rx_cyclic_buf = dma_alloc_coherent(priv->rx_chan->device->dev,RX_BD_BUF_SIZE*NUM_RX_BD,&priv->rx_cyclic_buf_dma_mapping_addr,GFP_KERNEL); 287 if (!priv->rx_cyclic_buf) { 288 printk("%s openwifi_init_rx_ring: WARNING dma_alloc_coherent failed!\n", sdr_compatible_str); 289 dma_free_coherent(priv->rx_chan->device->dev,RX_BD_BUF_SIZE*NUM_RX_BD,priv->rx_cyclic_buf,priv->rx_cyclic_buf_dma_mapping_addr); 290 return(-1); 291 } 292 293 // Set tsft_low and tsft_high to 0. If they are not zero, it means there is a packet in the buffer by DMA 294 for (i=0; i<NUM_RX_BD; i++) { 295 pdata_tmp = priv->rx_cyclic_buf + i*RX_BD_BUF_SIZE; // our header insertion is at the beginning 296 (*((u32*)(pdata_tmp+0 ))) = 0; 297 (*((u32*)(pdata_tmp+4 ))) = 0; 298 } 299 printk("%s openwifi_init_rx_ring: tsft_low and tsft_high are cleared!\n", sdr_compatible_str); 300 301 return 0; 302 } 303 304 static void openwifi_free_rx_ring(struct openwifi_priv *priv) 305 { 306 if (priv->rx_cyclic_buf) 307 dma_free_coherent(priv->rx_chan->device->dev,RX_BD_BUF_SIZE*NUM_RX_BD,priv->rx_cyclic_buf,priv->rx_cyclic_buf_dma_mapping_addr); 308 309 priv->rx_cyclic_buf_dma_mapping_addr = 0; 310 priv->rx_cyclic_buf = 0; 311 } 312 313 static int rx_dma_setup(struct ieee80211_hw *dev){ 314 struct openwifi_priv *priv = dev->priv; 315 struct dma_device *rx_dev = priv->rx_chan->device; 316 317 priv->rxd = rx_dev->device_prep_dma_cyclic(priv->rx_chan,priv->rx_cyclic_buf_dma_mapping_addr,RX_BD_BUF_SIZE*NUM_RX_BD,RX_BD_BUF_SIZE,DMA_DEV_TO_MEM,DMA_CTRL_ACK|DMA_PREP_INTERRUPT); 318 if (!(priv->rxd)) { 319 openwifi_free_rx_ring(priv); 320 printk("%s rx_dma_setup: WARNING rx_dev->device_prep_dma_cyclic %p\n", sdr_compatible_str, (void*)(priv->rxd)); 321 return(-1); 322 } 323 priv->rxd->callback = 0; 324 priv->rxd->callback_param = 0; 325 326 priv->rx_cookie = priv->rxd->tx_submit(priv->rxd); 327 328 if (dma_submit_error(priv->rx_cookie)) { 329 printk("%s rx_dma_setup: WARNING dma_submit_error(rx_cookie) %d\n", sdr_compatible_str, (u32)(priv->rx_cookie)); 330 return(-1); 331 } 332 333 dma_async_issue_pending(priv->rx_chan); 334 return(0); 335 } 336 337 static irqreturn_t openwifi_rx_interrupt(int irq, void *dev_id) 338 { 339 struct ieee80211_hw *dev = dev_id; 340 struct openwifi_priv *priv = dev->priv; 341 struct ieee80211_rx_status rx_status = {0}; 342 struct sk_buff *skb; 343 struct ieee80211_hdr *hdr; 344 u32 addr1_low32=0, addr2_low32=0, addr3_low32=0, len, rate_idx, tsft_low, tsft_high, loop_count=0, ht_flag, short_gi;//, fc_di; 345 // u32 dma_driver_buf_idx_mod; 346 u8 *pdata_tmp, fcs_ok;//, target_buf_idx;//, phy_rx_sn_hw; 347 s8 signal; 348 u16 agc_status_and_pkt_exist_flag, rssi_val, addr1_high16=0, addr2_high16=0, addr3_high16=0, sc=0; 349 bool content_ok = false, len_overflow = false; 350 351 #ifdef USE_NEW_RX_INTERRUPT 352 int i; 353 spin_lock(&priv->lock); 354 for (i=0; i<NUM_RX_BD; i++) { 355 pdata_tmp = priv->rx_cyclic_buf + i*RX_BD_BUF_SIZE; 356 agc_status_and_pkt_exist_flag = (*((u16*)(pdata_tmp+10))); //check rx_intf_pl_to_m_axis.v. FPGA TODO: add pkt exist 1bit flag next to gpio_status_lock_by_sig_valid 357 if ( agc_status_and_pkt_exist_flag==0 ) // no packet in the buffer 358 continue; 359 #else 360 static u8 target_buf_idx_old = 0; 361 spin_lock(&priv->lock); 362 while(1) { // loop all rx buffers that have new rx packets 363 pdata_tmp = priv->rx_cyclic_buf + target_buf_idx_old*RX_BD_BUF_SIZE; // our header insertion is at the beginning 364 agc_status_and_pkt_exist_flag = (*((u16*)(pdata_tmp+10))); 365 if ( agc_status_and_pkt_exist_flag==0 ) // no packet in the buffer 366 break; 367 #endif 368 369 tsft_low = (*((u32*)(pdata_tmp+0 ))); 370 tsft_high = (*((u32*)(pdata_tmp+4 ))); 371 rssi_val = (*((u16*)(pdata_tmp+8 ))); 372 len = (*((u16*)(pdata_tmp+12))); 373 374 len_overflow = (len>(RX_BD_BUF_SIZE-16)?true:false); 375 376 rate_idx = (*((u16*)(pdata_tmp+14))); 377 short_gi = ((rate_idx&0x20)!=0); 378 rate_idx = (rate_idx&0xDF); 379 380 fcs_ok = ( len_overflow?0:(*(( u8*)(pdata_tmp+16+len-1))) ); 381 382 //phy_rx_sn_hw = (fcs_ok&(NUM_RX_BD-1)); 383 // phy_rx_sn_hw = (fcs_ok&0x7f);//0x7f is FPGA limitation 384 // dma_driver_buf_idx_mod = (state.residue&0x7f); 385 fcs_ok = ((fcs_ok&0x80)!=0); 386 ht_flag = ((rate_idx&0x10)!=0); 387 388 if ( (len>=14 && (!len_overflow)) && (rate_idx>=8 && rate_idx<=23)) { 389 // if ( phy_rx_sn_hw!=dma_driver_buf_idx_mod) { 390 // printk("%s openwifi_rx_interrupt: WARNING sn %d next buf_idx %d!\n", sdr_compatible_str,phy_rx_sn_hw,dma_driver_buf_idx_mod); 391 // } 392 content_ok = true; 393 } else { 394 printk("%s openwifi_rx_interrupt: WARNING content!\n", sdr_compatible_str); 395 content_ok = false; 396 } 397 398 rssi_val = (rssi_val>>1); 399 if ( (rssi_val+128)<priv->rssi_correction ) 400 signal = -128; 401 else 402 signal = rssi_val - priv->rssi_correction; 403 404 // fc_di = (*((u32*)(pdata_tmp+16))); 405 // addr1_high16 = (*((u16*)(pdata_tmp+16+4))); 406 // addr1_low32 = (*((u32*)(pdata_tmp+16+4+2))); 407 // addr2_high16 = (*((u16*)(pdata_tmp+16+6+4))); 408 // addr2_low32 = (*((u32*)(pdata_tmp+16+6+4+2))); 409 // addr3_high16 = (*((u16*)(pdata_tmp+16+12+4))); 410 // addr3_low32 = (*((u32*)(pdata_tmp+16+12+4+2))); 411 if ( (priv->drv_rx_reg_val[DRV_RX_REG_IDX_PRINT_CFG]&2) || ( (priv->drv_rx_reg_val[DRV_RX_REG_IDX_PRINT_CFG]&1) && fcs_ok==0 ) ) { 412 hdr = (struct ieee80211_hdr *)(pdata_tmp+16); 413 addr1_low32 = *((u32*)(hdr->addr1+2)); 414 addr1_high16 = *((u16*)(hdr->addr1)); 415 if (len>=20) { 416 addr2_low32 = *((u32*)(hdr->addr2+2)); 417 addr2_high16 = *((u16*)(hdr->addr2)); 418 } 419 if (len>=26) { 420 addr3_low32 = *((u32*)(hdr->addr3+2)); 421 addr3_high16 = *((u16*)(hdr->addr3)); 422 } 423 if (len>=28) 424 sc = hdr->seq_ctrl; 425 426 if ( (addr1_low32!=0xffffffff || addr1_high16!=0xffff) || (priv->drv_rx_reg_val[DRV_RX_REG_IDX_PRINT_CFG]&4) ) 427 printk("%s openwifi_rx_interrupt:%4dbytes ht%d %3dM FC%04x DI%04x addr1/2/3:%04x%08x/%04x%08x/%04x%08x SC%04x fcs%d buf_idx%d %ddBm\n", sdr_compatible_str, 428 len, ht_flag, wifi_rate_table[rate_idx], hdr->frame_control, hdr->duration_id, 429 reverse16(addr1_high16), reverse32(addr1_low32), reverse16(addr2_high16), reverse32(addr2_low32), reverse16(addr3_high16), reverse32(addr3_low32), 430 #ifdef USE_NEW_RX_INTERRUPT 431 sc, fcs_ok, i, signal); 432 #else 433 sc, fcs_ok, target_buf_idx_old, signal); 434 #endif 435 } 436 437 // priv->phy_rx_sn_hw_old = phy_rx_sn_hw; 438 if (content_ok) { 439 skb = dev_alloc_skb(len); 440 if (skb) { 441 skb_put_data(skb,pdata_tmp+16,len); 442 443 rx_status.antenna = 0; 444 // def in ieee80211_rate openwifi_rates 0~11. 0~3 11b(1M~11M), 4~11 11a/g(6M~54M) 445 rx_status.rate_idx = wifi_rate_table_mapping[rate_idx]; 446 rx_status.signal = signal; 447 rx_status.freq = dev->conf.chandef.chan->center_freq; 448 rx_status.band = dev->conf.chandef.chan->band; 449 rx_status.mactime = ( ( (u64)tsft_low ) | ( ((u64)tsft_high)<<32 ) ); 450 rx_status.flag |= RX_FLAG_MACTIME_START; 451 if (!fcs_ok) 452 rx_status.flag |= RX_FLAG_FAILED_FCS_CRC; 453 if (rate_idx <= 15) 454 rx_status.encoding = RX_ENC_LEGACY; 455 else 456 rx_status.encoding = RX_ENC_HT; 457 rx_status.bw = RATE_INFO_BW_20; 458 if (short_gi) 459 rx_status.enc_flags |= RX_ENC_FLAG_SHORT_GI; 460 461 memcpy(IEEE80211_SKB_RXCB(skb), &rx_status, sizeof(rx_status)); // put rx_status into skb->cb, from now on skb->cb is not dma_dsts any more. 462 ieee80211_rx_irqsafe(dev, skb); // call mac80211 function 463 } else 464 printk("%s openwifi_rx_interrupt: WARNING dev_alloc_skb failed!\n", sdr_compatible_str); 465 } 466 (*((u16*)(pdata_tmp+10))) = 0; // clear the field (set by rx_intf_pl_to_m_axis.v) to indicate the packet has been processed 467 loop_count++; 468 #ifndef USE_NEW_RX_INTERRUPT 469 target_buf_idx_old=((target_buf_idx_old+1)&(NUM_RX_BD-1)); 470 #endif 471 } 472 473 if ( loop_count!=1 && (priv->drv_rx_reg_val[DRV_RX_REG_IDX_PRINT_CFG]&1) ) 474 printk("%s openwifi_rx_interrupt: WARNING loop_count %d\n", sdr_compatible_str,loop_count); 475 476 // openwifi_rx_interrupt_out: 477 spin_unlock(&priv->lock); 478 return IRQ_HANDLED; 479 } 480 481 static irqreturn_t openwifi_tx_interrupt(int irq, void *dev_id) 482 { 483 struct ieee80211_hw *dev = dev_id; 484 struct openwifi_priv *priv = dev->priv; 485 struct openwifi_ring *ring; 486 struct sk_buff *skb; 487 struct ieee80211_tx_info *info; 488 u32 reg_val, hw_queue_len, prio, queue_idx, dma_fifo_no_room_flag, num_slot_random, cw, loop_count=0;//, i; 489 u8 tx_result_report; 490 // u16 prio_rd_idx_store[64]={0}; 491 492 spin_lock(&priv->lock); 493 494 while(1) { // loop all packets that have been sent by FPGA 495 reg_val = tx_intf_api->TX_INTF_REG_PKT_INFO_read(); 496 if (reg_val!=0xFFFFFFFF) { 497 prio = ((0x7FFFF & reg_val)>>(5+NUM_BIT_MAX_PHY_TX_SN+NUM_BIT_MAX_NUM_HW_QUEUE)); 498 cw = ((0xF0000000 & reg_val) >> 28); 499 num_slot_random = ((0xFF80000 ®_val)>>(2+5+NUM_BIT_MAX_PHY_TX_SN+NUM_BIT_MAX_NUM_HW_QUEUE)); 500 if(cw > 10) { 501 cw = 10 ; 502 num_slot_random += 512 ; 503 } 504 505 ring = &(priv->tx_ring[prio]); 506 ring->bd_rd_idx = ((reg_val>>5)&MAX_PHY_TX_SN); 507 skb = ring->bds[ring->bd_rd_idx].skb_linked; 508 509 dma_unmap_single(priv->tx_chan->device->dev,ring->bds[ring->bd_rd_idx].dma_mapping_addr, 510 skb->len, DMA_MEM_TO_DEV); 511 512 if ( ring->stop_flag == 1) { 513 // Wake up Linux queue if FPGA and driver ring have room 514 queue_idx = ((reg_val>>(5+NUM_BIT_MAX_PHY_TX_SN))&(MAX_NUM_HW_QUEUE-1)); 515 dma_fifo_no_room_flag = tx_intf_api->TX_INTF_REG_S_AXIS_FIFO_NO_ROOM_read(); 516 hw_queue_len = tx_intf_api->TX_INTF_REG_QUEUE_FIFO_DATA_COUNT_read(); 517 518 // printk("%s openwifi_tx_interrupt: WARNING loop %d prio %d queue %d no room flag %x hw queue len %08x wr %d rd %d call %d\n", sdr_compatible_str, 519 // loop_count, prio, queue_idx, dma_fifo_no_room_flag, hw_queue_len, ring->bd_wr_idx, ring->bd_rd_idx, priv->call_counter); 520 521 if ( ((dma_fifo_no_room_flag>>queue_idx)&1)==0 && (NUM_TX_BD-((hw_queue_len>>(queue_idx*8))&0xFF))>=RING_ROOM_THRESHOLD ) { 522 // printk("%s openwifi_tx_interrupt: WARNING ieee80211_wake_queue loop %d call %d\n", sdr_compatible_str, loop_count, priv->call_counter); 523 printk("%s openwifi_tx_interrupt: WARNING ieee80211_wake_queue prio %d queue %d no room flag %x hw queue len %08x wr %d rd %d\n", sdr_compatible_str, 524 prio, queue_idx, dma_fifo_no_room_flag, hw_queue_len, ring->bd_wr_idx, ring->bd_rd_idx); 525 ieee80211_wake_queue(dev, prio); 526 ring->stop_flag = 0; 527 } 528 } 529 530 if ( (*(u32*)(&(skb->data[4]))) || ((*(u32*)(&(skb->data[12])))&0xFFFF0000) ) { 531 printk("%s openwifi_tx_interrupt: WARNING %08x %08x %08x %08x\n", sdr_compatible_str, *(u32*)(&(skb->data[12])), *(u32*)(&(skb->data[8])), *(u32*)(&(skb->data[4])), *(u32*)(&(skb->data[0]))); 532 continue; 533 } 534 535 skb_pull(skb, LEN_PHY_HEADER); 536 //skb_trim(skb, num_byte_pad_skb); 537 info = IEEE80211_SKB_CB(skb); 538 ieee80211_tx_info_clear_status(info); 539 540 tx_result_report = (reg_val&0x1F); 541 if ( !(info->flags & IEEE80211_TX_CTL_NO_ACK) ) { 542 if ((tx_result_report&0x10)==0) 543 info->flags |= IEEE80211_TX_STAT_ACK; 544 545 // printk("%s openwifi_tx_interrupt: rate&try: %d %d %03x; %d %d %03x; %d %d %03x; %d %d %03x\n", sdr_compatible_str, 546 // info->status.rates[0].idx,info->status.rates[0].count,info->status.rates[0].flags, 547 // info->status.rates[1].idx,info->status.rates[1].count,info->status.rates[1].flags, 548 // info->status.rates[2].idx,info->status.rates[2].count,info->status.rates[2].flags, 549 // info->status.rates[3].idx,info->status.rates[3].count,info->status.rates[3].flags); 550 } 551 552 info->status.rates[0].count = (tx_result_report&0xF) + 1; //according to our test, the 1st rate is the most important. we only do retry on the 1st rate 553 info->status.rates[1].idx = -1; 554 info->status.rates[2].idx = -1; 555 info->status.rates[3].idx = -1;//in mac80211.h: #define IEEE80211_TX_MAX_RATES 4 556 557 if ( (tx_result_report&0x10) && ((priv->drv_tx_reg_val[DRV_TX_REG_IDX_PRINT_CFG])&1) ) 558 printk("%s openwifi_tx_interrupt: WARNING tx_result %02x prio%d wr%d rd%d\n", sdr_compatible_str, tx_result_report, prio, ring->bd_wr_idx, ring->bd_rd_idx); 559 if ( ( (!(info->flags & IEEE80211_TX_CTL_NO_ACK))||(priv->drv_tx_reg_val[DRV_TX_REG_IDX_PRINT_CFG]&4) ) && ((priv->drv_tx_reg_val[DRV_TX_REG_IDX_PRINT_CFG])&2) ) 560 printk("%s openwifi_tx_interrupt: tx_result %02x prio%d wr%d rd%d num_rand_slot %d cw %d \n", sdr_compatible_str, tx_result_report, prio, ring->bd_wr_idx, ring->bd_rd_idx, num_slot_random,cw); 561 562 ieee80211_tx_status_irqsafe(dev, skb); 563 564 loop_count++; 565 566 // printk("%s openwifi_tx_interrupt: loop %d prio %d rd %d\n", sdr_compatible_str, loop_count, prio, ring->bd_rd_idx); 567 568 } else 569 break; 570 } 571 if ( loop_count!=1 && ((priv->drv_tx_reg_val[DRV_TX_REG_IDX_PRINT_CFG])&1) ) 572 printk("%s openwifi_tx_interrupt: WARNING loop_count %d\n", sdr_compatible_str, loop_count); 573 574 spin_unlock(&priv->lock); 575 return IRQ_HANDLED; 576 } 577 578 u32 gen_parity(u32 v){ 579 v ^= v >> 1; 580 v ^= v >> 2; 581 v = (v & 0x11111111U) * 0x11111111U; 582 return (v >> 28) & 1; 583 } 584 585 u8 gen_ht_sig_crc(u64 m) 586 { 587 u8 i, temp, c[8] = {1, 1, 1, 1, 1, 1, 1, 1}, ht_sig_crc; 588 589 for (i = 0; i < 34; i++) 590 { 591 temp = c[7] ^ ((m >> i) & 0x01); 592 593 c[7] = c[6]; 594 c[6] = c[5]; 595 c[5] = c[4]; 596 c[4] = c[3]; 597 c[3] = c[2]; 598 c[2] = c[1] ^ temp; 599 c[1] = c[0] ^ temp; 600 c[0] = temp; 601 } 602 ht_sig_crc = ((~c[7] & 0x01) << 0) | ((~c[6] & 0x01) << 1) | ((~c[5] & 0x01) << 2) | ((~c[4] & 0x01) << 3) | ((~c[3] & 0x01) << 4) | ((~c[2] & 0x01) << 5) | ((~c[1] & 0x01) << 6) | ((~c[0] & 0x01) << 7); 603 604 return ht_sig_crc; 605 } 606 607 u32 calc_phy_header(u8 rate_hw_value, bool use_ht_rate, bool use_short_gi, u32 len, u8 *bytes){ 608 //u32 signal_word = 0 ; 609 u8 SIG_RATE = 0, HT_SIG_RATE; 610 u8 len_2to0, len_10to3, len_msb,b0,b1,b2, header_parity ; 611 u32 l_len, ht_len, ht_sig1, ht_sig2; 612 613 // printk("rate_hw_value=%u\tuse_ht_rate=%u\tuse_short_gi=%u\tlen=%u\n", rate_hw_value, use_ht_rate, use_short_gi, len); 614 615 // HT-mixed mode ht signal 616 617 if(use_ht_rate) 618 { 619 SIG_RATE = wifi_mcs_table_11b_force_up[4]; 620 HT_SIG_RATE = rate_hw_value; 621 l_len = 24 * len / wifi_n_dbps_ht_table[rate_hw_value]; 622 ht_len = len; 623 } 624 else 625 { 626 // rate_hw_value = (rate_hw_value<=4?0:(rate_hw_value-4)); 627 // SIG_RATE = wifi_mcs_table_phy_tx[rate_hw_value]; 628 SIG_RATE = wifi_mcs_table_11b_force_up[rate_hw_value]; 629 l_len = len; 630 } 631 632 len_2to0 = l_len & 0x07 ; 633 len_10to3 = (l_len >> 3 ) & 0xFF ; 634 len_msb = (l_len >> 11) & 0x01 ; 635 636 b0=SIG_RATE | (len_2to0 << 5) ; 637 b1 = len_10to3 ; 638 header_parity = gen_parity((len_msb << 16)| (b1<<8) | b0) ; 639 b2 = ( len_msb | (header_parity << 1) ) ; 640 641 memset(bytes,0,16); 642 bytes[0] = b0 ; 643 bytes[1] = b1 ; 644 bytes[2] = b2; 645 646 // HT-mixed mode signal 647 if(use_ht_rate) 648 { 649 ht_sig1 = (HT_SIG_RATE & 0x7F) | ((ht_len << 8) & 0xFFFF00); 650 ht_sig2 = 0x04 | (use_short_gi << 7); 651 ht_sig2 = ht_sig2 | (gen_ht_sig_crc(ht_sig1 | ht_sig2 << 24) << 10); 652 653 bytes[3] = 1; 654 bytes[8] = (ht_sig1 & 0xFF); 655 bytes[9] = (ht_sig1 >> 8) & 0xFF; 656 bytes[10] = (ht_sig1 >> 16) & 0xFF; 657 bytes[11] = (ht_sig2 & 0xFF); 658 bytes[12] = (ht_sig2 >> 8) & 0xFF; 659 bytes[13] = (ht_sig2 >> 16) & 0xFF; 660 661 return(HT_SIG_RATE); 662 } 663 else 664 { 665 //signal_word = b0+(b1<<8)+(b2<<16) ; 666 //return signal_word; 667 return(SIG_RATE); 668 } 669 } 670 671 static inline struct gpio_led_data * //please align with the implementation in leds-gpio.c 672 cdev_to_gpio_led_data(struct led_classdev *led_cdev) 673 { 674 return container_of(led_cdev, struct gpio_led_data, cdev); 675 } 676 677 static void openwifi_tx(struct ieee80211_hw *dev, 678 struct ieee80211_tx_control *control, 679 struct sk_buff *skb) 680 { 681 struct openwifi_priv *priv = dev->priv; 682 unsigned long flags; 683 struct ieee80211_tx_info *info = IEEE80211_SKB_CB(skb); 684 struct ieee80211_hdr *hdr = (struct ieee80211_hdr *)skb->data; 685 struct openwifi_ring *ring; 686 dma_addr_t dma_mapping_addr; 687 unsigned int prio, i; 688 u32 num_dma_symbol, len_mac_pdu, num_dma_byte, len_phy_packet, num_byte_pad; 689 u32 rate_signal_value,rate_hw_value,ack_flag; 690 u32 pkt_need_ack, addr1_low32=0, addr2_low32=0, addr3_low32=0, queue_idx=2, dma_reg, cts_reg;//, openofdm_state_history; 691 u16 addr1_high16=0, addr2_high16=0, addr3_high16=0, sc=0, cts_duration=0, cts_rate_hw_value = 0, cts_rate_signal_value=0, sifs, ack_duration=0, traffic_pkt_duration; 692 u8 fc_flag,fc_type,fc_subtype,retry_limit_raw,*dma_buf,retry_limit_hw_value,rc_flags; 693 bool use_rts_cts, use_cts_protect, use_ht_rate=false, use_short_gi, addr_flag, cts_use_traffic_rate=false, force_use_cts_protect=false; 694 __le16 frame_control,duration_id; 695 u32 dma_fifo_no_room_flag, hw_queue_len; 696 enum dma_status status; 697 // static bool led_status=0; 698 // struct gpio_led_data *led_dat = cdev_to_gpio_led_data(priv->led[3]); 699 700 // if ( (priv->phy_tx_sn&7) ==0 ) { 701 // openofdm_state_history = openofdm_rx_api->OPENOFDM_RX_REG_STATE_HISTORY_read(); 702 // if (openofdm_state_history!=openofdm_state_history_old){ 703 // led_status = (~led_status); 704 // openofdm_state_history_old = openofdm_state_history; 705 // gpiod_set_value(led_dat->gpiod, led_status); 706 // } 707 // } 708 709 if (test_mode==1){ 710 printk("%s openwifi_tx: WARNING test_mode==1\n", sdr_compatible_str); 711 goto openwifi_tx_early_out; 712 } 713 714 if (skb->data_len>0) {// more data are not in linear data area skb->data 715 printk("%s openwifi_tx: WARNING skb->data_len>0\n", sdr_compatible_str); 716 goto openwifi_tx_early_out; 717 } 718 719 len_mac_pdu = skb->len; 720 len_phy_packet = len_mac_pdu + LEN_PHY_HEADER; 721 num_dma_symbol = (len_phy_packet>>TX_INTF_NUM_BYTE_PER_DMA_SYMBOL_IN_BITS) + ((len_phy_packet&(TX_INTF_NUM_BYTE_PER_DMA_SYMBOL-1))!=0); 722 723 // get Linux priority/queue setting info and target mac address 724 prio = skb_get_queue_mapping(skb); 725 addr1_low32 = *((u32*)(hdr->addr1+2)); 726 ring = &(priv->tx_ring[prio]); 727 728 // -------------- DO your idea here! Map Linux/SW "prio" to hardware "queue_idx" ----------- 729 if (priv->slice_idx == 0xFFFFFFFF) {// use Linux default prio setting, if there isn't any slice config 730 queue_idx = prio; 731 } else {// customized prio to queue_idx mapping 732 //if (fc_type==2 && fc_subtype==0 && (!addr_flag)) { // for unicast data packet only 733 // check current packet belonging to which slice/hw-queue 734 for (i=0; i<MAX_NUM_HW_QUEUE; i++) { 735 if ( priv->dest_mac_addr_queue_map[i] == addr1_low32 ) { 736 break; 737 } 738 } 739 //} 740 queue_idx = (i>=MAX_NUM_HW_QUEUE?2:i); // if no address is hit, use FPGA queue 2. because the queue 2 is the longest. 741 } 742 // -------------------- end of Map Linux/SW "prio" to hardware "queue_idx" ------------------ 743 744 // check whether the packet is bigger than DMA buffer size 745 num_dma_byte = (num_dma_symbol<<TX_INTF_NUM_BYTE_PER_DMA_SYMBOL_IN_BITS); 746 if (num_dma_byte > TX_BD_BUF_SIZE) { 747 // dev_err(priv->tx_chan->device->dev, "sdr,sdr openwifi_tx: WARNING num_dma_byte > TX_BD_BUF_SIZE\n"); 748 printk("%s openwifi_tx: WARNING sn %d num_dma_byte > TX_BD_BUF_SIZE\n", sdr_compatible_str, ring->bd_wr_idx); 749 goto openwifi_tx_early_out; 750 } 751 num_byte_pad = num_dma_byte-len_phy_packet; 752 753 // get other info from packet header 754 addr1_high16 = *((u16*)(hdr->addr1)); 755 if (len_mac_pdu>=20) { 756 addr2_low32 = *((u32*)(hdr->addr2+2)); 757 addr2_high16 = *((u16*)(hdr->addr2)); 758 } 759 if (len_mac_pdu>=26) { 760 addr3_low32 = *((u32*)(hdr->addr3+2)); 761 addr3_high16 = *((u16*)(hdr->addr3)); 762 } 763 764 duration_id = hdr->duration_id; 765 frame_control=hdr->frame_control; 766 ack_flag = (info->flags&IEEE80211_TX_CTL_NO_ACK); 767 fc_type = ((frame_control)>>2)&3; 768 fc_subtype = ((frame_control)>>4)&0xf; 769 fc_flag = ( fc_type==2 || fc_type==0 || (fc_type==1 && (fc_subtype==8 || fc_subtype==9 || fc_subtype==10) ) ); 770 //if it is broadcasting or multicasting addr 771 addr_flag = ( (addr1_low32==0 && addr1_high16==0) || 772 (addr1_low32==0xFFFFFFFF && addr1_high16==0xFFFF) || 773 (addr1_high16==0x3333) || 774 (addr1_high16==0x0001 && hdr->addr1[2]==0x5E) ); 775 if ( fc_flag && ( !addr_flag ) && (!ack_flag) ) { // unicast data frame 776 pkt_need_ack = 1; //FPGA need to wait ACK after this pkt sent 777 } else { 778 pkt_need_ack = 0; 779 } 780 781 // get Linux rate (MCS) setting 782 rate_hw_value = ieee80211_get_tx_rate(dev, info)->hw_value; 783 //rate_hw_value = 10; //4:6M, 5:9M, 6:12M, 7:18M, 8:24M, 9:36M, 10:48M, 11:54M 784 if (priv->drv_tx_reg_val[DRV_TX_REG_IDX_RATE]>0 && fc_type==2 && (!addr_flag)) //rate override command 785 rate_hw_value = priv->drv_tx_reg_val[DRV_TX_REG_IDX_RATE]; 786 787 retry_limit_raw = info->control.rates[0].count; 788 789 rc_flags = info->control.rates[0].flags; 790 use_rts_cts = ((rc_flags&IEEE80211_TX_RC_USE_RTS_CTS)!=0); 791 use_cts_protect = ((rc_flags&IEEE80211_TX_RC_USE_CTS_PROTECT)!=0); 792 use_ht_rate = ((rc_flags&IEEE80211_TX_RC_MCS)!=0); 793 use_short_gi = ((rc_flags&IEEE80211_TX_RC_SHORT_GI)!=0); 794 795 if (use_rts_cts) 796 printk("%s openwifi_tx: WARNING sn %d use_rts_cts is not supported!\n", sdr_compatible_str, ring->bd_wr_idx); 797 798 if (use_cts_protect) { 799 cts_rate_hw_value = ieee80211_get_rts_cts_rate(dev, info)->hw_value; 800 cts_duration = le16_to_cpu(ieee80211_ctstoself_duration(dev,info->control.vif,len_mac_pdu,info)); 801 } else if (force_use_cts_protect) { // could override mac80211 setting here. 802 cts_rate_hw_value = 4; //wifi_mcs_table_11b_force_up[] translate it to 1011(6M) 803 sifs = (priv->actual_rx_lo<2500?10:16); 804 if (pkt_need_ack) 805 ack_duration = 44;//assume the ack we wait use 6Mbps: 4*ceil((22+14*8)/24) + 20(preamble+SIGNAL) 806 traffic_pkt_duration = 20 + 4*(((22+len_mac_pdu*8)/wifi_n_dbps_table[rate_hw_value])+1); 807 cts_duration = traffic_pkt_duration + sifs + pkt_need_ack*(sifs+ack_duration); 808 } 809 810 // this is 11b stuff 811 // if (info->flags&IEEE80211_TX_RC_USE_SHORT_PREAMBLE) 812 // printk("%s openwifi_tx: WARNING IEEE80211_TX_RC_USE_SHORT_PREAMBLE\n", sdr_compatible_str); 813 814 if (len_mac_pdu>=28) { 815 if (info->flags & IEEE80211_TX_CTL_ASSIGN_SEQ) { 816 if (info->flags & IEEE80211_TX_CTL_FIRST_FRAGMENT) 817 priv->seqno += 0x10; 818 hdr->seq_ctrl &= cpu_to_le16(IEEE80211_SCTL_FRAG); 819 hdr->seq_ctrl |= cpu_to_le16(priv->seqno); 820 } 821 sc = hdr->seq_ctrl; 822 } 823 824 if ( ( (!addr_flag)||(priv->drv_tx_reg_val[DRV_TX_REG_IDX_PRINT_CFG]&4) ) && (priv->drv_tx_reg_val[DRV_TX_REG_IDX_PRINT_CFG]&2) ) 825 printk("%s openwifi_tx: %4dbytes ht%d %3dM FC%04x DI%04x addr1/2/3:%04x%08x/%04x%08x/%04x%08x SC%04x flag%08x retr%d ack%d prio%d q%d wr%d rd%d\n", sdr_compatible_str, 826 len_mac_pdu, (use_ht_rate == false ? 0 : 1), (use_ht_rate == false ? wifi_rate_all[rate_hw_value] : wifi_rate_all[rate_hw_value + 12]),frame_control,duration_id, 827 reverse16(addr1_high16), reverse32(addr1_low32), reverse16(addr2_high16), reverse32(addr2_low32), reverse16(addr3_high16), reverse32(addr3_low32), 828 sc, info->flags, retry_limit_raw, pkt_need_ack, prio, queue_idx, 829 // use_rts_cts,use_cts_protect|force_use_cts_protect,wifi_rate_all[cts_rate_hw_value],cts_duration, 830 ring->bd_wr_idx,ring->bd_rd_idx); 831 832 // printk("%s openwifi_tx: rate&try: %d %d %03x; %d %d %03x; %d %d %03x; %d %d %03x\n", sdr_compatible_str, 833 // info->status.rates[0].idx,info->status.rates[0].count,info->status.rates[0].flags, 834 // info->status.rates[1].idx,info->status.rates[1].count,info->status.rates[1].flags, 835 // info->status.rates[2].idx,info->status.rates[2].count,info->status.rates[2].flags, 836 // info->status.rates[3].idx,info->status.rates[3].count,info->status.rates[3].flags); 837 838 // -----------end of preprocess some info from header and skb---------------- 839 840 // /* HW will perform RTS-CTS when only RTS flags is set. 841 // * HW will perform CTS-to-self when both RTS and CTS flags are set. 842 // * RTS rate and RTS duration will be used also for CTS-to-self. 843 // */ 844 // if (rc_flags & IEEE80211_TX_RC_USE_RTS_CTS) { 845 // tx_flags |= ieee80211_get_rts_cts_rate(dev, info)->hw_value << 19; 846 // rts_duration = ieee80211_rts_duration(dev, priv->vif[0], // assume all vif have the same config 847 // len_mac_pdu, info); 848 // printk("%s openwifi_tx: rc_flags & IEEE80211_TX_RC_USE_RTS_CTS\n", sdr_compatible_str); 849 // } else if (rc_flags & IEEE80211_TX_RC_USE_CTS_PROTECT) { 850 // tx_flags |= ieee80211_get_rts_cts_rate(dev, info)->hw_value << 19; 851 // rts_duration = ieee80211_ctstoself_duration(dev, priv->vif[0], // assume all vif have the same config 852 // len_mac_pdu, info); 853 // printk("%s openwifi_tx: rc_flags & IEEE80211_TX_RC_USE_CTS_PROTECT\n", sdr_compatible_str); 854 // } 855 856 // when skb does not have enough headroom, skb_push will cause kernel panic. headroom needs to be extended if necessary 857 if (skb_headroom(skb)<LEN_PHY_HEADER) { 858 struct sk_buff *skb_new; // in case original skb headroom is not enough to host phy header needed by FPGA IP core 859 printk("%s openwifi_tx: WARNING sn %d skb_headroom(skb)<LEN_PHY_HEADER\n", sdr_compatible_str, ring->bd_wr_idx); 860 if ((skb_new = skb_realloc_headroom(skb, LEN_PHY_HEADER)) == NULL) { 861 printk("%s openwifi_tx: WARNING sn %d skb_realloc_headroom failed!\n", sdr_compatible_str, ring->bd_wr_idx); 862 goto openwifi_tx_early_out; 863 } 864 if (skb->sk != NULL) 865 skb_set_owner_w(skb_new, skb->sk); 866 dev_kfree_skb(skb); 867 skb = skb_new; 868 } 869 870 skb_push( skb, LEN_PHY_HEADER ); 871 rate_signal_value = calc_phy_header(rate_hw_value, use_ht_rate, use_short_gi, len_mac_pdu+LEN_PHY_CRC, skb->data); //fill the phy header 872 873 //make sure dma length is integer times of DDC_NUM_BYTE_PER_DMA_SYMBOL 874 if (skb_tailroom(skb)<num_byte_pad) { 875 printk("%s openwifi_tx: WARNING sn %d skb_tailroom(skb)<num_byte_pad!\n", sdr_compatible_str, ring->bd_wr_idx); 876 // skb_pull(skb, LEN_PHY_HEADER); 877 goto openwifi_tx_early_out; 878 } 879 skb_put( skb, num_byte_pad ); 880 881 retry_limit_hw_value = ( retry_limit_raw==0?0:((retry_limit_raw - 1)&0xF) ); 882 dma_buf = skb->data; 883 884 cts_rate_signal_value = wifi_mcs_table_11b_force_up[cts_rate_hw_value]; 885 cts_reg = (((use_cts_protect|force_use_cts_protect)<<31)|(cts_use_traffic_rate<<30)|(cts_duration<<8)|(cts_rate_signal_value<<4)|rate_signal_value); 886 dma_reg = ( (( ((prio<<(NUM_BIT_MAX_NUM_HW_QUEUE+NUM_BIT_MAX_PHY_TX_SN))|(ring->bd_wr_idx<<NUM_BIT_MAX_NUM_HW_QUEUE)|queue_idx) )<<18)|(retry_limit_hw_value<<14)|(pkt_need_ack<<13)|num_dma_symbol ); 887 888 /* We must be sure that tx_flags is written last because the HW 889 * looks at it to check if the rest of data is valid or not 890 */ 891 //wmb(); 892 // entry->flags = cpu_to_le32(tx_flags); 893 /* We must be sure this has been written before following HW 894 * register write, because this write will make the HW attempts 895 * to DMA the just-written data 896 */ 897 //wmb(); 898 899 spin_lock_irqsave(&priv->lock, flags); // from now on, we'd better avoid interrupt because ring->stop_flag is shared with interrupt 900 901 // -------------check whether FPGA dma fifo and queue (queue_idx) has enough room------------- 902 dma_fifo_no_room_flag = tx_intf_api->TX_INTF_REG_S_AXIS_FIFO_NO_ROOM_read(); 903 hw_queue_len = tx_intf_api->TX_INTF_REG_QUEUE_FIFO_DATA_COUNT_read(); 904 if ( ((dma_fifo_no_room_flag>>queue_idx)&1) || ((NUM_TX_BD-((hw_queue_len>>(queue_idx*8))&0xFF))<RING_ROOM_THRESHOLD) || ring->stop_flag==1 ) { 905 ieee80211_stop_queue(dev, prio); // here we should stop those prio related to the queue idx flag set in TX_INTF_REG_S_AXIS_FIFO_NO_ROOM_read 906 printk("%s openwifi_tx: WARNING ieee80211_stop_queue prio %d queue %d no room flag %x hw queue len %08x request %d wr %d rd %d\n", sdr_compatible_str, 907 prio, queue_idx, dma_fifo_no_room_flag, hw_queue_len, num_dma_symbol, ring->bd_wr_idx, ring->bd_rd_idx); 908 ring->stop_flag = 1; 909 goto openwifi_tx_early_out_after_lock; 910 } 911 // --------end of check whether FPGA fifo (queue_idx) has enough room------------ 912 913 status = dma_async_is_tx_complete(priv->tx_chan, priv->tx_cookie, NULL, NULL); 914 if (status!=DMA_COMPLETE) { 915 printk("%s openwifi_tx: WARNING status!=DMA_COMPLETE\n", sdr_compatible_str); 916 goto openwifi_tx_early_out_after_lock; 917 } 918 919 if ( (*(u32*)(&(skb->data[4]))) || ((*(u32*)(&(skb->data[12])))&0xFFFF0000) ) { 920 printk("%s openwifi_tx: WARNING 1 %d %08x %08x %08x %08x\n", sdr_compatible_str, num_byte_pad, *(u32*)(&(skb->data[12])), *(u32*)(&(skb->data[8])), *(u32*)(&(skb->data[4])), *(u32*)(&(skb->data[0]))); 921 goto openwifi_tx_early_out_after_lock; 922 } 923 924 //-------------------------fire skb DMA to hardware---------------------------------- 925 dma_mapping_addr = dma_map_single(priv->tx_chan->device->dev, dma_buf, 926 num_dma_byte, DMA_MEM_TO_DEV); 927 928 if (dma_mapping_error(priv->tx_chan->device->dev,dma_mapping_addr)) { 929 // dev_err(priv->tx_chan->device->dev, "sdr,sdr openwifi_tx: WARNING TX DMA mapping error\n"); 930 printk("%s openwifi_tx: WARNING sn %d TX DMA mapping error\n", sdr_compatible_str, ring->bd_wr_idx); 931 goto openwifi_tx_early_out_after_lock; 932 } 933 934 sg_init_table(&(priv->tx_sg), 1); // only need to be initialized once in openwifi_start 935 sg_dma_address( &(priv->tx_sg) ) = dma_mapping_addr; 936 sg_dma_len( &(priv->tx_sg) ) = num_dma_byte; 937 938 tx_intf_api->TX_INTF_REG_CTS_TOSELF_CONFIG_write(cts_reg); 939 tx_intf_api->TX_INTF_REG_NUM_DMA_SYMBOL_TO_PL_write(dma_reg); 940 priv->txd = priv->tx_chan->device->device_prep_slave_sg(priv->tx_chan, &(priv->tx_sg),1,DMA_MEM_TO_DEV, DMA_CTRL_ACK | DMA_PREP_INTERRUPT, NULL); 941 if (!(priv->txd)) { 942 printk("%s openwifi_tx: WARNING sn %d device_prep_slave_sg %p\n", sdr_compatible_str, ring->bd_wr_idx, (void*)(priv->txd)); 943 goto openwifi_tx_after_dma_mapping; 944 } 945 946 priv->tx_cookie = priv->txd->tx_submit(priv->txd); 947 948 if (dma_submit_error(priv->tx_cookie)) { 949 printk("%s openwifi_tx: WARNING sn %d dma_submit_error(tx_cookie) %d\n", sdr_compatible_str, ring->bd_wr_idx, (u32)(priv->tx_cookie)); 950 goto openwifi_tx_after_dma_mapping; 951 } 952 953 // seems everything is ok. let's mark this pkt in bd descriptor ring 954 ring->bds[ring->bd_wr_idx].skb_linked = skb; 955 ring->bds[ring->bd_wr_idx].dma_mapping_addr = dma_mapping_addr; 956 957 ring->bd_wr_idx = ((ring->bd_wr_idx+1)&(NUM_TX_BD-1)); 958 959 dma_async_issue_pending(priv->tx_chan); 960 961 if ( (*(u32*)(&(skb->data[4]))) || ((*(u32*)(&(skb->data[12])))&0xFFFF0000) ) 962 printk("%s openwifi_tx: WARNING 2 %08x %08x %08x %08x\n", sdr_compatible_str, *(u32*)(&(skb->data[12])), *(u32*)(&(skb->data[8])), *(u32*)(&(skb->data[4])), *(u32*)(&(skb->data[0]))); 963 964 spin_unlock_irqrestore(&priv->lock, flags); 965 966 return; 967 968 openwifi_tx_after_dma_mapping: 969 dma_unmap_single(priv->tx_chan->device->dev, dma_mapping_addr, num_dma_byte, DMA_MEM_TO_DEV); 970 971 openwifi_tx_early_out_after_lock: 972 // skb_pull(skb, LEN_PHY_HEADER); 973 dev_kfree_skb(skb); 974 spin_unlock_irqrestore(&priv->lock, flags); 975 // printk("%s openwifi_tx: WARNING openwifi_tx_after_dma_mapping phy_tx_sn %d queue %d\n", sdr_compatible_str,priv->phy_tx_sn,queue_idx); 976 return; 977 978 openwifi_tx_early_out: 979 dev_kfree_skb(skb); 980 // printk("%s openwifi_tx: WARNING openwifi_tx_early_out phy_tx_sn %d queue %d\n", sdr_compatible_str,priv->phy_tx_sn,queue_idx); 981 } 982 983 static int openwifi_start(struct ieee80211_hw *dev) 984 { 985 struct openwifi_priv *priv = dev->priv; 986 int ret, i, rssi_half_db_offset, agc_gain_delay;//rssi_half_db_th, 987 u32 reg; 988 989 for (i=0; i<MAX_NUM_VIF; i++) { 990 priv->vif[i] = NULL; 991 } 992 993 memset(priv->drv_tx_reg_val, 0, sizeof(priv->drv_tx_reg_val)); 994 memset(priv->drv_rx_reg_val, 0, sizeof(priv->drv_rx_reg_val)); 995 memset(priv->drv_xpu_reg_val, 0, sizeof(priv->drv_xpu_reg_val)); 996 priv->drv_xpu_reg_val[DRV_XPU_REG_IDX_GIT_REV] = GIT_REV; 997 998 //turn on radio 999 if (priv->tx_intf_cfg == TX_INTF_BW_20MHZ_AT_N_10MHZ_ANT1) { 1000 ad9361_set_tx_atten(priv->ad9361_phy, AD9361_RADIO_ON_TX_ATT, false, true, true); // AD9361_RADIO_ON_TX_ATT 3000 means 3dB, 0 means 0dB 1001 reg = ad9361_get_tx_atten(priv->ad9361_phy, 2); 1002 } else { 1003 ad9361_set_tx_atten(priv->ad9361_phy, AD9361_RADIO_ON_TX_ATT, true, false, true); // AD9361_RADIO_ON_TX_ATT 3000 means 3dB, 0 means 0dB 1004 reg = ad9361_get_tx_atten(priv->ad9361_phy, 1); 1005 } 1006 if (reg == AD9361_RADIO_ON_TX_ATT) { 1007 priv->rfkill_off = 1;// 0 off, 1 on 1008 printk("%s openwifi_start: rfkill radio on\n",sdr_compatible_str); 1009 } 1010 else 1011 printk("%s openwifi_start: WARNING rfkill radio on failed. tx att read %d require %d\n",sdr_compatible_str, reg, AD9361_RADIO_ON_TX_ATT); 1012 1013 if (priv->rx_intf_cfg == RX_INTF_BW_20MHZ_AT_0MHZ_ANT0) 1014 priv->ctrl_out.index=0x16; 1015 else 1016 priv->ctrl_out.index=0x17; 1017 1018 ret = ad9361_ctrl_outs_setup(priv->ad9361_phy, &(priv->ctrl_out)); 1019 if (ret < 0) { 1020 printk("%s openwifi_start: WARNING ad9361_ctrl_outs_setup %d\n",sdr_compatible_str, ret); 1021 } else { 1022 printk("%s openwifi_start: ad9361_ctrl_outs_setup en_mask 0x%02x index 0x%02x\n",sdr_compatible_str, priv->ctrl_out.en_mask, priv->ctrl_out.index); 1023 } 1024 1025 priv->rx_freq_offset_to_lo_MHz = rx_intf_fo_mapping[priv->rx_intf_cfg]; 1026 priv->tx_freq_offset_to_lo_MHz = tx_intf_fo_mapping[priv->tx_intf_cfg]; 1027 1028 rx_intf_api->hw_init(priv->rx_intf_cfg,8,8); 1029 tx_intf_api->hw_init(priv->tx_intf_cfg,8,8,priv->fpga_type); 1030 openofdm_tx_api->hw_init(priv->openofdm_tx_cfg); 1031 openofdm_rx_api->hw_init(priv->openofdm_rx_cfg); 1032 xpu_api->hw_init(priv->xpu_cfg); 1033 1034 agc_gain_delay = 50; //samples 1035 rssi_half_db_offset = 150; // to be consistent 1036 xpu_api->XPU_REG_RSSI_DB_CFG_write(0x80000000|((rssi_half_db_offset<<16)|agc_gain_delay) ); 1037 xpu_api->XPU_REG_RSSI_DB_CFG_write((~0x80000000)&((rssi_half_db_offset<<16)|agc_gain_delay) ); 1038 1039 openofdm_rx_api->OPENOFDM_RX_REG_POWER_THRES_write(0); 1040 // rssi_half_db_th = 87<<1; // -62dBm // will setup in runtime in _rf_set_channel 1041 // xpu_api->XPU_REG_LBT_TH_write(rssi_half_db_th); // set IQ rssi th step .5dB to xxx and enable it 1042 xpu_api->XPU_REG_FORCE_IDLE_MISC_write(75); //control the duration to force ch_idle after decoding a packet due to imperfection of agc and signals 1043 1044 //xpu_api->XPU_REG_SEND_ACK_WAIT_TOP_write( ((40)<<16)|0 );//high 16bit 5GHz; low 16 bit 2.4GHz (Attention, current tx core has around 1.19us starting delay that makes the ack fall behind 10us SIFS in 2.4GHz! Need to improve TX in 2.4GHz!) 1045 //xpu_api->XPU_REG_SEND_ACK_WAIT_TOP_write( ((51)<<16)|0 );//now our tx send out I/Q immediately 1046 xpu_api->XPU_REG_SEND_ACK_WAIT_TOP_write( ((51+23)<<16)|(0+23) );//we have more time when we use FIR in AD9361 1047 1048 xpu_api->XPU_REG_RECV_ACK_COUNT_TOP0_write( (1<<31) | (((45+2+2)*10 + 15)<<16) | 10 );//2.4GHz. extra 300 clocks are needed when rx core fall into fake ht detection phase (rx mcs 6M) 1049 xpu_api->XPU_REG_RECV_ACK_COUNT_TOP1_write( (1<<31) | (((51+2+2)*10 + 15)<<16) | 10 );//5GHz. extra 300 clocks are needed when rx core fall into fake ht detection phase (rx mcs 6M) 1050 1051 tx_intf_api->TX_INTF_REG_CTS_TOSELF_WAIT_SIFS_TOP_write( ((16*10)<<16)|(10*10) );//high 16bit 5GHz; low 16 bit 2.4GHz. counter speed 10MHz is assumed 1052 1053 // //xpu_api->XPU_REG_BB_RF_DELAY_write(51); // fine tuned value at 0.005us. old: dac-->ant port: 0.6us, 57 taps fir at 40MHz: 1.425us; round trip: 2*(0.6+1.425)=4.05us; 4.05*10=41 1054 // xpu_api->XPU_REG_BB_RF_DELAY_write(47);//add .5us for slightly longer fir -- already in xpu.c 1055 xpu_api->XPU_REG_MAC_ADDR_write(priv->mac_addr); 1056 1057 // setup time schedule of 4 slices 1058 // slice 0 1059 xpu_api->XPU_REG_SLICE_COUNT_TOTAL_write(50000-1); // total 50ms 1060 xpu_api->XPU_REG_SLICE_COUNT_START_write(0); //start 0ms 1061 xpu_api->XPU_REG_SLICE_COUNT_END_write(50000-1); //end 50ms 1062 1063 // slice 1 1064 xpu_api->XPU_REG_SLICE_COUNT_TOTAL_write((1<<20)|(50000-1)); // total 50ms 1065 xpu_api->XPU_REG_SLICE_COUNT_START_write((1<<20)|(0)); //start 0ms 1066 //xpu_api->XPU_REG_SLICE_COUNT_END_write((1<<20)|(20000-1)); //end 20ms 1067 xpu_api->XPU_REG_SLICE_COUNT_END_write((1<<20)|(50000-1)); //end 20ms 1068 1069 // slice 2 1070 xpu_api->XPU_REG_SLICE_COUNT_TOTAL_write((2<<20)|(50000-1)); // total 50ms 1071 //xpu_api->XPU_REG_SLICE_COUNT_START_write((2<<20)|(20000)); //start 20ms 1072 xpu_api->XPU_REG_SLICE_COUNT_START_write((2<<20)|(0)); //start 20ms 1073 //xpu_api->XPU_REG_SLICE_COUNT_END_write((2<<20)|(40000-1)); //end 20ms 1074 xpu_api->XPU_REG_SLICE_COUNT_END_write((2<<20)|(50000-1)); //end 20ms 1075 1076 // slice 3 1077 xpu_api->XPU_REG_SLICE_COUNT_TOTAL_write((3<<20)|(50000-1)); // total 50ms 1078 //xpu_api->XPU_REG_SLICE_COUNT_START_write((3<<20)|(40000)); //start 40ms 1079 xpu_api->XPU_REG_SLICE_COUNT_START_write((3<<20)|(0)); //start 40ms 1080 //xpu_api->XPU_REG_SLICE_COUNT_END_write((3<<20)|(50000-1)); //end 20ms 1081 xpu_api->XPU_REG_SLICE_COUNT_END_write((3<<20)|(50000-1)); //end 20ms 1082 1083 // all slice sync rest 1084 xpu_api->XPU_REG_MULTI_RST_write(1<<7); //bit7 reset the counter for all queues at the same time 1085 xpu_api->XPU_REG_MULTI_RST_write(0<<7); 1086 1087 //xpu_api->XPU_REG_MAC_ADDR_HIGH_write( (*( (u16*)(priv->mac_addr + 4) )) ); 1088 printk("%s openwifi_start: rx_intf_cfg %d openofdm_rx_cfg %d tx_intf_cfg %d openofdm_tx_cfg %d\n",sdr_compatible_str, priv->rx_intf_cfg, priv->openofdm_rx_cfg, priv->tx_intf_cfg, priv->openofdm_tx_cfg); 1089 printk("%s openwifi_start: rx_freq_offset_to_lo_MHz %d tx_freq_offset_to_lo_MHz %d\n",sdr_compatible_str, priv->rx_freq_offset_to_lo_MHz, priv->tx_freq_offset_to_lo_MHz); 1090 1091 tx_intf_api->TX_INTF_REG_INTERRUPT_SEL_write(0x30004); //disable tx interrupt 1092 rx_intf_api->RX_INTF_REG_INTERRUPT_TEST_write(0x100); // disable rx interrupt by interrupt test mode 1093 rx_intf_api->RX_INTF_REG_M_AXIS_RST_write(1); // hold M AXIS in reset status 1094 1095 if (test_mode==1) { 1096 printk("%s openwifi_start: test_mode==1\n",sdr_compatible_str); 1097 goto normal_out; 1098 } 1099 1100 priv->rx_chan = dma_request_slave_channel(&(priv->pdev->dev), "rx_dma_s2mm"); 1101 if (IS_ERR(priv->rx_chan) || priv->rx_chan==NULL) { 1102 ret = PTR_ERR(priv->rx_chan); 1103 pr_err("%s openwifi_start: No Rx channel ret %d priv->rx_chan 0x%p\n",sdr_compatible_str, ret, priv->rx_chan); 1104 goto err_dma; 1105 } 1106 1107 priv->tx_chan = dma_request_slave_channel(&(priv->pdev->dev), "tx_dma_mm2s"); 1108 if (IS_ERR(priv->tx_chan) || priv->tx_chan==NULL) { 1109 ret = PTR_ERR(priv->tx_chan); 1110 pr_err("%s openwifi_start: No Tx channel ret %d priv->tx_chan 0x%p\n",sdr_compatible_str, ret, priv->tx_chan); 1111 goto err_dma; 1112 } 1113 printk("%s openwifi_start: DMA channel setup successfully. priv->rx_chan 0x%p priv->tx_chan 0x%p\n",sdr_compatible_str, priv->rx_chan, priv->tx_chan); 1114 1115 ret = openwifi_init_rx_ring(priv); 1116 if (ret) { 1117 printk("%s openwifi_start: openwifi_init_rx_ring ret %d\n", sdr_compatible_str,ret); 1118 goto err_free_rings; 1119 } 1120 1121 priv->seqno=0; 1122 for (i=0; i<MAX_NUM_SW_QUEUE; i++) { 1123 if ((ret = openwifi_init_tx_ring(priv, i))) { 1124 printk("%s openwifi_start: openwifi_init_tx_ring %d ret %d\n", sdr_compatible_str, i, ret); 1125 goto err_free_rings; 1126 } 1127 } 1128 1129 if ( (ret = rx_dma_setup(dev)) ) { 1130 printk("%s openwifi_start: rx_dma_setup ret %d\n", sdr_compatible_str,ret); 1131 goto err_free_rings; 1132 } 1133 1134 priv->irq_rx = irq_of_parse_and_map(priv->pdev->dev.of_node, 1); 1135 ret = request_irq(priv->irq_rx, openwifi_rx_interrupt, 1136 IRQF_SHARED, "sdr,rx_pkt_intr", dev); 1137 if (ret) { 1138 wiphy_err(dev->wiphy, "openwifi_start:failed to register IRQ handler openwifi_rx_interrupt\n"); 1139 goto err_free_rings; 1140 } else { 1141 printk("%s openwifi_start: irq_rx %d\n", sdr_compatible_str, priv->irq_rx); 1142 } 1143 1144 priv->irq_tx = irq_of_parse_and_map(priv->pdev->dev.of_node, 3); 1145 ret = request_irq(priv->irq_tx, openwifi_tx_interrupt, 1146 IRQF_SHARED, "sdr,tx_itrpt", dev); 1147 if (ret) { 1148 wiphy_err(dev->wiphy, "openwifi_start: failed to register IRQ handler openwifi_tx_interrupt\n"); 1149 goto err_free_rings; 1150 } else { 1151 printk("%s openwifi_start: irq_tx %d\n", sdr_compatible_str, priv->irq_tx); 1152 } 1153 1154 rx_intf_api->RX_INTF_REG_INTERRUPT_TEST_write(0x000); // enable rx interrupt get normal fcs valid pass through ddc to ARM 1155 tx_intf_api->TX_INTF_REG_INTERRUPT_SEL_write(0x4); //enable tx interrupt 1156 rx_intf_api->RX_INTF_REG_M_AXIS_RST_write(0); // release M AXIS 1157 xpu_api->XPU_REG_TSF_LOAD_VAL_write(0,0); // reset tsf timer 1158 1159 //ieee80211_wake_queue(dev, 0); 1160 1161 normal_out: 1162 printk("%s openwifi_start: normal end\n", sdr_compatible_str); 1163 return 0; 1164 1165 err_free_rings: 1166 openwifi_free_rx_ring(priv); 1167 for (i=0; i<MAX_NUM_SW_QUEUE; i++) 1168 openwifi_free_tx_ring(priv, i); 1169 1170 err_dma: 1171 ret = -1; 1172 printk("%s openwifi_start: abnormal end ret %d\n", sdr_compatible_str, ret); 1173 return ret; 1174 } 1175 1176 static void openwifi_stop(struct ieee80211_hw *dev) 1177 { 1178 struct openwifi_priv *priv = dev->priv; 1179 u32 reg, reg1; 1180 int i; 1181 1182 if (test_mode==1){ 1183 pr_info("%s openwifi_stop: test_mode==1\n", sdr_compatible_str); 1184 goto normal_out; 1185 } 1186 1187 //turn off radio 1188 #if 1 1189 ad9361_tx_mute(priv->ad9361_phy, 1); 1190 reg = ad9361_get_tx_atten(priv->ad9361_phy, 2); 1191 reg1 = ad9361_get_tx_atten(priv->ad9361_phy, 1); 1192 if (reg == AD9361_RADIO_OFF_TX_ATT && reg1 == AD9361_RADIO_OFF_TX_ATT ) { 1193 priv->rfkill_off = 0;// 0 off, 1 on 1194 printk("%s openwifi_stop: rfkill radio off\n",sdr_compatible_str); 1195 } 1196 else 1197 printk("%s openwifi_stop: WARNING rfkill radio off failed. tx att read %d %d require %d\n",sdr_compatible_str, reg, reg1, AD9361_RADIO_OFF_TX_ATT); 1198 #endif 1199 1200 //ieee80211_stop_queue(dev, 0); 1201 1202 tx_intf_api->TX_INTF_REG_INTERRUPT_SEL_write(0x30004); //disable tx interrupt 1203 rx_intf_api->RX_INTF_REG_INTERRUPT_TEST_write(0x100); // disable fcs_valid by interrupt test mode 1204 rx_intf_api->RX_INTF_REG_M_AXIS_RST_write(1); // hold M AXIS in reset status 1205 1206 for (i=0; i<MAX_NUM_VIF; i++) { 1207 priv->vif[i] = NULL; 1208 } 1209 1210 openwifi_free_rx_ring(priv); 1211 for (i=0; i<MAX_NUM_SW_QUEUE; i++) 1212 openwifi_free_tx_ring(priv, i); 1213 1214 pr_info("%s openwifi_stop: dropped channel %s\n", sdr_compatible_str, dma_chan_name(priv->rx_chan)); 1215 dmaengine_terminate_all(priv->rx_chan); 1216 dma_release_channel(priv->rx_chan); 1217 pr_info("%s openwifi_stop: dropped channel %s\n", sdr_compatible_str, dma_chan_name(priv->tx_chan)); 1218 dmaengine_terminate_all(priv->tx_chan); 1219 dma_release_channel(priv->tx_chan); 1220 1221 //priv->rf->stop(dev); 1222 1223 free_irq(priv->irq_rx, dev); 1224 free_irq(priv->irq_tx, dev); 1225 1226 normal_out: 1227 printk("%s openwifi_stop\n", sdr_compatible_str); 1228 } 1229 1230 static u64 openwifi_get_tsf(struct ieee80211_hw *dev, 1231 struct ieee80211_vif *vif) 1232 { 1233 u32 tsft_low, tsft_high; 1234 1235 tsft_low = xpu_api->XPU_REG_TSF_RUNTIME_VAL_LOW_read(); 1236 tsft_high = xpu_api->XPU_REG_TSF_RUNTIME_VAL_HIGH_read(); 1237 //printk("%s openwifi_get_tsf: %08x%08x\n", sdr_compatible_str,tsft_high,tsft_low); 1238 return( ( (u64)tsft_low ) | ( ((u64)tsft_high)<<32 ) ); 1239 } 1240 1241 static void openwifi_set_tsf(struct ieee80211_hw *hw, struct ieee80211_vif *vif, u64 tsf) 1242 { 1243 u32 tsft_high = ((tsf >> 32)&0xffffffff); 1244 u32 tsft_low = (tsf&0xffffffff); 1245 xpu_api->XPU_REG_TSF_LOAD_VAL_write(tsft_high,tsft_low); 1246 printk("%s openwifi_set_tsf: %08x%08x\n", sdr_compatible_str,tsft_high,tsft_low); 1247 } 1248 1249 static void openwifi_reset_tsf(struct ieee80211_hw *hw, struct ieee80211_vif *vif) 1250 { 1251 xpu_api->XPU_REG_TSF_LOAD_VAL_write(0,0); 1252 printk("%s openwifi_reset_tsf\n", sdr_compatible_str); 1253 } 1254 1255 static int openwifi_set_rts_threshold(struct ieee80211_hw *hw, u32 value) 1256 { 1257 printk("%s openwifi_set_rts_threshold WARNING value %d\n", sdr_compatible_str,value); 1258 return(0); 1259 } 1260 1261 static void openwifi_beacon_work(struct work_struct *work) 1262 { 1263 struct openwifi_vif *vif_priv = 1264 container_of(work, struct openwifi_vif, beacon_work.work); 1265 struct ieee80211_vif *vif = 1266 container_of((void *)vif_priv, struct ieee80211_vif, drv_priv); 1267 struct ieee80211_hw *dev = vif_priv->dev; 1268 struct ieee80211_mgmt *mgmt; 1269 struct sk_buff *skb; 1270 1271 /* don't overflow the tx ring */ 1272 if (ieee80211_queue_stopped(dev, 0)) 1273 goto resched; 1274 1275 /* grab a fresh beacon */ 1276 skb = ieee80211_beacon_get(dev, vif); 1277 if (!skb) 1278 goto resched; 1279 1280 /* 1281 * update beacon timestamp w/ TSF value 1282 * TODO: make hardware update beacon timestamp 1283 */ 1284 mgmt = (struct ieee80211_mgmt *)skb->data; 1285 mgmt->u.beacon.timestamp = cpu_to_le64(openwifi_get_tsf(dev, vif)); 1286 1287 /* TODO: use actual beacon queue */ 1288 skb_set_queue_mapping(skb, 0); 1289 openwifi_tx(dev, NULL, skb); 1290 1291 resched: 1292 /* 1293 * schedule next beacon 1294 * TODO: use hardware support for beacon timing 1295 */ 1296 schedule_delayed_work(&vif_priv->beacon_work, 1297 usecs_to_jiffies(1024 * vif->bss_conf.beacon_int)); 1298 } 1299 1300 static int openwifi_add_interface(struct ieee80211_hw *dev, 1301 struct ieee80211_vif *vif) 1302 { 1303 int i; 1304 struct openwifi_priv *priv = dev->priv; 1305 struct openwifi_vif *vif_priv; 1306 1307 switch (vif->type) { 1308 case NL80211_IFTYPE_AP: 1309 case NL80211_IFTYPE_STATION: 1310 case NL80211_IFTYPE_ADHOC: 1311 case NL80211_IFTYPE_MONITOR: 1312 case NL80211_IFTYPE_MESH_POINT: 1313 break; 1314 default: 1315 return -EOPNOTSUPP; 1316 } 1317 // let's support more than 1 interface 1318 for (i=0; i<MAX_NUM_VIF; i++) { 1319 if (priv->vif[i] == NULL) 1320 break; 1321 } 1322 1323 printk("%s openwifi_add_interface start. vif for loop result %d\n", sdr_compatible_str, i); 1324 1325 if (i==MAX_NUM_VIF) 1326 return -EBUSY; 1327 1328 priv->vif[i] = vif; 1329 1330 /* Initialize driver private area */ 1331 vif_priv = (struct openwifi_vif *)&vif->drv_priv; 1332 vif_priv->idx = i; 1333 1334 vif_priv->dev = dev; 1335 INIT_DELAYED_WORK(&vif_priv->beacon_work, openwifi_beacon_work); 1336 vif_priv->enable_beacon = false; 1337 1338 printk("%s openwifi_add_interface end with vif idx %d\n", sdr_compatible_str,vif_priv->idx); 1339 1340 return 0; 1341 } 1342 1343 static void openwifi_remove_interface(struct ieee80211_hw *dev, 1344 struct ieee80211_vif *vif) 1345 { 1346 struct openwifi_vif *vif_priv; 1347 struct openwifi_priv *priv = dev->priv; 1348 1349 vif_priv = (struct openwifi_vif *)&vif->drv_priv; 1350 priv->vif[vif_priv->idx] = NULL; 1351 printk("%s openwifi_remove_interface vif idx %d\n", sdr_compatible_str, vif_priv->idx); 1352 } 1353 1354 static int openwifi_config(struct ieee80211_hw *dev, u32 changed) 1355 { 1356 struct openwifi_priv *priv = dev->priv; 1357 struct ieee80211_conf *conf = &dev->conf; 1358 1359 if (changed & IEEE80211_CONF_CHANGE_CHANNEL) 1360 priv->rf->set_chan(dev, conf); 1361 else 1362 printk("%s openwifi_config changed flag %08x\n", sdr_compatible_str, changed); 1363 1364 return 0; 1365 } 1366 1367 static void openwifi_bss_info_changed(struct ieee80211_hw *dev, 1368 struct ieee80211_vif *vif, 1369 struct ieee80211_bss_conf *info, 1370 u32 changed) 1371 { 1372 struct openwifi_priv *priv = dev->priv; 1373 struct openwifi_vif *vif_priv; 1374 u32 bssid_low, bssid_high; 1375 1376 vif_priv = (struct openwifi_vif *)&vif->drv_priv; 1377 1378 //be careful: we don have valid chip, so registers addresses in priv->map->BSSID[0] are not valid! should not print it! 1379 //printk("%s openwifi_bss_info_changed map bssid %02x%02x%02x%02x%02x%02x\n",sdr_compatible_str,priv->map->BSSID[0],priv->map->BSSID[1],priv->map->BSSID[2],priv->map->BSSID[3],priv->map->BSSID[4],priv->map->BSSID[5]); 1380 if (changed & BSS_CHANGED_BSSID) { 1381 printk("%s openwifi_bss_info_changed BSS_CHANGED_BSSID %02x%02x%02x%02x%02x%02x\n",sdr_compatible_str,info->bssid[0],info->bssid[1],info->bssid[2],info->bssid[3],info->bssid[4],info->bssid[5]); 1382 // write new bssid to our HW, and do not change bssid filter 1383 //u32 bssid_filter_high = xpu_api->XPU_REG_BSSID_FILTER_HIGH_read(); 1384 bssid_low = ( *( (u32*)(info->bssid) ) ); 1385 bssid_high = ( *( (u16*)(info->bssid+4) ) ); 1386 1387 //bssid_filter_high = (bssid_filter_high&0x80000000); 1388 //bssid_high = (bssid_high|bssid_filter_high); 1389 xpu_api->XPU_REG_BSSID_FILTER_LOW_write(bssid_low); 1390 xpu_api->XPU_REG_BSSID_FILTER_HIGH_write(bssid_high); 1391 } 1392 1393 if (changed & BSS_CHANGED_BEACON_INT) { 1394 printk("%s openwifi_bss_info_changed WARNING BSS_CHANGED_BEACON_INT %x\n",sdr_compatible_str,info->beacon_int); 1395 } 1396 1397 if (changed & BSS_CHANGED_TXPOWER) 1398 printk("%s openwifi_bss_info_changed WARNING BSS_CHANGED_TXPOWER %x\n",sdr_compatible_str,info->txpower); 1399 1400 if (changed & BSS_CHANGED_ERP_CTS_PROT) 1401 printk("%s openwifi_bss_info_changed WARNING BSS_CHANGED_ERP_CTS_PROT %x\n",sdr_compatible_str,info->use_cts_prot); 1402 1403 if (changed & BSS_CHANGED_BASIC_RATES) 1404 printk("%s openwifi_bss_info_changed WARNING BSS_CHANGED_BASIC_RATES %x\n",sdr_compatible_str,info->basic_rates); 1405 1406 if (changed & (BSS_CHANGED_ERP_SLOT | BSS_CHANGED_ERP_PREAMBLE)) { 1407 printk("%s openwifi_bss_info_changed WARNING BSS_CHANGED_ERP_SLOT %d BSS_CHANGED_ERP_PREAMBLE %d short slot %d\n",sdr_compatible_str, 1408 changed&BSS_CHANGED_ERP_SLOT,changed&BSS_CHANGED_ERP_PREAMBLE,info->use_short_slot); 1409 if (info->use_short_slot && priv->use_short_slot==false) { 1410 priv->use_short_slot=true; 1411 xpu_api->XPU_REG_BAND_CHANNEL_write( (priv->use_short_slot<<24)|(priv->band<<16) ); 1412 } else if ((!info->use_short_slot) && priv->use_short_slot==true) { 1413 priv->use_short_slot=false; 1414 xpu_api->XPU_REG_BAND_CHANNEL_write( (priv->use_short_slot<<24)|(priv->band<<16) ); 1415 } 1416 } 1417 1418 if (changed & BSS_CHANGED_BEACON_ENABLED) { 1419 printk("%s openwifi_bss_info_changed WARNING BSS_CHANGED_BEACON_ENABLED\n",sdr_compatible_str); 1420 vif_priv->enable_beacon = info->enable_beacon; 1421 } 1422 1423 if (changed & (BSS_CHANGED_BEACON_ENABLED | BSS_CHANGED_BEACON)) { 1424 cancel_delayed_work_sync(&vif_priv->beacon_work); 1425 if (vif_priv->enable_beacon) 1426 schedule_work(&vif_priv->beacon_work.work); 1427 printk("%s openwifi_bss_info_changed WARNING BSS_CHANGED_BEACON_ENABLED %d BSS_CHANGED_BEACON %d\n",sdr_compatible_str, 1428 changed&BSS_CHANGED_BEACON_ENABLED,changed&BSS_CHANGED_BEACON); 1429 } 1430 } 1431 // helper function 1432 u32 log2val(u32 val){ 1433 u32 ret_val = 0 ; 1434 while(val>1){ 1435 val = val >> 1 ; 1436 ret_val ++ ; 1437 } 1438 return ret_val ; 1439 } 1440 1441 static int openwifi_conf_tx(struct ieee80211_hw *hw, struct ieee80211_vif *vif, u16 queue, 1442 const struct ieee80211_tx_queue_params *params) 1443 { 1444 u32 reg_val, cw_min_exp, cw_max_exp; 1445 1446 printk("%s openwifi_conf_tx: [queue %d], aifs: %d, cw_min: %d, cw_max: %d, txop: %d, aifs and txop ignored\n", 1447 sdr_compatible_str,queue,params->aifs,params->cw_min,params->cw_max,params->txop); 1448 1449 reg_val=xpu_api->XPU_REG_CSMA_CFG_read(); 1450 cw_min_exp = (log2val(params->cw_min + 1) & 0x0F); 1451 cw_max_exp = (log2val(params->cw_max + 1) & 0x0F); 1452 switch(queue){ 1453 case 0: reg_val = ( (reg_val & 0xFFFFFF00) | ((cw_min_exp | (cw_max_exp << 4)) << 0) ); break; 1454 case 1: reg_val = ( (reg_val & 0xFFFF00FF) | ((cw_min_exp | (cw_max_exp << 4)) << 8) ); break; 1455 case 2: reg_val = ( (reg_val & 0xFF00FFFF) | ((cw_min_exp | (cw_max_exp << 4)) << 16) ); break; 1456 case 3: reg_val = ( (reg_val & 0x00FFFFFF) | ((cw_min_exp | (cw_max_exp << 4)) << 24) ); break; 1457 default: printk("%s openwifi_conf_tx: WARNING queue %d does not exist",sdr_compatible_str, queue); return(0); 1458 } 1459 xpu_api->XPU_REG_CSMA_CFG_write(reg_val); 1460 return(0); 1461 } 1462 1463 static u64 openwifi_prepare_multicast(struct ieee80211_hw *dev, 1464 struct netdev_hw_addr_list *mc_list) 1465 { 1466 printk("%s openwifi_prepare_multicast\n", sdr_compatible_str); 1467 return netdev_hw_addr_list_count(mc_list); 1468 } 1469 1470 static void openwifi_configure_filter(struct ieee80211_hw *dev, 1471 unsigned int changed_flags, 1472 unsigned int *total_flags, 1473 u64 multicast) 1474 { 1475 u32 filter_flag; 1476 1477 (*total_flags) &= SDR_SUPPORTED_FILTERS; 1478 (*total_flags) |= FIF_ALLMULTI; //because we need to pass all multicast (no matter it is for us or not) to upper layer 1479 1480 filter_flag = (*total_flags); 1481 1482 filter_flag = (filter_flag|UNICAST_FOR_US|BROADCAST_ALL_ONE|BROADCAST_ALL_ZERO); 1483 //filter_flag = (filter_flag|UNICAST_FOR_US|BROADCAST_ALL_ONE|BROADCAST_ALL_ZERO|MONITOR_ALL); // all pkt will be delivered to arm 1484 1485 //if (priv->vif[0]->type == NL80211_IFTYPE_MONITOR) 1486 if ((filter_flag&0xf0) == 0xf0) //FIF_BCN_PRBRESP_PROMISC/FIF_CONTROL/FIF_OTHER_BSS/FIF_PSPOLL are set means monitor mode 1487 filter_flag = (filter_flag|MONITOR_ALL); 1488 else 1489 filter_flag = (filter_flag&(~MONITOR_ALL)); 1490 1491 if ( !(filter_flag&FIF_BCN_PRBRESP_PROMISC) ) 1492 filter_flag = (filter_flag|MY_BEACON); 1493 1494 filter_flag = (filter_flag|FIF_PSPOLL); 1495 1496 xpu_api->XPU_REG_FILTER_FLAG_write(filter_flag|HIGH_PRIORITY_DISCARD_FLAG); 1497 //xpu_api->XPU_REG_FILTER_FLAG_write(filter_flag); //do not discard any pkt 1498 1499 printk("%s openwifi_configure_filter MON %d M_BCN %d BST0 %d BST1 %d UST %d PB_RQ %d PS_PL %d O_BSS %d CTL %d BCN_PRP %d PCP_FL %d FCS_FL %d ALL_MUT %d\n", sdr_compatible_str, 1500 (filter_flag>>13)&1,(filter_flag>>12)&1,(filter_flag>>11)&1,(filter_flag>>10)&1,(filter_flag>>9)&1,(filter_flag>>8)&1,(filter_flag>>7)&1,(filter_flag>>6)&1,(filter_flag>>5)&1,(filter_flag>>4)&1,(filter_flag>>3)&1,(filter_flag>>2)&1,(filter_flag>>1)&1); 1501 } 1502 1503 static int openwifi_testmode_cmd(struct ieee80211_hw *hw, struct ieee80211_vif *vif, void *data, int len) 1504 { 1505 struct openwifi_priv *priv = hw->priv; 1506 struct nlattr *tb[OPENWIFI_ATTR_MAX + 1]; 1507 struct sk_buff *skb; 1508 int err; 1509 u32 tmp=-1, reg_cat, reg_addr, reg_val, reg_addr_idx, tsft_high, tsft_low; 1510 1511 err = nla_parse(tb, OPENWIFI_ATTR_MAX, data, len, openwifi_testmode_policy, NULL); 1512 if (err) 1513 return err; 1514 1515 if (!tb[OPENWIFI_ATTR_CMD]) 1516 return -EINVAL; 1517 1518 switch (nla_get_u32(tb[OPENWIFI_ATTR_CMD])) { 1519 case OPENWIFI_CMD_SET_GAP: 1520 if (!tb[OPENWIFI_ATTR_GAP]) 1521 return -EINVAL; 1522 tmp = nla_get_u32(tb[OPENWIFI_ATTR_GAP]); 1523 printk("%s openwifi radio inter frame gap set to %d usec\n", sdr_compatible_str, tmp); 1524 xpu_api->XPU_REG_CSMA_CFG_write(tmp); // unit us 1525 return 0; 1526 case OPENWIFI_CMD_GET_GAP: 1527 skb = cfg80211_testmode_alloc_reply_skb(hw->wiphy, nla_total_size(sizeof(u32))); 1528 if (!skb) 1529 return -ENOMEM; 1530 tmp = xpu_api->XPU_REG_CSMA_CFG_read(); 1531 if (nla_put_u32(skb, OPENWIFI_ATTR_GAP, tmp)) 1532 goto nla_put_failure; 1533 return cfg80211_testmode_reply(skb); 1534 case OPENWIFI_CMD_SET_SLICE_IDX: 1535 if (!tb[OPENWIFI_ATTR_SLICE_IDX]) 1536 return -EINVAL; 1537 tmp = nla_get_u32(tb[OPENWIFI_ATTR_SLICE_IDX]); 1538 printk("%s set openwifi slice_idx in hex: %08x\n", sdr_compatible_str, tmp); 1539 if (tmp == MAX_NUM_HW_QUEUE) { 1540 printk("%s set openwifi slice_idx reset all queue counter.\n", sdr_compatible_str); 1541 xpu_api->XPU_REG_MULTI_RST_write(1<<7); //bit7 reset the counter for all queues at the same time 1542 xpu_api->XPU_REG_MULTI_RST_write(0<<7); 1543 } else { 1544 priv->slice_idx = tmp; 1545 } 1546 return 0; 1547 case OPENWIFI_CMD_GET_SLICE_IDX: 1548 skb = cfg80211_testmode_alloc_reply_skb(hw->wiphy, nla_total_size(sizeof(u32))); 1549 if (!skb) 1550 return -ENOMEM; 1551 tmp = priv->slice_idx; 1552 if (nla_put_u32(skb, OPENWIFI_ATTR_SLICE_IDX, tmp)) 1553 goto nla_put_failure; 1554 printk("%s get openwifi slice_idx in hex: %08x\n", sdr_compatible_str, tmp); 1555 return cfg80211_testmode_reply(skb); 1556 case OPENWIFI_CMD_SET_ADDR: 1557 if (!tb[OPENWIFI_ATTR_ADDR]) 1558 return -EINVAL; 1559 tmp = nla_get_u32(tb[OPENWIFI_ATTR_ADDR]); 1560 if (priv->slice_idx>=MAX_NUM_HW_QUEUE) { 1561 printk("%s set openwifi slice_target_mac_addr(low32) WARNING: current slice idx %d is invalid!\n", sdr_compatible_str, priv->slice_idx); 1562 } else { 1563 printk("%s set openwifi slice_target_mac_addr(low32) in hex: %08x to slice %d\n", sdr_compatible_str, tmp, priv->slice_idx); 1564 priv->dest_mac_addr_queue_map[priv->slice_idx] = reverse32(tmp); 1565 } 1566 return 0; 1567 case OPENWIFI_CMD_GET_ADDR: 1568 skb = cfg80211_testmode_alloc_reply_skb(hw->wiphy, nla_total_size(sizeof(u32))); 1569 if (!skb) 1570 return -ENOMEM; 1571 if (priv->slice_idx>=MAX_NUM_HW_QUEUE) { 1572 tmp = -1; 1573 } else { 1574 tmp = reverse32(priv->dest_mac_addr_queue_map[priv->slice_idx]); 1575 } 1576 if (nla_put_u32(skb, OPENWIFI_ATTR_ADDR, tmp)) 1577 goto nla_put_failure; 1578 printk("%s get openwifi slice_target_mac_addr(low32) in hex: %08x of slice %d\n", sdr_compatible_str, tmp, priv->slice_idx); 1579 return cfg80211_testmode_reply(skb); 1580 1581 case OPENWIFI_CMD_SET_SLICE_TOTAL: 1582 if (!tb[OPENWIFI_ATTR_SLICE_TOTAL]) 1583 return -EINVAL; 1584 tmp = nla_get_u32(tb[OPENWIFI_ATTR_SLICE_TOTAL]); 1585 if (priv->slice_idx>=MAX_NUM_HW_QUEUE) { 1586 printk("%s set SLICE_TOTAL(duration) WARNING: current slice idx %d is invalid!\n", sdr_compatible_str, priv->slice_idx); 1587 } else { 1588 printk("%s set SLICE_TOTAL(duration) %d usec to slice %d\n", sdr_compatible_str, tmp, priv->slice_idx); 1589 xpu_api->XPU_REG_SLICE_COUNT_TOTAL_write((priv->slice_idx<<20)|tmp); 1590 } 1591 return 0; 1592 case OPENWIFI_CMD_GET_SLICE_TOTAL: 1593 skb = cfg80211_testmode_alloc_reply_skb(hw->wiphy, nla_total_size(sizeof(u32))); 1594 if (!skb) 1595 return -ENOMEM; 1596 tmp = (xpu_api->XPU_REG_SLICE_COUNT_TOTAL_read()); 1597 printk("%s get SLICE_TOTAL(duration) %d usec of slice %d\n", sdr_compatible_str, tmp&0xFFFFF, tmp>>20); 1598 if (nla_put_u32(skb, OPENWIFI_ATTR_SLICE_TOTAL, tmp)) 1599 goto nla_put_failure; 1600 return cfg80211_testmode_reply(skb); 1601 1602 case OPENWIFI_CMD_SET_SLICE_START: 1603 if (!tb[OPENWIFI_ATTR_SLICE_START]) 1604 return -EINVAL; 1605 tmp = nla_get_u32(tb[OPENWIFI_ATTR_SLICE_START]); 1606 if (priv->slice_idx>=MAX_NUM_HW_QUEUE) { 1607 printk("%s set SLICE_START(duration) WARNING: current slice idx %d is invalid!\n", sdr_compatible_str, priv->slice_idx); 1608 } else { 1609 printk("%s set SLICE_START(duration) %d usec to slice %d\n", sdr_compatible_str, tmp, priv->slice_idx); 1610 xpu_api->XPU_REG_SLICE_COUNT_START_write((priv->slice_idx<<20)|tmp); 1611 } 1612 return 0; 1613 case OPENWIFI_CMD_GET_SLICE_START: 1614 skb = cfg80211_testmode_alloc_reply_skb(hw->wiphy, nla_total_size(sizeof(u32))); 1615 if (!skb) 1616 return -ENOMEM; 1617 tmp = (xpu_api->XPU_REG_SLICE_COUNT_START_read()); 1618 printk("%s get SLICE_START(duration) %d usec of slice %d\n", sdr_compatible_str, tmp&0xFFFFF, tmp>>20); 1619 if (nla_put_u32(skb, OPENWIFI_ATTR_SLICE_START, tmp)) 1620 goto nla_put_failure; 1621 return cfg80211_testmode_reply(skb); 1622 1623 case OPENWIFI_CMD_SET_SLICE_END: 1624 if (!tb[OPENWIFI_ATTR_SLICE_END]) 1625 return -EINVAL; 1626 tmp = nla_get_u32(tb[OPENWIFI_ATTR_SLICE_END]); 1627 if (priv->slice_idx>=MAX_NUM_HW_QUEUE) { 1628 printk("%s set SLICE_END(duration) WARNING: current slice idx %d is invalid!\n", sdr_compatible_str, priv->slice_idx); 1629 } else { 1630 printk("%s set SLICE_END(duration) %d usec to slice %d\n", sdr_compatible_str, tmp, priv->slice_idx); 1631 xpu_api->XPU_REG_SLICE_COUNT_END_write((priv->slice_idx<<20)|tmp); 1632 } 1633 return 0; 1634 case OPENWIFI_CMD_GET_SLICE_END: 1635 skb = cfg80211_testmode_alloc_reply_skb(hw->wiphy, nla_total_size(sizeof(u32))); 1636 if (!skb) 1637 return -ENOMEM; 1638 tmp = (xpu_api->XPU_REG_SLICE_COUNT_END_read()); 1639 printk("%s get SLICE_END(duration) %d usec of slice %d\n", sdr_compatible_str, tmp&0xFFFFF, tmp>>20); 1640 if (nla_put_u32(skb, OPENWIFI_ATTR_SLICE_END, tmp)) 1641 goto nla_put_failure; 1642 return cfg80211_testmode_reply(skb); 1643 1644 // case OPENWIFI_CMD_SET_SLICE_TOTAL1: 1645 // if (!tb[OPENWIFI_ATTR_SLICE_TOTAL1]) 1646 // return -EINVAL; 1647 // tmp = nla_get_u32(tb[OPENWIFI_ATTR_SLICE_TOTAL1]); 1648 // printk("%s set SLICE_TOTAL1(duration) to %d usec\n", sdr_compatible_str, tmp); 1649 // // xpu_api->XPU_REG_SLICE_COUNT_TOTAL1_write(tmp); 1650 // return 0; 1651 // case OPENWIFI_CMD_GET_SLICE_TOTAL1: 1652 // skb = cfg80211_testmode_alloc_reply_skb(hw->wiphy, nla_total_size(sizeof(u32))); 1653 // if (!skb) 1654 // return -ENOMEM; 1655 // // tmp = (xpu_api->XPU_REG_SLICE_COUNT_TOTAL1_read()); 1656 // if (nla_put_u32(skb, OPENWIFI_ATTR_SLICE_TOTAL1, tmp)) 1657 // goto nla_put_failure; 1658 // return cfg80211_testmode_reply(skb); 1659 1660 // case OPENWIFI_CMD_SET_SLICE_START1: 1661 // if (!tb[OPENWIFI_ATTR_SLICE_START1]) 1662 // return -EINVAL; 1663 // tmp = nla_get_u32(tb[OPENWIFI_ATTR_SLICE_START1]); 1664 // printk("%s set SLICE_START1(duration) to %d usec\n", sdr_compatible_str, tmp); 1665 // // xpu_api->XPU_REG_SLICE_COUNT_START1_write(tmp); 1666 // return 0; 1667 // case OPENWIFI_CMD_GET_SLICE_START1: 1668 // skb = cfg80211_testmode_alloc_reply_skb(hw->wiphy, nla_total_size(sizeof(u32))); 1669 // if (!skb) 1670 // return -ENOMEM; 1671 // // tmp = (xpu_api->XPU_REG_SLICE_COUNT_START1_read()); 1672 // if (nla_put_u32(skb, OPENWIFI_ATTR_SLICE_START1, tmp)) 1673 // goto nla_put_failure; 1674 // return cfg80211_testmode_reply(skb); 1675 1676 // case OPENWIFI_CMD_SET_SLICE_END1: 1677 // if (!tb[OPENWIFI_ATTR_SLICE_END1]) 1678 // return -EINVAL; 1679 // tmp = nla_get_u32(tb[OPENWIFI_ATTR_SLICE_END1]); 1680 // printk("%s set SLICE_END1(duration) to %d usec\n", sdr_compatible_str, tmp); 1681 // // xpu_api->XPU_REG_SLICE_COUNT_END1_write(tmp); 1682 // return 0; 1683 // case OPENWIFI_CMD_GET_SLICE_END1: 1684 // skb = cfg80211_testmode_alloc_reply_skb(hw->wiphy, nla_total_size(sizeof(u32))); 1685 // if (!skb) 1686 // return -ENOMEM; 1687 // // tmp = (xpu_api->XPU_REG_SLICE_COUNT_END1_read()); 1688 // if (nla_put_u32(skb, OPENWIFI_ATTR_SLICE_END1, tmp)) 1689 // goto nla_put_failure; 1690 // return cfg80211_testmode_reply(skb); 1691 1692 case OPENWIFI_CMD_SET_RSSI_TH: 1693 if (!tb[OPENWIFI_ATTR_RSSI_TH]) 1694 return -EINVAL; 1695 tmp = nla_get_u32(tb[OPENWIFI_ATTR_RSSI_TH]); 1696 // printk("%s set RSSI_TH to %d\n", sdr_compatible_str, tmp); 1697 // xpu_api->XPU_REG_LBT_TH_write(tmp); 1698 // return 0; 1699 printk("%s WARNING Please use command: sdrctl dev sdr0 set reg drv_xpu 0 reg_value! (1~2047, 0 means AUTO)!\n", sdr_compatible_str); 1700 return -EOPNOTSUPP; 1701 case OPENWIFI_CMD_GET_RSSI_TH: 1702 skb = cfg80211_testmode_alloc_reply_skb(hw->wiphy, nla_total_size(sizeof(u32))); 1703 if (!skb) 1704 return -ENOMEM; 1705 tmp = xpu_api->XPU_REG_LBT_TH_read(); 1706 if (nla_put_u32(skb, OPENWIFI_ATTR_RSSI_TH, tmp)) 1707 goto nla_put_failure; 1708 return cfg80211_testmode_reply(skb); 1709 1710 case OPENWIFI_CMD_SET_TSF: 1711 printk("openwifi_set_tsf_1"); 1712 if ( (!tb[OPENWIFI_ATTR_HIGH_TSF]) || (!tb[OPENWIFI_ATTR_LOW_TSF]) ) 1713 return -EINVAL; 1714 printk("openwifi_set_tsf_2"); 1715 tsft_high = nla_get_u32(tb[OPENWIFI_ATTR_HIGH_TSF]); 1716 tsft_low = nla_get_u32(tb[OPENWIFI_ATTR_LOW_TSF]); 1717 xpu_api->XPU_REG_TSF_LOAD_VAL_write(tsft_high,tsft_low); 1718 printk("%s openwifi_set_tsf: %08x%08x\n", sdr_compatible_str,tsft_high,tsft_low); 1719 return 0; 1720 1721 case REG_CMD_SET: 1722 if ( (!tb[REG_ATTR_ADDR]) || (!tb[REG_ATTR_VAL]) ) 1723 return -EINVAL; 1724 reg_addr = nla_get_u32(tb[REG_ATTR_ADDR]); 1725 reg_val = nla_get_u32(tb[REG_ATTR_VAL]); 1726 reg_cat = ((reg_addr>>16)&0xFFFF); 1727 reg_addr = (reg_addr&0xFFFF); 1728 reg_addr_idx = (reg_addr>>2); 1729 printk("%s recv set cmd reg cat %d addr %08x val %08x idx %d\n", sdr_compatible_str, reg_cat, reg_addr, reg_val, reg_addr_idx); 1730 if (reg_cat==1) 1731 printk("%s WARNING reg cat 1 (rf) is not supported yet!\n", sdr_compatible_str); 1732 else if (reg_cat==2) 1733 rx_intf_api->reg_write(reg_addr,reg_val); 1734 else if (reg_cat==3) 1735 tx_intf_api->reg_write(reg_addr,reg_val); 1736 else if (reg_cat==4) 1737 openofdm_rx_api->reg_write(reg_addr,reg_val); 1738 else if (reg_cat==5) 1739 openofdm_tx_api->reg_write(reg_addr,reg_val); 1740 else if (reg_cat==6) 1741 xpu_api->reg_write(reg_addr,reg_val); 1742 else if (reg_cat==7) { 1743 if (reg_addr_idx>=0 && reg_addr_idx<MAX_NUM_DRV_REG) { 1744 priv->drv_rx_reg_val[reg_addr_idx]=reg_val; 1745 if (reg_addr_idx==DRV_RX_REG_IDX_FREQ_BW_CFG) { 1746 if (reg_val==0) 1747 priv->rx_intf_cfg = RX_INTF_BW_20MHZ_AT_0MHZ_ANT0; 1748 else 1749 priv->rx_intf_cfg = RX_INTF_BW_20MHZ_AT_0MHZ_ANT1; 1750 1751 priv->rx_freq_offset_to_lo_MHz = rx_intf_fo_mapping[priv->rx_intf_cfg]; 1752 //priv->tx_freq_offset_to_lo_MHz = tx_intf_fo_mapping[priv->tx_intf_cfg]; 1753 } 1754 } else 1755 printk("%s WARNING reg_addr_idx %d is out of range!\n", sdr_compatible_str, reg_addr_idx); 1756 } 1757 else if (reg_cat==8) { 1758 if (reg_addr_idx>=0 && reg_addr_idx<MAX_NUM_DRV_REG) { 1759 priv->drv_tx_reg_val[reg_addr_idx]=reg_val; 1760 if (reg_addr_idx==DRV_TX_REG_IDX_FREQ_BW_CFG) { 1761 if (reg_val==0) { 1762 priv->tx_intf_cfg = TX_INTF_BW_20MHZ_AT_N_10MHZ_ANT0; 1763 ad9361_set_tx_atten(priv->ad9361_phy, AD9361_RADIO_ON_TX_ATT, true, false, true); 1764 } else { 1765 priv->tx_intf_cfg = TX_INTF_BW_20MHZ_AT_N_10MHZ_ANT1; 1766 ad9361_set_tx_atten(priv->ad9361_phy, AD9361_RADIO_ON_TX_ATT, false, true, true); 1767 } 1768 1769 //priv->rx_freq_offset_to_lo_MHz = rx_intf_fo_mapping[priv->rx_intf_cfg]; 1770 priv->tx_freq_offset_to_lo_MHz = tx_intf_fo_mapping[priv->tx_intf_cfg]; 1771 } 1772 } else 1773 printk("%s WARNING reg_addr_idx %d is out of range!\n", sdr_compatible_str, reg_addr_idx); 1774 } 1775 else if (reg_cat==9) { 1776 if (reg_addr_idx>=0 && reg_addr_idx<MAX_NUM_DRV_REG) { 1777 priv->drv_xpu_reg_val[reg_addr_idx]=reg_val; 1778 if (reg_addr_idx==DRV_XPU_REG_IDX_LBT_TH) { 1779 if (reg_val) { 1780 xpu_api->XPU_REG_LBT_TH_write(reg_val); 1781 printk("%s override FPGA LBT threshold to %d. The last_auto_fpga_lbt_th %d\n", sdr_compatible_str, reg_val, priv->last_auto_fpga_lbt_th); 1782 } else { 1783 xpu_api->XPU_REG_LBT_TH_write(priv->last_auto_fpga_lbt_th); 1784 printk("%s Restore last_auto_fpga_lbt_th %d to FPGA. ad9361_rf_set_channel will take control\n", sdr_compatible_str, priv->last_auto_fpga_lbt_th); 1785 } 1786 } 1787 } else 1788 printk("%s WARNING reg_addr_idx %d is out of range!\n", sdr_compatible_str, reg_addr_idx); 1789 } 1790 else 1791 printk("%s WARNING reg cat %d is not supported yet!\n", sdr_compatible_str, reg_cat); 1792 1793 return 0; 1794 case REG_CMD_GET: 1795 skb = cfg80211_testmode_alloc_reply_skb(hw->wiphy, nla_total_size(sizeof(u32))); 1796 if (!skb) 1797 return -ENOMEM; 1798 reg_addr = nla_get_u32(tb[REG_ATTR_ADDR]); 1799 reg_cat = ((reg_addr>>16)&0xFFFF); 1800 reg_addr = (reg_addr&0xFFFF); 1801 reg_addr_idx = (reg_addr>>2); 1802 printk("%s recv get cmd reg cat %d addr %08x idx %d\n", sdr_compatible_str, reg_cat, reg_addr, reg_addr_idx); 1803 if (reg_cat==1) { 1804 printk("%s WARNING reg cat 1 (rf) is not supported yet!\n", sdr_compatible_str); 1805 tmp = 0xFFFFFFFF; 1806 } 1807 else if (reg_cat==2) 1808 tmp = rx_intf_api->reg_read(reg_addr); 1809 else if (reg_cat==3) 1810 tmp = tx_intf_api->reg_read(reg_addr); 1811 else if (reg_cat==4) 1812 tmp = openofdm_rx_api->reg_read(reg_addr); 1813 else if (reg_cat==5) 1814 tmp = openofdm_tx_api->reg_read(reg_addr); 1815 else if (reg_cat==6) 1816 tmp = xpu_api->reg_read(reg_addr); 1817 else if (reg_cat==7) { 1818 if (reg_addr_idx>=0 && reg_addr_idx<MAX_NUM_DRV_REG) { 1819 if (reg_addr_idx==DRV_RX_REG_IDX_FREQ_BW_CFG) { 1820 priv->rx_freq_offset_to_lo_MHz = rx_intf_fo_mapping[priv->rx_intf_cfg]; 1821 //priv->tx_freq_offset_to_lo_MHz = tx_intf_fo_mapping[priv->tx_intf_cfg]; 1822 1823 if (priv->rx_intf_cfg == RX_INTF_BW_20MHZ_AT_0MHZ_ANT0) 1824 priv->drv_rx_reg_val[reg_addr_idx]=0; 1825 else if (priv->rx_intf_cfg == RX_INTF_BW_20MHZ_AT_0MHZ_ANT1) 1826 priv->drv_rx_reg_val[reg_addr_idx]=1; 1827 } 1828 tmp = priv->drv_rx_reg_val[reg_addr_idx]; 1829 } else 1830 printk("%s WARNING reg_addr_idx %d is out of range!\n", sdr_compatible_str, reg_addr_idx); 1831 } 1832 else if (reg_cat==8) { 1833 if (reg_addr_idx>=0 && reg_addr_idx<MAX_NUM_DRV_REG) { 1834 if (reg_addr_idx==DRV_TX_REG_IDX_FREQ_BW_CFG) { 1835 //priv->rx_freq_offset_to_lo_MHz = rx_intf_fo_mapping[priv->rx_intf_cfg]; 1836 priv->tx_freq_offset_to_lo_MHz = tx_intf_fo_mapping[priv->tx_intf_cfg]; 1837 if (priv->tx_intf_cfg == TX_INTF_BW_20MHZ_AT_N_10MHZ_ANT0) 1838 priv->drv_tx_reg_val[reg_addr_idx]=0; 1839 else if (priv->tx_intf_cfg == TX_INTF_BW_20MHZ_AT_N_10MHZ_ANT1) 1840 priv->drv_tx_reg_val[reg_addr_idx]=1; 1841 } 1842 tmp = priv->drv_tx_reg_val[reg_addr_idx]; 1843 } else 1844 printk("%s WARNING reg_addr_idx %d is out of range!\n", sdr_compatible_str, reg_addr_idx); 1845 } 1846 else if (reg_cat==9) { 1847 if (reg_addr_idx>=0 && reg_addr_idx<MAX_NUM_DRV_REG) 1848 tmp = priv->drv_xpu_reg_val[reg_addr_idx]; 1849 else 1850 printk("%s WARNING reg_addr_idx %d is out of range!\n", sdr_compatible_str, reg_addr_idx); 1851 } 1852 else 1853 printk("%s WARNING reg cat %d is not supported yet!\n", sdr_compatible_str, reg_cat); 1854 1855 if (nla_put_u32(skb, REG_ATTR_VAL, tmp)) 1856 goto nla_put_failure; 1857 return cfg80211_testmode_reply(skb); 1858 1859 default: 1860 return -EOPNOTSUPP; 1861 } 1862 1863 nla_put_failure: 1864 dev_kfree_skb(skb); 1865 return -ENOBUFS; 1866 } 1867 1868 static const struct ieee80211_ops openwifi_ops = { 1869 .tx = openwifi_tx, 1870 .start = openwifi_start, 1871 .stop = openwifi_stop, 1872 .add_interface = openwifi_add_interface, 1873 .remove_interface = openwifi_remove_interface, 1874 .config = openwifi_config, 1875 .bss_info_changed = openwifi_bss_info_changed, 1876 .conf_tx = openwifi_conf_tx, 1877 .prepare_multicast = openwifi_prepare_multicast, 1878 .configure_filter = openwifi_configure_filter, 1879 .rfkill_poll = openwifi_rfkill_poll, 1880 .get_tsf = openwifi_get_tsf, 1881 .set_tsf = openwifi_set_tsf, 1882 .reset_tsf = openwifi_reset_tsf, 1883 .set_rts_threshold = openwifi_set_rts_threshold, 1884 .testmode_cmd = openwifi_testmode_cmd, 1885 }; 1886 1887 static const struct of_device_id openwifi_dev_of_ids[] = { 1888 { .compatible = "sdr,sdr", }, 1889 {} 1890 }; 1891 MODULE_DEVICE_TABLE(of, openwifi_dev_of_ids); 1892 1893 static int custom_match_spi_dev(struct device *dev, void *data) 1894 { 1895 const char *name = data; 1896 1897 bool ret = sysfs_streq(name, dev->of_node->name); 1898 printk("%s custom_match_spi_dev %s %s %d\n", sdr_compatible_str,name, dev->of_node->name, ret); 1899 return ret; 1900 } 1901 1902 static int custom_match_platform_dev(struct device *dev, void *data) 1903 { 1904 struct platform_device *plat_dev = to_platform_device(dev); 1905 const char *name = data; 1906 char *name_in_sys_bus_platform_devices = strstr(plat_dev->name, name); 1907 bool match_flag = (name_in_sys_bus_platform_devices != NULL); 1908 1909 if (match_flag) { 1910 printk("%s custom_match_platform_dev %s\n", sdr_compatible_str,plat_dev->name); 1911 } 1912 return(match_flag); 1913 } 1914 1915 static int openwifi_dev_probe(struct platform_device *pdev) 1916 { 1917 struct ieee80211_hw *dev; 1918 struct openwifi_priv *priv; 1919 int err=1, rand_val; 1920 const char *chip_name, *fpga_model; 1921 u32 reg;//, reg1; 1922 1923 struct device_node *np = pdev->dev.of_node; 1924 1925 struct device *tmp_dev; 1926 struct platform_device *tmp_pdev; 1927 struct iio_dev *tmp_indio_dev; 1928 // struct gpio_leds_priv *tmp_led_priv; 1929 1930 printk("\n"); 1931 1932 if (np) { 1933 const struct of_device_id *match; 1934 1935 match = of_match_node(openwifi_dev_of_ids, np); 1936 if (match) { 1937 printk("%s openwifi_dev_probe: match!\n", sdr_compatible_str); 1938 err = 0; 1939 } 1940 } 1941 1942 if (err) 1943 return err; 1944 1945 dev = ieee80211_alloc_hw(sizeof(*priv), &openwifi_ops); 1946 if (!dev) { 1947 printk(KERN_ERR "%s openwifi_dev_probe: ieee80211 alloc failed\n",sdr_compatible_str); 1948 err = -ENOMEM; 1949 goto err_free_dev; 1950 } 1951 1952 priv = dev->priv; 1953 priv->pdev = pdev; 1954 1955 err = of_property_read_string(of_find_node_by_path("/"), "model", &fpga_model); 1956 if(err < 0) { 1957 printk("%s openwifi_dev_probe: WARNING unknown openwifi FPGA model %d\n",sdr_compatible_str, err); 1958 priv->fpga_type = SMALL_FPGA; 1959 } else { 1960 // LARGE FPGAs (i.e. ZCU102, Z7035, ZC706) 1961 if(strstr(fpga_model, "ZCU102") != NULL || strstr(fpga_model, "Z7035") != NULL || strstr(fpga_model, "ZC706") != NULL) 1962 priv->fpga_type = LARGE_FPGA; 1963 // SMALL FPGA: (i.e. ZED, ZC702, Z7020) 1964 else if(strstr(fpga_model, "ZED") != NULL || strstr(fpga_model, "ZC702") != NULL || strstr(fpga_model, "Z7020") != NULL) 1965 priv->fpga_type = SMALL_FPGA; 1966 } 1967 1968 // //-------------find ad9361-phy driver for lo/channel control--------------- 1969 priv->actual_rx_lo = 0; 1970 tmp_dev = bus_find_device( &spi_bus_type, NULL, "ad9361-phy", custom_match_spi_dev ); 1971 if (tmp_dev == NULL) { 1972 printk(KERN_ERR "%s find_dev ad9361-phy failed\n",sdr_compatible_str); 1973 err = -ENOMEM; 1974 goto err_free_dev; 1975 } 1976 printk("%s bus_find_device ad9361-phy: %s. driver_data pointer %p\n", sdr_compatible_str, ((struct spi_device*)tmp_dev)->modalias, (void*)(((struct spi_device*)tmp_dev)->dev.driver_data)); 1977 if (((struct spi_device*)tmp_dev)->dev.driver_data == NULL) { 1978 printk(KERN_ERR "%s find_dev ad9361-phy failed. dev.driver_data == NULL\n",sdr_compatible_str); 1979 err = -ENOMEM; 1980 goto err_free_dev; 1981 } 1982 1983 priv->ad9361_phy = ad9361_spi_to_phy((struct spi_device*)tmp_dev); 1984 if (!(priv->ad9361_phy)) { 1985 printk(KERN_ERR "%s ad9361_spi_to_phy failed\n",sdr_compatible_str); 1986 err = -ENOMEM; 1987 goto err_free_dev; 1988 } 1989 printk("%s ad9361_spi_to_phy ad9361-phy: %s\n", sdr_compatible_str, priv->ad9361_phy->spi->modalias); 1990 1991 priv->ctrl_out.en_mask=0xFF; 1992 priv->ctrl_out.index=0x16; 1993 err = ad9361_ctrl_outs_setup(priv->ad9361_phy, &(priv->ctrl_out)); 1994 if (err < 0) { 1995 printk("%s openwifi_dev_probe: WARNING ad9361_ctrl_outs_setup %d\n",sdr_compatible_str, err); 1996 } else { 1997 printk("%s openwifi_dev_probe: ad9361_ctrl_outs_setup en_mask 0x%02x index 0x%02x\n",sdr_compatible_str, priv->ctrl_out.en_mask, priv->ctrl_out.index); 1998 } 1999 2000 reg = ad9361_spi_read(priv->ad9361_phy->spi, REG_CTRL_OUTPUT_POINTER); 2001 printk("%s openwifi_dev_probe: ad9361_spi_read REG_CTRL_OUTPUT_POINTER 0x%02x\n",sdr_compatible_str, reg); 2002 reg = ad9361_spi_read(priv->ad9361_phy->spi, REG_CTRL_OUTPUT_ENABLE); 2003 printk("%s openwifi_dev_probe: ad9361_spi_read REG_CTRL_OUTPUT_ENABLE 0x%02x\n",sdr_compatible_str, reg); 2004 2005 // //-------------find driver: axi_ad9361 hdl ref design module, dac channel--------------- 2006 tmp_dev = bus_find_device( &platform_bus_type, NULL, "cf-ad9361-dds-core-lpc", custom_match_platform_dev ); 2007 if (!tmp_dev) { 2008 printk(KERN_ERR "%s bus_find_device platform_bus_type cf-ad9361-dds-core-lpc failed\n",sdr_compatible_str); 2009 err = -ENOMEM; 2010 goto err_free_dev; 2011 } 2012 2013 tmp_pdev = to_platform_device(tmp_dev); 2014 if (!tmp_pdev) { 2015 printk(KERN_ERR "%s to_platform_device failed\n",sdr_compatible_str); 2016 err = -ENOMEM; 2017 goto err_free_dev; 2018 } 2019 2020 tmp_indio_dev = platform_get_drvdata(tmp_pdev); 2021 if (!tmp_indio_dev) { 2022 printk(KERN_ERR "%s platform_get_drvdata failed\n",sdr_compatible_str); 2023 err = -ENOMEM; 2024 goto err_free_dev; 2025 } 2026 2027 priv->dds_st = iio_priv(tmp_indio_dev); 2028 if (!(priv->dds_st)) { 2029 printk(KERN_ERR "%s iio_priv failed\n",sdr_compatible_str); 2030 err = -ENOMEM; 2031 goto err_free_dev; 2032 } 2033 printk("%s openwifi_dev_probe: cf-ad9361-dds-core-lpc dds_st->version %08x chip_info->name %s\n",sdr_compatible_str,priv->dds_st->version,priv->dds_st->chip_info->name); 2034 cf_axi_dds_datasel(priv->dds_st, -1, DATA_SEL_DMA); 2035 printk("%s openwifi_dev_probe: cf_axi_dds_datasel DATA_SEL_DMA\n",sdr_compatible_str); 2036 2037 // //-------------find driver: axi_ad9361 hdl ref design module, adc channel--------------- 2038 // turn off radio by muting tx 2039 // ad9361_tx_mute(priv->ad9361_phy, 1); 2040 // reg = ad9361_get_tx_atten(priv->ad9361_phy, 2); 2041 // reg1 = ad9361_get_tx_atten(priv->ad9361_phy, 1); 2042 // if (reg == AD9361_RADIO_OFF_TX_ATT && reg1 == AD9361_RADIO_OFF_TX_ATT ) { 2043 // priv->rfkill_off = 0;// 0 off, 1 on 2044 // printk("%s openwifi_dev_probe: rfkill radio off\n",sdr_compatible_str); 2045 // } 2046 // else 2047 // printk("%s openwifi_dev_probe: WARNING rfkill radio off failed. tx att read %d %d require %d\n",sdr_compatible_str, reg, reg1, AD9361_RADIO_OFF_TX_ATT); 2048 2049 priv->last_auto_fpga_lbt_th = 134;//just to avoid uninitialized 2050 priv->rssi_correction = 43;//this will be set in real-time by _rf_set_channel() 2051 2052 //priv->rf_bw = 20000000; // Signal quality issue! NOT use for now. 20MHz or 40MHz. 40MHz need ddc/duc. 20MHz works in bypass mode 2053 priv->rf_bw = 40000000; // 20MHz or 40MHz. 40MHz need ddc/duc. 20MHz works in bypass mode 2054 2055 priv->xpu_cfg = XPU_NORMAL; 2056 2057 priv->openofdm_tx_cfg = OPENOFDM_TX_NORMAL; 2058 priv->openofdm_rx_cfg = OPENOFDM_RX_NORMAL; 2059 2060 printk("%s openwifi_dev_probe: priv->rf_bw == %dHz. bool for 20000000 %d, 40000000 %d\n",sdr_compatible_str, priv->rf_bw, (priv->rf_bw==20000000) , (priv->rf_bw==40000000) ); 2061 if (priv->rf_bw == 20000000) { 2062 priv->rx_intf_cfg = RX_INTF_BYPASS; 2063 priv->tx_intf_cfg = TX_INTF_BYPASS; 2064 //priv->rx_freq_offset_to_lo_MHz = 0; 2065 //priv->tx_freq_offset_to_lo_MHz = 0; 2066 } else if (priv->rf_bw == 40000000) { 2067 //priv->rx_intf_cfg = RX_INTF_BW_20MHZ_AT_P_10MHZ; //work 2068 //priv->tx_intf_cfg = TX_INTF_BW_20MHZ_AT_N_10MHZ_ANT1; //work 2069 2070 // // test ddc at central, duc at central+10M. It works. And also change rx BW from 40MHz to 20MHz in rf_init.sh. Rx sampling rate is still 40Msps 2071 priv->rx_intf_cfg = RX_INTF_BW_20MHZ_AT_0MHZ_ANT0; 2072 priv->tx_intf_cfg = TX_INTF_BW_20MHZ_AT_N_10MHZ_ANT0; // Let's use rx0 tx0 as default mode, because it works for both 9361 and 9364 2073 // // try another antenna option 2074 //priv->rx_intf_cfg = RX_INTF_BW_20MHZ_AT_0MHZ_ANT1; 2075 //priv->tx_intf_cfg = TX_INTF_BW_20MHZ_AT_N_10MHZ_ANT0; 2076 2077 #if 0 2078 if (priv->rx_intf_cfg == DDC_BW_20MHZ_AT_N_10MHZ) { 2079 priv->rx_freq_offset_to_lo_MHz = -10; 2080 } else if (priv->rx_intf_cfg == DDC_BW_20MHZ_AT_P_10MHZ) { 2081 priv->rx_freq_offset_to_lo_MHz = 10; 2082 } else if (priv->rx_intf_cfg == DDC_BW_20MHZ_AT_0MHZ) { 2083 priv->rx_freq_offset_to_lo_MHz = 0; 2084 } else { 2085 printk("%s openwifi_dev_probe: Warning! priv->rx_intf_cfg == %d\n",sdr_compatible_str,priv->rx_intf_cfg); 2086 } 2087 #endif 2088 } else { 2089 printk("%s openwifi_dev_probe: Warning! priv->rf_bw == %dHz (should be 20000000 or 40000000)\n",sdr_compatible_str, priv->rf_bw); 2090 } 2091 priv->rx_freq_offset_to_lo_MHz = rx_intf_fo_mapping[priv->rx_intf_cfg]; 2092 priv->tx_freq_offset_to_lo_MHz = tx_intf_fo_mapping[priv->tx_intf_cfg]; 2093 printk("%s openwifi_dev_probe: test_mode %d\n", sdr_compatible_str, test_mode); 2094 2095 //let's by default turn radio on when probing 2096 if (priv->tx_intf_cfg == TX_INTF_BW_20MHZ_AT_N_10MHZ_ANT1) { 2097 ad9361_set_tx_atten(priv->ad9361_phy, AD9361_RADIO_ON_TX_ATT, false, true, true); // AD9361_RADIO_ON_TX_ATT 3000 means 3dB, 0 means 0dB 2098 reg = ad9361_get_tx_atten(priv->ad9361_phy, 2); 2099 } else { 2100 ad9361_set_tx_atten(priv->ad9361_phy, AD9361_RADIO_ON_TX_ATT, true, false, true); // AD9361_RADIO_ON_TX_ATT 3000 means 3dB, 0 means 0dB 2101 reg = ad9361_get_tx_atten(priv->ad9361_phy, 1); 2102 } 2103 if (reg == AD9361_RADIO_ON_TX_ATT) { 2104 priv->rfkill_off = 1;// 0 off, 1 on 2105 printk("%s openwifi_dev_probe: rfkill radio on\n",sdr_compatible_str); 2106 } else 2107 printk("%s openwifi_dev_probe: WARNING rfkill radio on failed. tx att read %d require %d\n",sdr_compatible_str, reg, AD9361_RADIO_ON_TX_ATT); 2108 2109 memset(priv->drv_rx_reg_val,0,sizeof(priv->drv_rx_reg_val)); 2110 memset(priv->drv_tx_reg_val,0,sizeof(priv->drv_tx_reg_val)); 2111 memset(priv->drv_xpu_reg_val,0,sizeof(priv->drv_xpu_reg_val)); 2112 2113 // //set ad9361 in certain mode 2114 #if 0 2115 err = ad9361_set_trx_clock_chain_freq(priv->ad9361_phy,priv->rf_bw); 2116 printk("%s openwifi_dev_probe: ad9361_set_trx_clock_chain_freq %dHz err %d\n",sdr_compatible_str, priv->rf_bw,err); 2117 err = ad9361_update_rf_bandwidth(priv->ad9361_phy,priv->rf_bw,priv->rf_bw); 2118 printk("%s openwifi_dev_probe: ad9361_update_rf_bandwidth %dHz err %d\n",sdr_compatible_str, priv->rf_bw,err); 2119 2120 rx_intf_api->hw_init(priv->rx_intf_cfg,8,8); 2121 tx_intf_api->hw_init(priv->tx_intf_cfg,8,8,priv->fpga_type); 2122 openofdm_tx_api->hw_init(priv->openofdm_tx_cfg); 2123 openofdm_rx_api->hw_init(priv->openofdm_rx_cfg); 2124 printk("%s openwifi_dev_probe: rx_intf_cfg %d openofdm_rx_cfg %d tx_intf_cfg %d openofdm_tx_cfg %d\n",sdr_compatible_str, priv->rx_intf_cfg, priv->openofdm_rx_cfg, priv->tx_intf_cfg, priv->openofdm_tx_cfg); 2125 printk("%s openwifi_dev_probe: rx_freq_offset_to_lo_MHz %d tx_freq_offset_to_lo_MHz %d\n",sdr_compatible_str, priv->rx_freq_offset_to_lo_MHz, priv->tx_freq_offset_to_lo_MHz); 2126 #endif 2127 2128 dev->max_rates = 1; //maximum number of alternate rate retry stages the hw can handle. 2129 2130 SET_IEEE80211_DEV(dev, &pdev->dev); 2131 platform_set_drvdata(pdev, dev); 2132 2133 BUILD_BUG_ON(sizeof(priv->rates_2GHz) != sizeof(openwifi_2GHz_rates)); 2134 BUILD_BUG_ON(sizeof(priv->rates_5GHz) != sizeof(openwifi_5GHz_rates)); 2135 BUILD_BUG_ON(sizeof(priv->channels_2GHz) != sizeof(openwifi_2GHz_channels)); 2136 BUILD_BUG_ON(sizeof(priv->channels_5GHz) != sizeof(openwifi_5GHz_channels)); 2137 2138 memcpy(priv->rates_2GHz, openwifi_2GHz_rates, sizeof(openwifi_2GHz_rates)); 2139 memcpy(priv->rates_5GHz, openwifi_5GHz_rates, sizeof(openwifi_5GHz_rates)); 2140 memcpy(priv->channels_2GHz, openwifi_2GHz_channels, sizeof(openwifi_2GHz_channels)); 2141 memcpy(priv->channels_5GHz, openwifi_5GHz_channels, sizeof(openwifi_5GHz_channels)); 2142 2143 priv->band = BAND_5_8GHZ; //this can be changed by band _rf_set_channel() (2.4GHz ERP(OFDM)) (5GHz OFDM) 2144 priv->channel = 44; //currently useless. this can be changed by band _rf_set_channel() 2145 priv->use_short_slot = false; //this can be changed by openwifi_bss_info_changed: BSS_CHANGED_ERP_SLOT 2146 2147 priv->band_2GHz.band = NL80211_BAND_2GHZ; 2148 priv->band_2GHz.channels = priv->channels_2GHz; 2149 priv->band_2GHz.n_channels = ARRAY_SIZE(priv->channels_2GHz); 2150 priv->band_2GHz.bitrates = priv->rates_2GHz; 2151 priv->band_2GHz.n_bitrates = ARRAY_SIZE(priv->rates_2GHz); 2152 priv->band_2GHz.ht_cap.ht_supported = true; 2153 priv->band_2GHz.ht_cap.cap = IEEE80211_HT_CAP_SGI_20; 2154 memset(&priv->band_2GHz.ht_cap.mcs, 0, sizeof(priv->band_2GHz.ht_cap.mcs)); 2155 priv->band_2GHz.ht_cap.mcs.rx_mask[0] = 0xff; 2156 priv->band_2GHz.ht_cap.mcs.tx_params = IEEE80211_HT_MCS_TX_DEFINED; 2157 dev->wiphy->bands[NL80211_BAND_2GHZ] = &(priv->band_2GHz); 2158 2159 priv->band_5GHz.band = NL80211_BAND_5GHZ; 2160 priv->band_5GHz.channels = priv->channels_5GHz; 2161 priv->band_5GHz.n_channels = ARRAY_SIZE(priv->channels_5GHz); 2162 priv->band_5GHz.bitrates = priv->rates_5GHz; 2163 priv->band_5GHz.n_bitrates = ARRAY_SIZE(priv->rates_5GHz); 2164 priv->band_5GHz.ht_cap.ht_supported = true; 2165 priv->band_5GHz.ht_cap.cap = IEEE80211_HT_CAP_SGI_20; 2166 memset(&priv->band_5GHz.ht_cap.mcs, 0, sizeof(priv->band_5GHz.ht_cap.mcs)); 2167 priv->band_5GHz.ht_cap.mcs.rx_mask[0] = 0xff; 2168 priv->band_5GHz.ht_cap.mcs.tx_params = IEEE80211_HT_MCS_TX_DEFINED; 2169 dev->wiphy->bands[NL80211_BAND_5GHZ] = &(priv->band_5GHz); 2170 2171 printk("%s openwifi_dev_probe: band_2GHz.n_channels %d n_bitrates %d band_5GHz.n_channels %d n_bitrates %d\n",sdr_compatible_str, 2172 priv->band_2GHz.n_channels,priv->band_2GHz.n_bitrates,priv->band_5GHz.n_channels,priv->band_5GHz.n_bitrates); 2173 2174 ieee80211_hw_set(dev, HOST_BROADCAST_PS_BUFFERING); 2175 ieee80211_hw_set(dev, RX_INCLUDES_FCS); 2176 ieee80211_hw_set(dev, BEACON_TX_STATUS); 2177 2178 dev->vif_data_size = sizeof(struct openwifi_vif); 2179 dev->wiphy->interface_modes = 2180 BIT(NL80211_IFTYPE_MONITOR)| 2181 BIT(NL80211_IFTYPE_P2P_GO) | 2182 BIT(NL80211_IFTYPE_P2P_CLIENT) | 2183 BIT(NL80211_IFTYPE_AP) | 2184 BIT(NL80211_IFTYPE_STATION) | 2185 BIT(NL80211_IFTYPE_ADHOC) | 2186 BIT(NL80211_IFTYPE_MESH_POINT) | 2187 BIT(NL80211_IFTYPE_OCB); 2188 dev->wiphy->iface_combinations = &openwifi_if_comb; 2189 dev->wiphy->n_iface_combinations = 1; 2190 2191 dev->wiphy->regulatory_flags = (REGULATORY_STRICT_REG|REGULATORY_CUSTOM_REG); // use our own config within strict regulation 2192 //dev->wiphy->regulatory_flags = REGULATORY_CUSTOM_REG; // use our own config 2193 wiphy_apply_custom_regulatory(dev->wiphy, &sdr_regd); 2194 2195 chip_name = "ZYNQ"; 2196 2197 /* we declare to MAC80211 all the queues except for beacon queue 2198 * that will be eventually handled by DRV. 2199 * TX rings are arranged in such a way that lower is the IDX, 2200 * higher is the priority, in order to achieve direct mapping 2201 * with mac80211, however the beacon queue is an exception and it 2202 * is mapped on the highst tx ring IDX. 2203 */ 2204 dev->queues = MAX_NUM_HW_QUEUE; 2205 //dev->queues = 1; 2206 2207 ieee80211_hw_set(dev, SIGNAL_DBM); 2208 2209 wiphy_ext_feature_set(dev->wiphy, NL80211_EXT_FEATURE_CQM_RSSI_LIST); 2210 2211 priv->rf = &ad9361_rf_ops; 2212 2213 memset(priv->dest_mac_addr_queue_map,0,sizeof(priv->dest_mac_addr_queue_map)); 2214 priv->slice_idx = 0xFFFFFFFF; 2215 2216 sg_init_table(&(priv->tx_sg), 1); 2217 2218 get_random_bytes(&rand_val, sizeof(rand_val)); 2219 rand_val%=250; 2220 priv->mac_addr[0]=0x66; priv->mac_addr[1]=0x55; priv->mac_addr[2]=0x44; priv->mac_addr[3]=0x33; priv->mac_addr[4]=0x22; 2221 priv->mac_addr[5]=rand_val+1; 2222 //priv->mac_addr[5]=0x11; 2223 if (!is_valid_ether_addr(priv->mac_addr)) { 2224 printk(KERN_WARNING "%s openwifi_dev_probe: WARNING Invalid hwaddr! Using randomly generated MAC addr\n",sdr_compatible_str); 2225 eth_random_addr(priv->mac_addr); 2226 } else { 2227 printk("%s openwifi_dev_probe: mac_addr %02x:%02x:%02x:%02x:%02x:%02x\n",sdr_compatible_str,priv->mac_addr[0],priv->mac_addr[1],priv->mac_addr[2],priv->mac_addr[3],priv->mac_addr[4],priv->mac_addr[5]); 2228 } 2229 SET_IEEE80211_PERM_ADDR(dev, priv->mac_addr); 2230 2231 spin_lock_init(&priv->lock); 2232 2233 err = ieee80211_register_hw(dev); 2234 if (err) { 2235 pr_err(KERN_ERR "%s openwifi_dev_probe: WARNING Cannot register device\n",sdr_compatible_str); 2236 goto err_free_dev; 2237 } else { 2238 printk("%s openwifi_dev_probe: ieee80211_register_hw %d\n",sdr_compatible_str, err); 2239 } 2240 2241 // // //--------------------hook leds (not complete yet)-------------------------------- 2242 // tmp_dev = bus_find_device( &platform_bus_type, NULL, "leds", custom_match_platform_dev ); //leds is the name in devicetree, not "compatible" field 2243 // if (!tmp_dev) { 2244 // printk(KERN_ERR "%s bus_find_device platform_bus_type leds-gpio failed\n",sdr_compatible_str); 2245 // err = -ENOMEM; 2246 // goto err_free_dev; 2247 // } 2248 2249 // tmp_pdev = to_platform_device(tmp_dev); 2250 // if (!tmp_pdev) { 2251 // printk(KERN_ERR "%s to_platform_device failed for leds-gpio\n",sdr_compatible_str); 2252 // err = -ENOMEM; 2253 // goto err_free_dev; 2254 // } 2255 2256 // tmp_led_priv = platform_get_drvdata(tmp_pdev); 2257 // if (!tmp_led_priv) { 2258 // printk(KERN_ERR "%s platform_get_drvdata failed for leds-gpio\n",sdr_compatible_str); 2259 // err = -ENOMEM; 2260 // goto err_free_dev; 2261 // } 2262 // printk("%s openwifi_dev_probe: leds-gpio detect %d leds!\n",sdr_compatible_str, tmp_led_priv->num_leds); 2263 // if (tmp_led_priv->num_leds!=4){ 2264 // printk(KERN_ERR "%s WARNING we expect 4 leds, but actual %d leds\n",sdr_compatible_str,tmp_led_priv->num_leds); 2265 // err = -ENOMEM; 2266 // goto err_free_dev; 2267 // } 2268 // gpiod_set_value(tmp_led_priv->leds[0].gpiod, 1);//light it 2269 // gpiod_set_value(tmp_led_priv->leds[3].gpiod, 0);//black it 2270 // priv->num_led = tmp_led_priv->num_leds; 2271 // priv->led[0] = &(tmp_led_priv->leds[0].cdev); 2272 // priv->led[1] = &(tmp_led_priv->leds[1].cdev); 2273 // priv->led[2] = &(tmp_led_priv->leds[2].cdev); 2274 // priv->led[3] = &(tmp_led_priv->leds[3].cdev); 2275 2276 // snprintf(priv->led_name[0], OPENWIFI_LED_MAX_NAME_LEN, "openwifi-%s::radio", wiphy_name(dev->wiphy)); 2277 // snprintf(priv->led_name[1], OPENWIFI_LED_MAX_NAME_LEN, "openwifi-%s::assoc", wiphy_name(dev->wiphy)); 2278 // snprintf(priv->led_name[2], OPENWIFI_LED_MAX_NAME_LEN, "openwifi-%s::tx", wiphy_name(dev->wiphy)); 2279 // snprintf(priv->led_name[3], OPENWIFI_LED_MAX_NAME_LEN, "openwifi-%s::rx", wiphy_name(dev->wiphy)); 2280 2281 wiphy_info(dev->wiphy, "hwaddr %pm, %s + %s\n", 2282 priv->mac_addr, chip_name, priv->rf->name); 2283 2284 openwifi_rfkill_init(dev); 2285 return 0; 2286 2287 err_free_dev: 2288 ieee80211_free_hw(dev); 2289 2290 return err; 2291 } 2292 2293 static int openwifi_dev_remove(struct platform_device *pdev) 2294 { 2295 struct ieee80211_hw *dev = platform_get_drvdata(pdev); 2296 2297 if (!dev) { 2298 pr_info("%s openwifi_dev_remove: dev %p\n", sdr_compatible_str, (void*)dev); 2299 return(-1); 2300 } 2301 2302 openwifi_rfkill_exit(dev); 2303 ieee80211_unregister_hw(dev); 2304 ieee80211_free_hw(dev); 2305 return(0); 2306 } 2307 2308 static struct platform_driver openwifi_dev_driver = { 2309 .driver = { 2310 .name = "sdr,sdr", 2311 .owner = THIS_MODULE, 2312 .of_match_table = openwifi_dev_of_ids, 2313 }, 2314 .probe = openwifi_dev_probe, 2315 .remove = openwifi_dev_remove, 2316 }; 2317 2318 module_platform_driver(openwifi_dev_driver); 2319