RocketDebugWrapper.scala (d4aca96cccdcdafa80dd344996e18d1978a01af7) | RocketDebugWrapper.scala (c21bff99db38ffd5df19a9459a048e16b7b7cb23) |
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1/*************************************************************************************** 2* Copyright (c) 2020-2021 Institute of Computing Technology, Chinese Academy of Sciences 3* Copyright (c) 2020-2021 Peng Cheng Laboratory 4* 5* XiangShan is licensed under Mulan PSL v2. 6* You can use this software according to the terms and conditions of the Mulan PSL v2. 7* You may obtain a copy of Mulan PSL v2 at: 8* http://license.coscl.org.cn/MulanPSL2 --- 7 unchanged lines hidden (view full) --- 16 17package device 18 19import chisel3._ 20import xiangshan._ 21import chisel3.experimental.{IntParam, noPrefix} 22import chisel3.util._ 23import chisel3.util.HasBlackBoxResource | 1/*************************************************************************************** 2* Copyright (c) 2020-2021 Institute of Computing Technology, Chinese Academy of Sciences 3* Copyright (c) 2020-2021 Peng Cheng Laboratory 4* 5* XiangShan is licensed under Mulan PSL v2. 6* You can use this software according to the terms and conditions of the Mulan PSL v2. 7* You may obtain a copy of Mulan PSL v2 at: 8* http://license.coscl.org.cn/MulanPSL2 --- 7 unchanged lines hidden (view full) --- 16 17package device 18 19import chisel3._ 20import xiangshan._ 21import chisel3.experimental.{IntParam, noPrefix} 22import chisel3.util._ 23import chisel3.util.HasBlackBoxResource |
24import Chisel.BlackBox |
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24import freechips.rocketchip.config.{Field, Parameters} 25import freechips.rocketchip.subsystem._ 26import freechips.rocketchip.amba.apb._ 27import freechips.rocketchip.diplomacy._ 28import freechips.rocketchip.diplomaticobjectmodel.logicaltree.LogicalModuleTree 29import freechips.rocketchip.jtag._ 30import freechips.rocketchip.util._ 31import freechips.rocketchip.prci.{ClockSinkParameters, ClockSinkNode} --- 114 unchanged lines hidden --- | 25import freechips.rocketchip.config.{Field, Parameters} 26import freechips.rocketchip.subsystem._ 27import freechips.rocketchip.amba.apb._ 28import freechips.rocketchip.diplomacy._ 29import freechips.rocketchip.diplomaticobjectmodel.logicaltree.LogicalModuleTree 30import freechips.rocketchip.jtag._ 31import freechips.rocketchip.util._ 32import freechips.rocketchip.prci.{ClockSinkParameters, ClockSinkNode} --- 114 unchanged lines hidden --- |