YamlParser.scala (4c0658ae9e05c74858bf2155acf55197b8224fcd) YamlParser.scala (8cfc24b28454f1915c339ce79485711f8e438f59)
1/***************************************************************************************
2* Copyright (c) 2025 Beijing Institute of Open Source Chip (BOSC)
3* Copyright (c) 2025 Institute of Computing Technology, Chinese Academy of Sciences
4*
5* XiangShan is licensed under Mulan PSL v2.
6* You can use this software according to the terms and conditions of the Mulan PSL v2.
7* You may obtain a copy of Mulan PSL v2 at:
8* http://license.coscl.org.cn/MulanPSL2

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14* See the Mulan PSL v2 for more details.
15***************************************************************************************/
16
17package top
18
19import io.circe.generic.extras.Configuration
20import io.circe.generic.extras.auto._
21
1/***************************************************************************************
2* Copyright (c) 2025 Beijing Institute of Open Source Chip (BOSC)
3* Copyright (c) 2025 Institute of Computing Technology, Chinese Academy of Sciences
4*
5* XiangShan is licensed under Mulan PSL v2.
6* You can use this software according to the terms and conditions of the Mulan PSL v2.
7* You may obtain a copy of Mulan PSL v2 at:
8* http://license.coscl.org.cn/MulanPSL2

--- 5 unchanged lines hidden (view full) ---

14* See the Mulan PSL v2 for more details.
15***************************************************************************************/
16
17package top
18
19import io.circe.generic.extras.Configuration
20import io.circe.generic.extras.auto._
21
22import aia.IMSICParams
22import org.chipsalliance.cde.config.Parameters
23import system.SoCParamsKey
24import xiangshan.backend.fu.{MemoryRange, PMAConfigEntry}
25import xiangshan.XSTileKey
26import freechips.rocketchip.devices.debug.DebugModuleKey
27import freechips.rocketchip.diplomacy.AddressSet
28import freechips.rocketchip.util.AsyncQueueParams
23import org.chipsalliance.cde.config.Parameters
24import system.SoCParamsKey
25import xiangshan.backend.fu.{MemoryRange, PMAConfigEntry}
26import xiangshan.XSTileKey
27import freechips.rocketchip.devices.debug.DebugModuleKey
28import freechips.rocketchip.diplomacy.AddressSet
29import freechips.rocketchip.util.AsyncQueueParams
30import device.IMSICBusType
29
30case class YamlConfig(
31 PmemRanges: Option[List[MemoryRange]],
32 PMAConfigs: Option[List[PMAConfigEntry]],
33 EnableCHIAsyncBridge: Option[Boolean],
34 L2CacheConfig: Option[L2CacheConfig],
35 L3CacheConfig: Option[L3CacheConfig],
36 DebugModuleBaseAddr: Option[BigInt],
37 WFIResume: Option[Boolean],
38 SeperateDM: Option[Boolean],
39 SeperateTLBus: Option[Boolean],
31
32case class YamlConfig(
33 PmemRanges: Option[List[MemoryRange]],
34 PMAConfigs: Option[List[PMAConfigEntry]],
35 EnableCHIAsyncBridge: Option[Boolean],
36 L2CacheConfig: Option[L2CacheConfig],
37 L3CacheConfig: Option[L3CacheConfig],
38 DebugModuleBaseAddr: Option[BigInt],
39 WFIResume: Option[Boolean],
40 SeperateDM: Option[Boolean],
41 SeperateTLBus: Option[Boolean],
40 SeperateTLBusRanges: Option[List[AddressSet]]
42 SeperateTLBusRanges: Option[List[AddressSet]],
43 IMSICBusType: Option[String],
44 IMSICParams: Option[IMSICParams],
41)
42
43object YamlParser {
44 implicit val customParserConfig: Configuration = Configuration.default.withDefaults
45 def parseYaml(config: Parameters, yamlFile: String): Parameters = {
46 val yaml = scala.io.Source.fromFile(yamlFile).mkString
47 val json = io.circe.yaml.parser.parse(yaml) match {
48 case Left(value) => throw value

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92 case SoCParamsKey => up(SoCParamsKey).copy(SeperateTLBus = enable)
93 })
94 }
95 yamlConfig.SeperateTLBusRanges.foreach { ranges =>
96 newConfig = newConfig.alter((site, here, up) => {
97 case SoCParamsKey => up(SoCParamsKey).copy(SeperateTLBusRanges = ranges)
98 })
99 }
45)
46
47object YamlParser {
48 implicit val customParserConfig: Configuration = Configuration.default.withDefaults
49 def parseYaml(config: Parameters, yamlFile: String): Parameters = {
50 val yaml = scala.io.Source.fromFile(yamlFile).mkString
51 val json = io.circe.yaml.parser.parse(yaml) match {
52 case Left(value) => throw value

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96 case SoCParamsKey => up(SoCParamsKey).copy(SeperateTLBus = enable)
97 })
98 }
99 yamlConfig.SeperateTLBusRanges.foreach { ranges =>
100 newConfig = newConfig.alter((site, here, up) => {
101 case SoCParamsKey => up(SoCParamsKey).copy(SeperateTLBusRanges = ranges)
102 })
103 }
104 yamlConfig.IMSICBusType.foreach { busType =>
105 newConfig = newConfig.alter((site, here, up) => {
106 case SoCParamsKey => up(SoCParamsKey).copy(IMSICBusType = device.IMSICBusType.withName(busType))
107 })
108 }
109 yamlConfig.IMSICParams.foreach { params =>
110 newConfig = newConfig.alter((site, here, up) => {
111 case SoCParamsKey => up(SoCParamsKey).copy(IMSICParams = params)
112 })
113 }
100 newConfig
101 }
102}
114 newConfig
115 }
116}