| #
f8d0b107 |
| 07-Aug-2024 |
Jiuyue Ma <[email protected]> |
AXIFlash: Return correct data for requests not aligned on beatBytes (#3351)
Signed-off-by: Jiuyue Ma <[email protected]>
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| #
fad48058 |
| 24-Dec-2023 |
Yinan Xu <[email protected]> |
Bump difftest (#2579)
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| #
8891a219 |
| 08-Oct-2023 |
Yinan Xu <[email protected]> |
Bump rocket-chip (#2353)
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| #
935edac4 |
| 21-Sep-2023 |
Tang Haojin <[email protected]> |
chore: remove deprecated brackets, APIs, etc. (#2321)
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| #
3c02ee8f |
| 25-Dec-2022 |
wakafa <[email protected]> |
Separate Utility submodule from XiangShan (#1861)
* misc: add utility submodule
* misc: adjust to new utility framework
* bump utility: revert resetgen
* bump huancun
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| #
9aca92b9 |
| 28-Sep-2021 |
Yinan Xu <[email protected]> |
misc: code clean up (#1073)
* rename Roq to Rob
* remove trailing whitespaces
* remove unused parameters
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| #
510ae4ee |
| 03-Sep-2021 |
Jiuyang Liu <[email protected]> |
use ExtModule instead of Chisel3.BlackBox. (#988)
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| #
c21bff99 |
| 30-Aug-2021 |
Jiawei Lin <[email protected]> |
Bump chisel to 3.5 (#974)
* bump chisel to 3.5
* Remove deprecated 'toBool' && disable tl monitor
* Update RocketChip / Re-enable TLMonitor
* Makefile: remove '--infer-rw'
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| #
f320e0f0 |
| 24-Jul-2021 |
Yinan Xu <[email protected]> |
misc: update PCL information (#899)
XiangShan is jointly released by ICT and PCL.
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| #
c6d43980 |
| 04-Jun-2021 |
Lemover <[email protected]> |
Add MulanPSL-2.0 License (#824)
In this commit, we add License for XiangShan project.
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| #
4c494e36 |
| 31-Mar-2021 |
Jay <[email protected]> |
Use blackbox to rebuild AXI-flash (#726)
* AXIFlash: use blackbox to rebuild flash
* device.cpp: add init_flash
* Add flash.cpp for DPI-C funtion
* Flash: use USE_BIN to enable FI from flas
Use blackbox to rebuild AXI-flash (#726)
* AXIFlash: use blackbox to rebuild flash
* device.cpp: add init_flash
* Add flash.cpp for DPI-C funtion
* Flash: use USE_BIN to enable FI from flash
* AXIFlash: delete original flash
show more ...
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| #
9ec86df5 |
| 18-Jan-2021 |
jinyue110 <[email protected]> |
AXIFLash.scala: support 64 bits resp
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| #
a2e9bde6 |
| 10-Nov-2020 |
Allen <[email protected]> |
AXI4SlaveModule: use Seq[AddressSet] instead of AddressSet
to allow more flexible address range configuration.
With only one AddressSet, we can not even represent
very simple address ranges like [2G,
AXI4SlaveModule: use Seq[AddressSet] instead of AddressSet
to allow more flexible address range configuration.
With only one AddressSet, we can not even represent
very simple address ranges like [2G, 32G).
show more ...
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| #
efc6a777 |
| 17-Aug-2020 |
linjiawei <[email protected]> |
Fix axi device bug
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| #
956d83c0 |
| 16-Aug-2020 |
linjiawei <[email protected]> |
Rewrite AXI4 DummySD,Flash,Keyboard,UART
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| #
bfa9f4f2 |
| 09-Dec-2019 |
Zihao Yu <[email protected]> |
device,AXI4Flash: fix 64-bit instruction fetch
* IFU will send 64-bit fetch requests. Originally flash will only
response with rdata = 0x00000000????????. For instrucitons aligned at
4-byte addr
device,AXI4Flash: fix 64-bit instruction fetch
* IFU will send 64-bit fetch requests. Originally flash will only
response with rdata = 0x00000000????????. For instrucitons aligned at
4-byte address, IDU will select 0x00000000 as the target instruction.
* To fix this, we let flash reponse with 2 copies.
* Note that RVC instruction stream like 0xccbbbbbbbbaa in flash can not
be handled correctly. The current solution only support non-RVC code
in flash.
show more ...
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| #
b4cc98d2 |
| 09-Dec-2019 |
Zihao Yu <[email protected]> |
device: add flash to jump to dram
|