History log of /XiangShan/src/main/scala/device/standalone/StandAloneDebugModule.scala (Results 1 – 12 of 12)
Revision Date Author Comments
# 36e010ab 14-Mar-2025 Guanghui Cheng <[email protected]>

fix(DM): synchronize the `jtag_reset` in standaloneDM (#4414)


# 76ed5703 04-Dec-2024 chengguanghui <[email protected]>

fix(DM, SBA): add `TLWidthWidget` for sysbus


# 20957846 10-Jan-2025 Zihao Yu <[email protected]>

fix(device, DebugMoudle): do not use clock with Bool type (#4152)

* gsim can not handle such clocks


# 3a520554 10-Jan-2025 Tang Haojin <[email protected]>

style(DebugModule): remove unnecessary `XSDebugModuleParams` (#4155)

It is more straight-forward to use `DebugModuleParams` in `Config.scala`.


# 3a3744e4 06-Jan-2025 chengguanghui <[email protected]>

feat(DM, hartReset): support `hartReset` which could reset selected harts

* Add hartResetReq in XSNocTop.
* Support `hartReset` features


# 4adf8eb8 20-Nov-2024 Tang Haojin <[email protected]>

fix(DM): enlarge master node addr width for standalone DM (#3896)


# 7ff4ebdc 19-Sep-2024 Tang Haojin <[email protected]>

feat(Synchronizer): use unified AsyncResetSynchronizerShiftReg (#3609)


# aef22314 19-Sep-2024 Tang Haojin <[email protected]>

fix(StandAloneDebugModule): use baseAddr from cmdline (#3608)


# 30e7906f 12-Sep-2024 Haojin Tang <[email protected]>

fix(Device): use async reset for standalone devices


# b6ace320 01-Sep-2024 Tang Haojin <[email protected]>

fix(DM): remove implicit clock and reset (#3452)


# 2f9ea954 06-Aug-2024 Tang Haojin <[email protected]>

XSNoCTop, StandAloneDevice: add async signal handling (#3321)


# 720dd621 04-Jul-2024 Tang Haojin <[email protected]>

top: implement XSNoCTop and standalone devices (#3136)