History log of /XiangShan/src/main/scala/xiangshan/backend/CtrlBlock.scala (Results 276 – 300 of 328)
Revision Date Author Comments
# fc4776e4 22-Jan-2021 LinJiawei <[email protected]>

[WIP] connect leftOne and ftq enq ptr


# 148ba860 22-Jan-2021 LinJiawei <[email protected]>

[WIP] fix cifIndex update logic


# cde9280d 22-Jan-2021 LinJiawei <[email protected]>

[WIP] update alu/jump unit


# faf3cfa9 22-Jan-2021 LinJiawei <[email protected]>

[WIP] fix ftq update logic


# 36d7aed5 21-Jan-2021 LinJiawei <[email protected]>

FTQ: impl ftq


# 03380706 21-Jan-2021 LinJiawei <[email protected]>

[WIP] fix target in brupdate


# c778d2af 21-Jan-2021 LinJiawei <[email protected]>

[WIP] update frontend interface


# f606cf17 20-Jan-2021 LinJiawei <[email protected]>

[WIP] remove brq form backend


# 884dbb3b 20-Jan-2021 LinJiawei <[email protected]>

[WIP] connect Ftq into ctrl block


# 8af95560 15-Jan-2021 Yinan Xu <[email protected]>

busyTable: update read io


# 8926ac22 15-Jan-2021 LinJiawei <[email protected]>

Jump: read pc from brq


# 2b6c0fd6 12-Jan-2021 YikeZhou <[email protected]>

Merge branch 'master' into rs-no-enqData


# 82f87dff 09-Jan-2021 YikeZhou <[email protected]>

Dispatch: shrink readPortIndex width
from 8/12 to 4


# 2dcdc8fb 08-Jan-2021 Yinan Xu <[email protected]>

Merge remote-tracking branch 'origin/master' into opt-dispatch


# 76e1d2a4 08-Jan-2021 YikeZhou <[email protected]>

ReservationStationData: remove enqData signal


# d6d624cd 08-Jan-2021 YikeZhou <[email protected]>

Merge branch 'master' into rs-no-enqData


# 2be37cbb 08-Jan-2021 ljw <[email protected]>

Merge pull request #381 from RISCVERS/opt-brq

brq: add needAlloc to optimize timing


# 9916fbd7 07-Jan-2021 YikeZhou <[email protected]>

Connect IntRf+FpRf to ReservationStationData


# ebd10a1f 07-Jan-2021 Yinan Xu <[email protected]>

regfile: fix data width for int regfile


# ec6b09ff 07-Jan-2021 Yinan Xu <[email protected]>

brq: add needAlloc to optimize timing


# 1e2ad30c 07-Jan-2021 Yinan Xu <[email protected]>

busytable: don't use writeback ldest to update busytable


# af2ca063 22-Dec-2020 Yinan Xu <[email protected]>

brq: optimize states


# edf53867 22-Dec-2020 Yinan Xu <[email protected]>

roq: use redirect for input and redirectOut for output


# bfb958a3 21-Dec-2020 Yinan Xu <[email protected]>

redirect: add redirect level to optimize redirect generation


# 5d88c099 20-Dec-2020 Yinan Xu <[email protected]>

Merge pull request #333 from RISCVERS/opt-dpq

dispatch: timing optimizations


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