| #
8882eb68 |
| 21-Feb-2025 |
Xin Tian <[email protected]> |
feat(bitmap/memenc): support memory isolation by bitmap checking and memory encrpty used SM4-XTS (#3980)
- Add bitmap module in MMU for memory isolation
- Add memory encryption module based on AXI p
feat(bitmap/memenc): support memory isolation by bitmap checking and memory encrpty used SM4-XTS (#3980)
- Add bitmap module in MMU for memory isolation
- Add memory encryption module based on AXI protoco
- Can don't using these modules by setting the option `HasMEMencryption`
& `HasBitmapCheck` to false
show more ...
|
| #
189833a1 |
| 05-Dec-2024 |
Haoyuan Feng <[email protected]> |
feat(pointer masking): support Ssnpm & Smnpm & Smmpm (#3921)
feat(pointer masking): support Ssnpm & Smnpm & Smmpm
|
| #
cb36ac0f |
| 20-Sep-2024 |
Xuan Hu <[email protected]> |
fix(CSR): Add legalization code for mstatus.MPP, mnstatus.MNPP and dcsr.PRV (#3577)
|
| #
e9f7c490 |
| 14-Sep-2024 |
Xuan Hu <[email protected]> |
feat(Zicbom,Zicboz): add permission check and convert CBO.INVAL to CBO.FLUSH when CBIE=0b01 (#3559)
* CSR
* When reset, xenvcfg.CBZE = 1, xenvcfg.CBCFE = 1, xenvcfg.CBIE = 0b11,
while x in {m, s,
feat(Zicbom,Zicboz): add permission check and convert CBO.INVAL to CBO.FLUSH when CBIE=0b01 (#3559)
* CSR
* When reset, xenvcfg.CBZE = 1, xenvcfg.CBCFE = 1, xenvcfg.CBIE = 0b11,
while x in {m, s, h}.
* Support xenvcfg.CBIE = Flush(0b01)
* Decode
* Use the illegalInst and virtualInst conditions from CSR to assert
EX_II or EX_VI.
* Convert CBO.INVAL to CBO.FLUSH when envcfg.CBIE === EnvCBIE.Flush.
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|
| #
3ea4388c |
| 20-Aug-2024 |
Haoyuan Feng <[email protected]> |
RVA23: Support Sv48 & Sv48x4 (#3406)
Co-authored-by: Xuan Hu <[email protected]>
|
| #
e3da8bad |
| 22-Jul-2024 |
Tang Haojin <[email protected]> |
build: purge chisel 3 and add deprecation check (#3250)
|
| #
d0b87b97 |
| 03-Jun-2024 |
Xuan Hu <[email protected]> |
NewCSR: use runtime reflect to call CSRFieldXXBits instead of compile reflect
|
| #
01cdded8 |
| 22-Apr-2024 |
Xuan Hu <[email protected]> |
NewCSR: fix unprivileged CSRs and permission check
* Add commit vstart
* Fix commit connection
* Fix permission check
* Fix mstatus.VS/FS initial with off
* Add fp/vec.off bundle to decode
* Flush w
NewCSR: fix unprivileged CSRs and permission check
* Add commit vstart
* Fix commit connection
* Fix permission check
* Fix mstatus.VS/FS initial with off
* Add fp/vec.off bundle to decode
* Flush when change vxrm
* Add more skip condition for mip and hip
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|
| #
25dc4a82 |
| 22-Apr-2024 |
Xuan Hu <[email protected]> |
NewCSR: add reset in CSR apply method
|
| #
82a47911 |
| 20-Apr-2024 |
Xuan Hu <[email protected]> |
NewCSR: fix legal condition of SATP and HGATP
|
| #
94c2cc17 |
| 18-Apr-2024 |
sinceforYy <[email protected]> |
NewCSR: fix tlb IO bundle
|
| #
436f48cc |
| 13-Apr-2024 |
Xuan Hu <[email protected]> |
NewCSR: refactor to make IDEA happy
* IDEA always cannot recognize CSRRWApply trait, I don't know why
|
| #
237d4cfd |
| 07-Apr-2024 |
Xuan Hu <[email protected]> |
NewCSR: add CSR events
|
| #
039cdc35 |
| 08-Mar-2024 |
Xuan Hu <[email protected]> |
NewCSR: modulized implementation
NewCSR: add Hypervisor CSRs
NewCSR: optimize dump fields using chisel3.reflect.DataMirror
NewCSR: add VirtualSupervisor CSRs
NewCSR: refactor VirtualSupervisor an
NewCSR: modulized implementation
NewCSR: add Hypervisor CSRs
NewCSR: optimize dump fields using chisel3.reflect.DataMirror
NewCSR: add VirtualSupervisor CSRs
NewCSR: refactor VirtualSupervisor and Hypervisor CSRs
* Make sure ValidIO etc function return CSREnumType not EnumType
* TODO: AIA for vs
NewCSR: add MachineLevel CSRs
NewCSR: fix alias relationship between hip, hvip and vsip
NewCSR: add SupervisorLevel CSRs
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|