fix(CSR): remove reg in `scountovf`.

feat(Ss/Smdbltrp) : Support RISC-V Ss/Smdbltrp Extension (#3789)

* NEMU commit: 066cb1f1c61feb21153399c26ca393dfb3a560d7
* NEMU configs:
* riscv64-xs-ref_defconfig
* riscv64-dual-xs-ref_defco

feat(Ss/Smdbltrp) : Support RISC-V Ss/Smdbltrp Extension (#3789)

* NEMU commit: 066cb1f1c61feb21153399c26ca393dfb3a560d7
* NEMU configs:
* riscv64-xs-ref_defconfig
* riscv64-dual-xs-ref_defconfig

Including:
* fix(format): adjust code format and add one config (OpenXiangShan/NEMU#603)
* fix(vfredusum): set xstatus.fs and xstatus.vs dirty (OpenXiangShan/NEMU#605)
* fix(vf): do not set dirtyFs for some instructions (OpenXiangShan/NEMU#606)
* feat(trigger): add trigger support for rva.
* configs(xs): open Sm/sdbltrp extension and add MDT_INIT config (OpenXiangShan/NEMU#604)

---

* spike commit: c0b18d3913d8ceac83743a053a7dbd2fb8716c83
* spike config: CPU=XIANGSHAN

Including:
* fix(rva, trigger): For rva instr, raise BP from trigger prior to misaligned.
* fix(Makefile): Increase maxdepth for finding .h files.
* fix(tdata1): CPU_XIANGSHAN do not implement hit bit in tdata1.
* fix(icount): place the read before the return of the detect_icount_match.

show more ...

ROB: clear flushPipe when the enq uop has exception (#3281)

NewCSR: set legal init value to WARL Field

Support smstateen/ssstateen extension, add stateen0 CSRs

NewCSR: fix atp CSRs PPN mask

* The writable length of satp is `PAddrBits - PageOffsetWidth`.
* The writable length of vsatp varies with hgatp.MODE.
* When hgatp.MODE is `Bare`, it's `PAddrBits -

NewCSR: fix atp CSRs PPN mask

* The writable length of satp is `PAddrBits - PageOffsetWidth`.
* The writable length of vsatp varies with hgatp.MODE.
* When hgatp.MODE is `Bare`, it's `PAddrBits - PageOffsetWidth`.
* When hgatp.MODE is `Sv39x4`, it's `41 - PageOffsetWidth`.
* The writable length of hgatp is `PAddrBits - PageOffsetWidth`. Since the root page table is 16 KiB and must be aligned to a 16-KiB boundary, the lowest two bits of the physical page number (PPN) in hgatp always read as zeros.
* A write to hgatp with an unsupported MODE value is not ignored as it is for satp.
* Instead, the fields of hgatp are WARL in the normal way, when so indicated.

show more ...

NewCSR: fixed read access to scountovf in Mmode

NewCSR: support Sscopfpmf

NewCSR: Add CSR scountovf

NewCSR: make M and VS level interrupt bits in sip/sie/vsie/vsip read-only 0

NewCSR: fix rdata when VS mode access VS CSRs by address of S mode

NewCSR: use rocketchip's CSR addr

NewCSR: support AIA extension Interrupt Pending and Enable

NewCSR: support Sstc extension

* Add `stimecmp` and `vstimecmp` CSR.
* Add `STIP` and `VSTIP` interrupt.
* Add `STCE` field in `menvcfg` and `henvcfg` to enable Sstc extension.

NewCSR: fix rdataFields and Initialize CSR

* fix mtopi,stopi,vstopi regOut
* fix rdataFields :|= regOut
* fix pmpcfg regOut
* Initialze hie, hip, hedeleg, hideleg
* use regOut when field as alias

NewCSR: fix SupervisorLevel CSR

* Initialize sie, sip to 0

NewCSR: change the type of rdata to UInt in CSRModule

* Since the rdata bundle is used to get CSR read value, we change the type of rdata to UInt(64.W) and do all needed expansions before the value

NewCSR: change the type of rdata to UInt in CSRModule

* Since the rdata bundle is used to get CSR read value, we change the type of rdata to UInt(64.W) and do all needed expansions before the value assigned to rdata bundles.

show more ...

NewCSR: the regOut of sie should be directly connected to mie.

* There are no regs in CSR sie.

NewCSR: limit the width of [s|vs|hg]atp.PPN to the width of PAddr minus the width of PageOffset

NewCSR: make satp, vsatp and hgatp unchanged when write with illegal MODE

NewCSR: refactor to make better verilog generation

NewCSR: add fu wrapper

NewCSR: add CSR events

NewCSR: modulized implementation

NewCSR: add Hypervisor CSRs

NewCSR: optimize dump fields using chisel3.reflect.DataMirror

NewCSR: add VirtualSupervisor CSRs

NewCSR: refactor VirtualSupervisor an

NewCSR: modulized implementation

NewCSR: add Hypervisor CSRs

NewCSR: optimize dump fields using chisel3.reflect.DataMirror

NewCSR: add VirtualSupervisor CSRs

NewCSR: refactor VirtualSupervisor and Hypervisor CSRs

* Make sure ValidIO etc function return CSREnumType not EnumType
* TODO: AIA for vs

NewCSR: add MachineLevel CSRs

NewCSR: fix alias relationship between hip, hvip and vsip

NewCSR: add SupervisorLevel CSRs

show more ...