| /aosp_15_r20/external/llvm/include/llvm/Target/ |
| H A D | TargetInstrInfo.h | 690 unsigned TrueReg, unsigned FalseReg, in canInsertSelect()
714 unsigned TrueReg, unsigned FalseReg) const { in insertSelect()
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| /aosp_15_r20/external/swiftshader/third_party/llvm-10.0/llvm/include/llvm/CodeGen/ |
| H A D | TargetInstrInfo.h | 848 unsigned FalseReg, int &CondCycles, in canInsertSelect()
871 unsigned TrueReg, unsigned FalseReg) const { in insertSelect()
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| /aosp_15_r20/external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/PowerPC/ |
| H A D | PPCInstrInfo.cpp | 757 unsigned TrueReg, unsigned FalseReg, in canInsertSelect()
2224 unsigned TrueReg, unsigned FalseReg, in selectReg()
2816 Register FalseReg = CompareUseMI.getOperand(2).getReg(); in convertToImmediateForm() local
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| /aosp_15_r20/external/swiftshader/third_party/llvm-16.0/llvm/lib/Target/X86/ |
| H A D | X86CmovConversion.cpp | 728 Register FalseReg = in convertCmovInstsToBranches() local
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| /aosp_15_r20/external/swiftshader/third_party/llvm-16.0/llvm/include/llvm/CodeGen/ |
| H A D | TargetInstrInfo.h | 903 Register TrueReg, Register FalseReg, in canInsertSelect()
927 Register TrueReg, Register FalseReg) const { in insertSelect()
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| /aosp_15_r20/external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/Lanai/ |
| H A D | LanaiInstrInfo.cpp | 506 MachineOperand FalseReg = MI.getOperand(Invert ? 1 : 2); in optimizeSelect() local
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| /aosp_15_r20/external/llvm/lib/Target/Lanai/ |
| H A D | LanaiInstrInfo.cpp | 509 MachineOperand FalseReg = MI.getOperand(Invert ? 1 : 2); in optimizeSelect() local
|
| /aosp_15_r20/external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/X86/ |
| H A D | X86CmovConversion.cpp | 715 Register FalseReg = in convertCmovInstsToBranches() local
|
| /aosp_15_r20/external/swiftshader/third_party/llvm-16.0/llvm/lib/Target/Lanai/ |
| H A D | LanaiInstrInfo.cpp | 504 MachineOperand FalseReg = MI.getOperand(Invert ? 1 : 2); in optimizeSelect() local
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| /aosp_15_r20/prebuilts/clang/host/linux-x86/clang-r530567b/include/llvm/CodeGen/ |
| D | TargetInstrInfo.h | 910 Register TrueReg, Register FalseReg, in canInsertSelect()
934 Register TrueReg, Register FalseReg) const { in insertSelect()
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| /aosp_15_r20/prebuilts/clang/host/linux-x86/clang-r536225/include/llvm/CodeGen/ |
| D | TargetInstrInfo.h | 912 Register TrueReg, Register FalseReg, in canInsertSelect()
936 Register TrueReg, Register FalseReg) const { in insertSelect()
|
| /aosp_15_r20/prebuilts/clang/host/linux-x86/clang-r522817/include/llvm/CodeGen/ |
| D | TargetInstrInfo.h | 910 Register TrueReg, Register FalseReg, in canInsertSelect()
934 Register TrueReg, Register FalseReg) const { in insertSelect()
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| /aosp_15_r20/prebuilts/clang/host/linux-x86/clang-r530567/include/llvm/CodeGen/ |
| D | TargetInstrInfo.h | 910 Register TrueReg, Register FalseReg, in canInsertSelect()
934 Register TrueReg, Register FalseReg) const { in insertSelect()
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| /aosp_15_r20/external/swiftshader/third_party/llvm-16.0/llvm/lib/Target/PowerPC/ |
| H A D | PPCInstrInfo.cpp | 1531 Register FalseReg, int &CondCycles, in canInsertSelect()
3223 unsigned TrueReg, unsigned FalseReg, in selectReg()
4659 Register FalseReg = CompareUseMI.getOperand(2).getReg(); in simplifyToLI() local
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| /aosp_15_r20/external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/WebAssembly/ |
| H A D | WebAssemblyFastISel.cpp | 899 unsigned FalseReg = getRegForValue(Select->getFalseValue()); in selectSelect() local
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| H A D | WebAssemblyISelLowering.cpp | 387 unsigned Tmp0, Tmp1, CmpReg, EqzReg, FalseReg, TrueReg; in LowerFPToInt() local
|
| /aosp_15_r20/external/llvm/lib/Target/WebAssembly/ |
| H A D | WebAssemblyFastISel.cpp | 728 unsigned FalseReg = getRegForValue(Select->getFalseValue()); in selectSelect() local
|
| /aosp_15_r20/external/swiftshader/third_party/llvm-16.0/llvm/lib/Target/WebAssembly/ |
| H A D | WebAssemblyFastISel.cpp | 922 Register FalseReg = getRegForValue(Select->getFalseValue()); in selectSelect() local
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| /aosp_15_r20/external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/ARM/ |
| H A D | ARMInstructionSelector.cpp | 790 auto FalseReg = MIB->getOperand(3).getReg(); in selectSelect() local
|
| /aosp_15_r20/external/swiftshader/third_party/llvm-16.0/llvm/lib/Target/ARM/ |
| H A D | ARMInstructionSelector.cpp | 788 auto FalseReg = MIB.getReg(3); in selectSelect() local
|
| /aosp_15_r20/external/llvm/lib/Target/PowerPC/ |
| H A D | PPCInstrInfo.cpp | 687 unsigned TrueReg, unsigned FalseReg, in canInsertSelect()
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| /aosp_15_r20/external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/SystemZ/ |
| H A D | SystemZInstrInfo.cpp | 535 unsigned TrueReg, unsigned FalseReg, in canInsertSelect()
|
| /aosp_15_r20/external/swiftshader/third_party/llvm-16.0/llvm/lib/Target/SystemZ/ |
| H A D | SystemZInstrInfo.cpp | 540 Register FalseReg, int &CondCycles, in canInsertSelect()
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| /aosp_15_r20/external/llvm/lib/Target/AArch64/ |
| H A D | AArch64InstrInfo.cpp | 368 unsigned TrueReg, unsigned FalseReg, int &CondCycles, int &TrueCycles, in canInsertSelect()
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| /aosp_15_r20/external/swiftshader/third_party/llvm-16.0/llvm/lib/Target/RISCV/ |
| H A D | RISCVInstrInfo.cpp | 1146 MachineOperand FalseReg = MI.getOperand(Invert ? 5 : 4); in optimizeSelect() local
|