| /aosp_15_r20/external/llvm/lib/Target/ARM/ |
| H A D | ARMLoadStoreOptimizer.cpp | 2058 unsigned &SecondReg, in CanFormLdStDWord()
2217 unsigned FirstReg = 0, SecondReg = 0; in RescheduleOps() local
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| /aosp_15_r20/external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/ARM/ |
| H A D | ARMLoadStoreOptimizer.cpp | 2150 unsigned &SecondReg, in CanFormLdStDWord()
2316 unsigned FirstReg = 0, SecondReg = 0; in RescheduleOps() local
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| /aosp_15_r20/external/swiftshader/third_party/llvm-16.0/llvm/lib/Target/ARM/ |
| H A D | ARMLoadStoreOptimizer.cpp | 2258 Register &FirstReg, Register &SecondReg, Register &BaseReg, int &Offset, in CanFormLdStDWord()
2420 Register FirstReg, SecondReg; in RescheduleOps() local
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| /aosp_15_r20/external/llvm/lib/Target/PowerPC/ |
| H A D | PPCInstrInfo.cpp | 792 SecondReg = SwapOps ? TrueReg : FalseReg; in insertSelect() local
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| /aosp_15_r20/external/swiftshader/third_party/subzero/src/ |
| H A D | IceTargetLoweringMIPS32.cpp | 1897 const auto SecondReg = in legalizeMov() local
1969 const auto SecondReg = in legalizeMov() local
2056 const auto SecondReg = in legalizeMov() local
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| /aosp_15_r20/external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/Mips/AsmParser/ |
| H A D | MipsAsmParser.cpp | 4315 unsigned SecondReg = Inst.getOperand(1).getReg(); in expandTrunc() local
5175 unsigned SecondReg = nextReg(FirstReg); in expandLoadStoreDMacro() local
5222 unsigned SecondReg = nextReg(FirstReg); in expandStoreDM1Macro() local
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| /aosp_15_r20/external/swiftshader/third_party/llvm-16.0/llvm/lib/Target/Mips/AsmParser/ |
| H A D | MipsAsmParser.cpp | 4334 unsigned SecondReg = Inst.getOperand(1).getReg(); in expandTrunc() local
5276 unsigned SecondReg = nextReg(FirstReg); in expandLoadStoreDMacro() local
5323 unsigned SecondReg = nextReg(FirstReg); in expandStoreDM1Macro() local
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| /aosp_15_r20/external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/PowerPC/ |
| H A D | PPCInstrInfo.cpp | 856 SecondReg = SwapOps ? TrueReg : FalseReg; in insertSelect() local
|
| /aosp_15_r20/external/swiftshader/third_party/llvm-16.0/llvm/lib/Target/PowerPC/ |
| H A D | PPCInstrInfo.cpp | 1635 SecondReg = SwapOps ? TrueReg : FalseReg; in insertSelect() local
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| H A D | PPCISelLowering.cpp | 6791 const unsigned SecondReg = State.AllocateReg(PPC::R10); in CC_AIX() local
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| /aosp_15_r20/external/llvm/lib/Target/AArch64/AsmParser/ |
| H A D | AArch64AsmParser.cpp | 4651 int SecondReg = tryParseRegister(); in tryParseGPRSeqPair() local
|
| /aosp_15_r20/external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/AArch64/AsmParser/ |
| H A D | AArch64AsmParser.cpp | 5639 unsigned SecondReg; in tryParseGPRSeqPair() local
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| /aosp_15_r20/external/llvm/lib/Target/Mips/AsmParser/ |
| H A D | MipsAsmParser.cpp | 3140 unsigned SecondReg = Inst.getOperand(1).getReg(); in expandTrunc() local
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| /aosp_15_r20/external/swiftshader/third_party/llvm-16.0/llvm/lib/Target/AArch64/AsmParser/ |
| H A D | AArch64AsmParser.cpp | 7751 MCRegister SecondReg; in tryParseGPRSeqPair() local
|