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/aosp_15_r20/external/swiftshader/third_party/llvm-16.0/llvm/lib/CodeGen/
H A DIntrinsicLowering.cpp63 Value *Tmp1 = Builder.CreateShl(V, ConstantInt::get(V->getType(), 8), in LowerBSWAP() local
77 Value *Tmp1 = Builder.CreateLShr(V,ConstantInt::get(V->getType(), 24), in LowerBSWAP() local
107 Value* Tmp1 = Builder.CreateLShr(V, in LowerBSWAP() local
/aosp_15_r20/external/swiftshader/third_party/llvm-10.0/llvm/lib/CodeGen/
H A DIntrinsicLowering.cpp64 Value *Tmp1 = Builder.CreateShl(V, ConstantInt::get(V->getType(), 8), in LowerBSWAP() local
78 Value *Tmp1 = Builder.CreateLShr(V,ConstantInt::get(V->getType(), 24), in LowerBSWAP() local
108 Value* Tmp1 = Builder.CreateLShr(V, in LowerBSWAP() local
/aosp_15_r20/external/llvm/lib/CodeGen/
H A DIntrinsicLowering.cpp176 Value *Tmp1 = Builder.CreateShl(V, ConstantInt::get(V->getType(), 8), in LowerBSWAP() local
190 Value *Tmp1 = Builder.CreateLShr(V,ConstantInt::get(V->getType(), 24), in LowerBSWAP() local
220 Value* Tmp1 = Builder.CreateLShr(V, in LowerBSWAP() local
/aosp_15_r20/external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/X86/
H A DX86ISelDAGToDAG.cpp3609 SDValue Tmp0, Tmp1, Tmp2, Tmp3, Tmp4; in matchBEXTRFromAndImm() local
3645 SDValue Tmp0, Tmp1, Tmp2, Tmp3, Tmp4; in emitPCMPISTR() local
3678 SDValue Tmp0, Tmp1, Tmp2, Tmp3, Tmp4; in emitPCMPESTR() local
4226 SDValue Tmp0, Tmp1, Tmp2, Tmp3, Tmp4, Load; in tryVPTESTM() local
4668 SDValue Tmp0, Tmp1, Tmp2, Tmp3, Tmp4; in Select() local
4721 SDValue Tmp0, Tmp1, Tmp2, Tmp3, Tmp4; in Select() local
4803 SDValue Tmp0, Tmp1, Tmp2, Tmp3, Tmp4; in Select() local
4908 SDValue Tmp0, Tmp1, Tmp2, Tmp3, Tmp4; in Select() local
4916 SDValue Tmp0, Tmp1, Tmp2, Tmp3, Tmp4, Chain; in Select() local
5161 SDValue Tmp0, Tmp1, Tmp2, Tmp3, Tmp4; in Select() local
/aosp_15_r20/external/swiftshader/third_party/llvm-16.0/llvm/lib/Target/VE/
H A DVEISelLowering.cpp2033 Register Tmp1 = MRI.createVirtualRegister(RC); in prepareMBB() local
2097 Register Tmp1 = MRI.createVirtualRegister(RC); in prepareSymbol() local
2115 Register Tmp1 = MRI.createVirtualRegister(RC); in prepareSymbol() local
2140 Register Tmp1 = MRI.createVirtualRegister(RC); in prepareSymbol() local
2526 Register Tmp1 = MRI.createVirtualRegister(RC); in emitSjLjDispatchBlock() local
2571 Register Tmp1 = MRI.createVirtualRegister(RC); in emitSjLjDispatchBlock() local
2597 Register Tmp1 = MRI.createVirtualRegister(RC); in emitSjLjDispatchBlock() local
/aosp_15_r20/external/swiftshader/third_party/llvm-16.0/llvm/lib/Target/X86/
H A DX86ISelDAGToDAG.cpp3886 SDValue Tmp0, Tmp1, Tmp2, Tmp3, Tmp4; in matchBEXTRFromAndImm() local
3922 SDValue Tmp0, Tmp1, Tmp2, Tmp3, Tmp4; in emitPCMPISTR() local
3955 SDValue Tmp0, Tmp1, Tmp2, Tmp3, Tmp4; in emitPCMPESTR() local
4248 SDValue Tmp0, Tmp1, Tmp2, Tmp3, Tmp4; in matchVPTERNLOG() local
4634 SDValue Tmp0, Tmp1, Tmp2, Tmp3, Tmp4; in tryVPTESTM() local
5134 SDValue Tmp0, Tmp1, Tmp2, Tmp3, Tmp4; in Select() local
5187 SDValue Tmp0, Tmp1, Tmp2, Tmp3, Tmp4; in Select() local
5269 SDValue Tmp0, Tmp1, Tmp2, Tmp3, Tmp4; in Select() local
5403 SDValue Tmp0, Tmp1, Tmp2, Tmp3, Tmp4; in Select() local
5411 SDValue Tmp0, Tmp1, Tmp2, Tmp3, Tmp4, Chain; in Select() local
[all …]
/aosp_15_r20/external/llvm/lib/CodeGen/SelectionDAG/
H A DLegalizeDAG.cpp317 SDValue Tmp1 = Vec; in PerformInsertVectorEltInMemory() local
1521 SDValue Tmp1 = SDValue(Node, 0); in ExpandDYNAMIC_STACKALLOC() local
2419 SDValue Tmp1 = DAG.getNode(ISD::SINT_TO_FP, dl, DestVT, Op0); in ExpandLegalINT_TO_FP() local
2583 SDValue Tmp1, Tmp2, Tmp3, Tmp4, Tmp5, Tmp6, Tmp7, Tmp8; in ExpandBSWAP() local
2744 SDValue Tmp1, Tmp2, Tmp3, Tmp4; in ExpandNode() local
3742 SDValue Tmp1, Tmp2, Tmp3, Tmp4; in ConvertNodeToLibcall() local
4008 SDValue Tmp1, Tmp2, Tmp3; in PromoteNode() local
H A DLegalizeVectorOps.cpp361 if (SDValue Tmp1 = TLI.LowerOperation(Op, DAG)) { in LegalizeOp() local
/aosp_15_r20/external/llvm/lib/Transforms/Utils/
H A DIntegerDivision.cpp132 Value *Tmp1 = Builder.CreateAShr(Divisor, Shift); in generateSignedDivisionCode() local
256 Value *Tmp1 = Builder.CreateCall(CTLZ, {Dividend, True}); in generateUnsignedDivisionCode() local
/aosp_15_r20/external/swiftshader/third_party/llvm-16.0/llvm/lib/Transforms/Utils/
H A DIntegerDivision.cpp122 Value *Tmp1 = Builder.CreateAShr(Divisor, Shift); in generateSignedDivisionCode() local
235 Value *Tmp1 = Builder.CreateCall(CTLZ, {Dividend, True}); in generateUnsignedDivisionCode() local
/aosp_15_r20/external/swiftshader/third_party/llvm-10.0/llvm/lib/Transforms/Utils/
H A DIntegerDivision.cpp131 Value *Tmp1 = Builder.CreateAShr(Divisor, Shift); in generateSignedDivisionCode() local
255 Value *Tmp1 = Builder.CreateCall(CTLZ, {Dividend, True}); in generateUnsignedDivisionCode() local
/aosp_15_r20/external/swiftshader/third_party/llvm-10.0/llvm/lib/CodeGen/SelectionDAG/
H A DLegalizeDAG.cpp366 SDValue Tmp1 = Vec; in PerformInsertVectorEltInMemory() local
1591 SDValue Tmp1 = SDValue(Node, 0); in ExpandDYNAMIC_STACKALLOC() local
2425 SDValue Tmp1; in ExpandLegalINT_TO_FP() local
2667 SDValue Tmp1, Tmp2, Tmp3, Tmp4, Tmp5, Tmp6, Tmp7, Tmp8; in ExpandBSWAP() local
2719 SDValue Tmp1, Tmp2, Tmp3, Tmp4; in ExpandNode() local
4236 SDValue Tmp1, Tmp2, Tmp3; in PromoteNode() local
/aosp_15_r20/external/webrtc/modules/third_party/fft/
H A Dfft.h40 double Tmp1[FFT_MAXFFTSIZE]; member
/aosp_15_r20/external/swiftshader/third_party/llvm-16.0/llvm/lib/Target/NVPTX/
H A DNVPTXISelLowering.cpp2119 SDValue Tmp1 = DAG.getNode(ISD::SRL, dl, VT, ShOpLo, ShAmt); in LowerShiftRightParts() local
2179 SDValue Tmp1 = DAG.getNode(ISD::SHL, dl, VT, ShOpHi, ShAmt); in LowerShiftLeftParts() local
2342 SDValue Tmp1 = Node->getOperand(0); in LowerVAARG() local
2600 SDValue Tmp1 = ST->getChain(); in LowerSTOREi1() local
/aosp_15_r20/external/swiftshader/third_party/llvm-16.0/llvm/lib/CodeGen/SelectionDAG/
H A DLegalizeDAG.cpp365 SDValue Tmp1 = Vec; in PerformInsertVectorEltInMemory() local
1699 SDValue Tmp1 = SDValue(Node, 0); in ExpandDYNAMIC_STACKALLOC() local
2467 SDValue Tmp1; in ExpandLegalINT_TO_FP() local
2692 SDValue Tmp1, Tmp2, Tmp3, Tmp4; in ExpandNode() local
4501 SDValue Tmp1, Tmp2, Tmp3, Tmp4; in PromoteNode() local
/aosp_15_r20/external/llvm/lib/Target/X86/
H A DX86ISelDAGToDAG.cpp2211 SDValue Tmp0, Tmp1, Tmp2, Tmp3, Tmp4; in Select() local
2364 SDValue Tmp0, Tmp1, Tmp2, Tmp3, Tmp4; in Select() local
2372 SDValue Tmp0, Tmp1, Tmp2, Tmp3, Tmp4, Move, Chain; in Select() local
/aosp_15_r20/external/llvm/lib/Target/AMDGPU/
H A DAMDGPUISelLowering.cpp1484 SDValue Tmp1 = DAG.getNode(ISD::AND, DL, VT, Remainder_GE_Den, in LowerUDIVREM() local
1686 SDValue Tmp1 = DAG.getNode(ISD::SELECT, SL, MVT::i64, ExpLt0, SignBit64, Tmp0); in LowerFTRUNC() local
1704 SDValue Tmp1 = DAG.getNode(ISD::FADD, SL, MVT::f64, Src, CopySign); in LowerFRINT() local
1784 SDValue Tmp1 = DAG.getSetCC(SL, SetCCVT, in LowerFROUND64() local
H A DAMDGPUPromoteAlloca.cpp711 Value *Tmp1 = Builder.CreateMul(TIdY, TCntZ, "", true, true); in handleAlloca() local
/aosp_15_r20/external/pdfium/third_party/lcms/src/
H A Dcmsintrp.c870 cmsUInt16Number Tmp1[MAX_STAGE_CHANNELS], Tmp2[MAX_STAGE_CHANNELS]; in Eval4Inputs() local
1049 cmsFloat32Number Tmp1[MAX_STAGE_CHANNELS], Tmp2[MAX_STAGE_CHANNELS]; in Eval4InputsFloat() local
/aosp_15_r20/external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/NVPTX/
H A DNVPTXISelLowering.cpp2000 SDValue Tmp1 = DAG.getNode(ISD::SRL, dl, VT, ShOpLo, ShAmt); in LowerShiftRightParts() local
2060 SDValue Tmp1 = DAG.getNode(ISD::SHL, dl, VT, ShOpHi, ShAmt); in LowerShiftLeftParts() local
2415 SDValue Tmp1 = ST->getChain(); in LowerSTOREi1() local
/aosp_15_r20/external/llvm/lib/Target/NVPTX/
H A DNVPTXISelLowering.cpp1743 SDValue Tmp1 = DAG.getNode(ISD::SRL, dl, VT, ShOpLo, ShAmt); in LowerShiftRightParts() local
1805 SDValue Tmp1 = DAG.getNode(ISD::SHL, dl, VT, ShOpHi, ShAmt); in LowerShiftLeftParts() local
2015 SDValue Tmp1 = ST->getChain(); in LowerSTOREi1() local
/aosp_15_r20/external/llvm/lib/Target/PowerPC/
H A DPPCISelDAGToDAG.cpp555 SDValue Tmp1, Tmp2; in tryBitfieldInsert() local
3100 SDNode *Tmp1 = CurDAG->getMachineNode(Opc1, dl, VT, EltVal); in Select() local
3115 SDNode *Tmp1 = CurDAG->getMachineNode(Opc1, dl, VT, EltVal); in Select() local
/aosp_15_r20/external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/AMDGPU/
H A DAMDGPUPromoteAlloca.cpp817 Value *Tmp1 = Builder.CreateMul(TIdY, TCntZ, "", true, true); in handleAlloca() local
H A DAMDGPUISelLowering.cpp1920 SDValue Tmp1 = DAG.getNode(ISD::AND, DL, VT, Remainder_GE_Den, in LowerUDIVREM() local
2122 SDValue Tmp1 = DAG.getNode(ISD::SELECT, SL, MVT::i64, ExpLt0, SignBit64, Tmp0); in LowerFTRUNC() local
2140 SDValue Tmp1 = DAG.getNode(ISD::FADD, SL, MVT::f64, Src, CopySign); in LowerFRINT() local
2226 SDValue Tmp1 = DAG.getSetCC(SL, SetCCVT, in LowerFROUND64() local
H A DAMDGPULegalizerInfo.cpp1372 auto Tmp1 = B.buildFAdd(Ty, Src, CopySign); in legalizeFrint() local
1469 auto Tmp1 = B.buildSelect(S64, ExpLt0, SignBit64, Tmp0); in legalizeIntrinsicTrunc() local

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