Searched defs:uimm5 (Results 1 – 6 of 6) sorted by relevance
| /aosp_15_r20/prebuilts/clang/host/linux-x86/clang-r522817/lib/clang/18/include/ |
| D | larchintrin.h | 110 #define __cacop_w(/*uimm5*/ _1, /*unsigned int*/ _2, /*simm12*/ _3) \ argument
115 #define __cacop_d(/*uimm5*/ _1, /*unsigned long int*/ _2, /*simm12*/ _3) \ argument
|
| /aosp_15_r20/prebuilts/clang/host/linux-x86/clang-r536225/lib/clang/19/include/ |
| D | larchintrin.h | 110 #define __cacop_w(/*uimm5*/ _1, /*unsigned int*/ _2, /*simm12*/ _3) \ argument
115 #define __cacop_d(/*uimm5*/ _1, /*unsigned long int*/ _2, /*simm12*/ _3) \ argument
|
| /aosp_15_r20/prebuilts/clang-tools/linux-x86/lib64/clang/19/include/ |
| H A D | larchintrin.h | 110 #define __cacop_w(/*uimm5*/ _1, /*unsigned int*/ _2, /*simm12*/ _3) \ argument
115 #define __cacop_d(/*uimm5*/ _1, /*unsigned long int*/ _2, /*simm12*/ _3) \ argument
|
| /aosp_15_r20/prebuilts/clang/host/linux-x86/clang-r530567/lib/clang/19/include/ |
| D | larchintrin.h | 110 #define __cacop_w(/*uimm5*/ _1, /*unsigned int*/ _2, /*simm12*/ _3) \ argument
115 #define __cacop_d(/*uimm5*/ _1, /*unsigned long int*/ _2, /*simm12*/ _3) \ argument
|
| /aosp_15_r20/prebuilts/clang/host/linux-x86/clang-r530567b/lib/clang/19/include/ |
| D | larchintrin.h | 110 #define __cacop_w(/*uimm5*/ _1, /*unsigned int*/ _2, /*simm12*/ _3) \ argument
115 #define __cacop_d(/*uimm5*/ _1, /*unsigned long int*/ _2, /*simm12*/ _3) \ argument
|
| /aosp_15_r20/art/compiler/utils/riscv64/ |
| H A D | assembler_riscv64.cc | 866 void Riscv64Assembler::Csrrwi(XRegister rd, uint32_t csr, uint32_t uimm5) { in Csrrwi()
871 void Riscv64Assembler::Csrrsi(XRegister rd, uint32_t csr, uint32_t uimm5) { in Csrrsi()
876 void Riscv64Assembler::Csrrci(XRegister rd, uint32_t csr, uint32_t uimm5) { in Csrrci()
4027 void Riscv64Assembler::VRgather_vi(VRegister vd, VRegister vs2, uint32_t uimm5, VM vm) { in VRgather_vi()
4043 void Riscv64Assembler::VSlideup_vi(VRegister vd, VRegister vs2, uint32_t uimm5, VM vm) { in VSlideup_vi()
4068 void Riscv64Assembler::VSlidedown_vi(VRegister vd, VRegister vs2, uint32_t uimm5, VM vm) { in VSlidedown_vi()
4469 void Riscv64Assembler::VSll_vi(VRegister vd, VRegister vs2, uint32_t uimm5, VM vm) { in VSll_vi()
4538 void Riscv64Assembler::VSrl_vi(VRegister vd, VRegister vs2, uint32_t uimm5, VM vm) { in VSrl_vi()
4559 void Riscv64Assembler::VSra_vi(VRegister vd, VRegister vs2, uint32_t uimm5, VM vm) { in VSra_vi()
4580 void Riscv64Assembler::VSsrl_vi(VRegister vd, VRegister vs2, uint32_t uimm5, VM vm) { in VSsrl_vi()
[all …]
|