Searched full:sm6125 (Results 1 – 25 of 46) sorted by relevance
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| /linux-6.14.4/Documentation/devicetree/bindings/display/msm/ |
| D | qcom,sm6125-mdss.yaml | 4 $id: http://devicetree.org/schemas/display/msm/qcom,sm6125-mdss.yaml#
7 title: Qualcomm SM6125 Display MDSS
13 SM6125 MSM Mobile Display Subsystem (MDSS), which encapsulates sub-blocks
20 const: qcom,sm6125-mdss
54 const: qcom,sm6125-dpu
63 - const: qcom,sm6125-dsi-ctrl
72 const: qcom,sm6125-dsi-phy-14nm
78 #include <dt-bindings/clock/qcom,dispcc-sm6125.h>
79 #include <dt-bindings/clock/qcom,gcc-sm6125.h>
85 compatible = "qcom,sm6125-mdss";
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| D | qcom,sc7180-dpu.yaml | 18 - qcom,sm6125-dpu
69 - qcom,sm6125-dpu
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| D | dsi-phy-14nm.yaml | 22 - qcom,sm6125-dsi-phy-14nm
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| D | dsi-controller-main.yaml | 32 - qcom,sm6125-dsi-ctrl
331 - qcom,sm6125-dsi-ctrl
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| /linux-6.14.4/Documentation/devicetree/bindings/clock/ |
| D | qcom,gcc-sm6125.yaml | 4 $id: http://devicetree.org/schemas/clock/qcom,gcc-sm6125.yaml#
7 title: Qualcomm Global Clock & Reset Controller on SM6125
14 domains on SM6125.
16 See also:: include/dt-bindings/clock/qcom,gcc-sm6125.h
20 const: qcom,gcc-sm6125
47 compatible = "qcom,gcc-sm6125";
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| D | qcom,dispcc-sm6125.yaml | 4 $id: http://devicetree.org/schemas/clock/qcom,dispcc-sm6125.yaml#
7 title: Qualcomm Display Clock Controller on SM6125
14 on SM6125.
16 See also:: include/dt-bindings/clock/qcom,dispcc-sm6125.h
21 - qcom,sm6125-dispcc
77 #include <dt-bindings/clock/qcom,gcc-sm6125.h>
80 compatible = "qcom,sm6125-dispcc";
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| D | qcom,sm6125-gpucc.yaml | 4 $id: http://devicetree.org/schemas/clock/qcom,sm6125-gpucc.yaml#
7 title: Qualcomm Graphics Clock & Reset Controller on SM6125
16 See also:: include/dt-bindings/clock/qcom,sm6125-gpucc.h
21 - qcom,sm6125-gpucc
48 #include <dt-bindings/clock/qcom,gcc-sm6125.h>
56 compatible = "qcom,sm6125-gpucc";
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| D | qcom,rpmcc.yaml | 49 - qcom,rpmcc-sm6125
128 - qcom,rpmcc-sm6125
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| /linux-6.14.4/Documentation/devicetree/bindings/pinctrl/ |
| D | qcom,sm6125-tlmm.yaml | 4 $id: http://devicetree.org/schemas/pinctrl/qcom,sm6125-tlmm.yaml#
6 title: Qualcomm Technologies, Inc. SM6125 TLMM block
12 Top Level Mode Multiplexer pin controller in Qualcomm SM6125 SoC.
19 const: qcom,sm6125-tlmm
38 - $ref: "#/$defs/qcom-sm6125-tlmm-state"
41 $ref: "#/$defs/qcom-sm6125-tlmm-state"
45 qcom-sm6125-tlmm-state:
106 compatible = "qcom,sm6125-tlmm";
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| /linux-6.14.4/arch/arm64/boot/dts/qcom/ |
| D | sm6125.dtsi | 6 #include <dt-bindings/clock/qcom,dispcc-sm6125.h>
7 #include <dt-bindings/clock/qcom,gcc-sm6125.h>
163 compatible = "qcom,scm-sm6125", "qcom,scm";
185 compatible = "qcom,sm6125-rpm-proc", "qcom,rpm-proc";
195 compatible = "qcom,rpm-sm6125", "qcom,glink-smd-rpm";
199 compatible = "qcom,rpmcc-sm6125", "qcom,rpmcc";
206 compatible = "qcom,sm6125-rpmpd";
388 compatible = "qcom,sm6125-tlmm";
666 compatible = "qcom,gcc-sm6125";
712 compatible = "qcom,sm6125-sdhci", "qcom,sdhci-msm-v5";
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| D | sm6125-xiaomi-laurel-sprout.dts | 12 #include "sm6125.dtsi"
17 compatible = "xiaomi,laurel-sprout", "qcom,sm6125";
21 qcom,msm-id = <394 0>; /* sm6125 v1 */
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| D | sm6125-sony-xperia-seine-pdx201.dts | 8 #include "sm6125.dtsi"
16 qcom,msm-id = <394 0x10000>; /* sm6125 v1 */
20 compatible = "sony,pdx201", "qcom,sm6125";
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| /linux-6.14.4/drivers/clk/qcom/ |
| D | gpucc-sm6125.c | 13 #include <dt-bindings/clock/qcom,sm6125-gpucc.h>
389 { .compatible = "qcom,sm6125-gpucc" },
418 .name = "gpucc-sm6125",
424 MODULE_DESCRIPTION("QTI GPUCC SM6125 Driver");
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| D | Makefile | 130 obj-$(CONFIG_SM_DISPCC_6125) += dispcc-sm6125.o
140 obj-$(CONFIG_SM_GCC_6125) += gcc-sm6125.o
153 obj-$(CONFIG_SM_GPUCC_6125) += gpucc-sm6125.o
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| D | dispcc-sm6125.c | 11 #include <dt-bindings/clock/qcom,dispcc-sm6125.h>
670 { .compatible = "qcom,sm6125-dispcc" },
691 .name = "disp_cc-sm6125",
698 MODULE_DESCRIPTION("QTI DISPCC SM6125 Driver");
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| D | Kconfig | 983 tristate "SM6125 Display Clock Controller"
988 SM6125 devices.
1082 tristate "SM6125 Global Clock Controller"
1086 Support for the global clock controller on SM6125 devices.
1200 tristate "SM6125 Graphics Clock Controller"
1204 Support for the graphics clock controller on SM6125 devices.
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| /linux-6.14.4/Documentation/devicetree/bindings/phy/ |
| D | qcom,sc8280xp-qmp-ufs-phy.yaml | 37 - qcom,sm6125-qmp-ufs-phy
104 - qcom,sm6125-qmp-ufs-phy
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| /linux-6.14.4/Documentation/devicetree/bindings/usb/ |
| D | qcom,dwc3.yaml | 49 - qcom,sm6125-dwc3
351 - qcom,sm6125-dwc3
421 - qcom,sm6125-dwc3
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| /linux-6.14.4/Documentation/devicetree/bindings/ufs/ |
| D | qcom,ufs.yaml | 38 - qcom,sm6125-ufshc
249 - qcom,sm6125-ufshc
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| /linux-6.14.4/Documentation/devicetree/bindings/iommu/ |
| D | arm,smmu.yaml | 55 - qcom,sm6125-smmu-500
100 - qcom,sm6125-smmu-500
483 - qcom,sm6125-smmu-500
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| /linux-6.14.4/Documentation/devicetree/bindings/dma/ |
| D | qcom,gpi.yaml | 47 - qcom,sm6125-gpi-dma
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| /linux-6.14.4/drivers/pinctrl/qcom/ |
| D | Kconfig.msm | 343 tristate "Qualcomm Technologies Inc SM6125 pin controller driver"
348 Technologies Inc SM6125 platform.
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| D | Makefile | 55 obj-$(CONFIG_PINCTRL_SM6125) += pinctrl-sm6125.o
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| /linux-6.14.4/Documentation/devicetree/bindings/soc/qcom/ |
| D | qcom,smd-rpm.yaml | 61 - qcom,rpm-sm6125
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| /linux-6.14.4/Documentation/devicetree/bindings/power/ |
| D | qcom,rpmpd.yaml | 54 - qcom,sm6125-rpmpd
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