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/linux-6.14.4/Documentation/devicetree/bindings/clock/
Dqcom,gcc-msm8974.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/clock/qcom,gcc-msm8974.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Qualcomm Global Clock & Reset Controller on MSM8974 (including Pro) and MSM8226
11 - Stephen Boyd <[email protected]>
12 - Taniya Das <[email protected]>
16 domains on MSM8974 (all variants) and MSM8226.
19 include/dt-bindings/clock/qcom,gcc-msm8974.h (qcom,gcc-msm8226 and qcom,gcc-msm8974)
20 include/dt-bindings/reset/qcom,gcc-msm8974.h (qcom,gcc-msm8226 and qcom,gcc-msm8974)
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Dqcom,kpss-gcc.yaml1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
3 ---
4 $id: http://devicetree.org/schemas/clock/qcom,kpss-gcc.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Krait Processor Sub-system (KPSS) Global Clock Controller (GCC)
10 - Christian Marangi <[email protected]>
13 Krait Processor Sub-system (KPSS) Global Clock Controller (GCC). Used
15 to the kpss-gcc registers.
20 - enum:
21 - qcom,kpss-gcc-ipq8064
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Dqcom,gcc-msm8660.yaml1 # SPDX-License-Identifier: GPL-2.0-only
3 ---
4 $id: http://devicetree.org/schemas/clock/qcom,gcc-msm8660.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Stephen Boyd <[email protected]>
11 - Taniya Das <[email protected]>
18 include/dt-bindings/clock/qcom,gcc-msm8660.h
19 include/dt-bindings/reset/qcom,gcc-msm8660.h
22 - $ref: qcom,gcc.yaml#
27 - qcom,gcc-msm8660
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/linux-6.14.4/arch/arm/boot/dts/qcom/
Dqcom-msm8974.dtsi1 // SPDX-License-Identifier: GPL-2.0
2 /dts-v1/;
4 #include <dt-bindings/interconnect/qcom,msm8974.h>
5 #include <dt-bindings/interrupt-controller/arm-gic.h>
6 #include <dt-bindings/clock/qcom,gcc-msm8974.h>
7 #include <dt-bindings/clock/qcom,mmcc-msm8974.h>
8 #include <dt-bindings/clock/qcom,rpmcc.h>
9 #include <dt-bindings/reset/qcom,gcc-msm8974.h>
10 #include <dt-bindings/gpio/gpio.h>
13 #address-cells = <1>;
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Dqcom-msm8974pro.dtsi1 // SPDX-License-Identifier: GPL-2.0
2 #include "qcom-msm8974.dtsi"
4 &gcc {
5 compatible = "qcom,gcc-msm8974pro";
9 compatible = "qcom,adreno-330.2", "qcom,adreno";
13 clocks = <&gcc GCC_SDCC1_AHB_CLK>,
14 <&gcc GCC_SDCC1_APPS_CLK>,
16 <&gcc GCC_SDCC1_CDCCAL_FF_CLK>,
17 <&gcc GCC_SDCC1_CDCCAL_SLEEP_CLK>;
18 clock-names = "iface", "core", "xo", "cal", "sleep";
Dqcom-msm8226.dtsi1 // SPDX-License-Identifier: BSD-3-Clause
6 /dts-v1/;
8 #include <dt-bindings/interrupt-controller/arm-gic.h>
9 #include <dt-bindings/clock/qcom,gcc-msm8974.h>
10 #include <dt-bindings/clock/qcom,mmcc-msm8974.h>
11 #include <dt-bindings/clock/qcom,rpmcc.h>
12 #include <dt-bindings/gpio/gpio.h>
13 #include <dt-bindings/power/qcom-rpmpd.h>
14 #include <dt-bindings/reset/qcom,gcc-msm8974.h>
15 #include <dt-bindings/thermal/thermal.h>
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Dqcom-apq8084.dtsi1 // SPDX-License-Identifier: GPL-2.0
2 /dts-v1/;
4 #include <dt-bindings/interrupt-controller/arm-gic.h>
5 #include <dt-bindings/clock/qcom,gcc-apq8084.h>
6 #include <dt-bindings/gpio/gpio.h>
9 #address-cells = <1>;
10 #size-cells = <1>;
13 interrupt-parent = <&intc>;
15 reserved-memory {
16 #address-cells = <1>;
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Dqcom-msm8974pro-oneplus-bacon.dts1 // SPDX-License-Identifier: GPL-2.0
2 #include "qcom-msm8974pro.dtsi"
5 #include <dt-bindings/input/input.h>
6 #include <dt-bindings/pinctrl/qcom,pmic-gpio.h>
10 compatible = "oneplus,bacon", "qcom,msm8974pro", "qcom,msm8974";
11 chassis-type = "handset";
12 qcom,msm-id = <194 0x10000>;
13 qcom,board-id = <8 0>;
20 stdout-path = "serial0:115200n8";
23 gpio-keys {
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/linux-6.14.4/Documentation/devicetree/bindings/phy/
Dqcom,usb-hsic-phy.yaml1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/phy/qcom,usb-hsic-phy.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Bjorn Andersson <[email protected]>
11 - Vinod Koul <[email protected]>
16 - enum:
17 - qcom,usb-hsic-phy-mdm9615
18 - qcom,usb-hsic-phy-msm8974
19 - const: qcom,usb-hsic-phy
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Dqcom,usb-hs-phy.yaml1 # SPDX-License-Identifier: GPL-2.0-only
3 ---
4 $id: http://devicetree.org/schemas/phy/qcom,usb-hs-phy.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Bjorn Andersson <[email protected]>
17 - qcom,usb-hs-phy-apq8064
18 - qcom,usb-hs-phy-msm8660
19 - qcom,usb-hs-phy-msm8960
25 reset-names:
34 reset-names:
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/linux-6.14.4/Documentation/devicetree/bindings/firmware/
Dqcom,scm.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
16 - Bjorn Andersson <[email protected]>
17 - Robert Marko <[email protected]>
18 - Guru Das Srinagesh <[email protected]>
23 - enum:
24 - qcom,scm-apq8064
25 - qcom,scm-apq8084
26 - qcom,scm-ipq4019
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/linux-6.14.4/Documentation/devicetree/bindings/display/msm/
Dqcom,mdp5.yaml1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 MDP5 display controller found in SoCs like MSM8974, APQ8084, MSM8916, MSM8994
14 - Dmitry Baryshkov <[email protected]>
15 - Rob Clark <[email protected]>
20 - const: qcom,mdp5
22 - items:
23 - enum:
24 - qcom,apq8084-mdp5
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Dgpu.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
6 $schema: http://devicetree.org/meta-schemas/core.yaml#
11 - Rob Clark <[email protected]>
14 # as a work-around:
20 - qcom,adreno
21 - amd,imageon
23 - compatible
28 - description: |
30 figure out the chip-id.
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Ddsi-controller-main.yaml1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
3 ---
4 $id: http://devicetree.org/schemas/display/msm/dsi-controller-main.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Krishna Manikandan <[email protected]>
15 - items:
16 - enum:
17 - qcom,apq8064-dsi-ctrl
18 - qcom,msm8226-dsi-ctrl
19 - qcom,msm8916-dsi-ctrl
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/linux-6.14.4/Documentation/devicetree/bindings/remoteproc/
Dqcom,msm8916-mss-pil.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/remoteproc/qcom,msm8916-mss-pil.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Stephan Gerhold <[email protected]>
19 - enum:
20 - qcom,msm8909-mss-pil
21 - qcom,msm8916-mss-pil
22 - qcom,msm8953-mss-pil
23 - qcom,msm8974-mss-pil
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/linux-6.14.4/Documentation/devicetree/bindings/dma/
Dqcom,bam-dma.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/dma/qcom,bam-dma.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Andy Gross <[email protected]>
11 - Bjorn Andersson <[email protected]>
14 - $ref: dma-controller.yaml#
19 - enum:
21 - qcom,bam-v1.3.0
22 # MSM8974, APQ8074 and APQ8084
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/linux-6.14.4/drivers/clk/qcom/
DMakefile1 # SPDX-License-Identifier: GPL-2.0
2 obj-$(CONFIG_COMMON_CLK_QCOM) += clk-qcom.o
4 clk-qcom-y += common.o
5 clk-qcom-y += clk-regmap.o
6 clk-qcom-y += clk-alpha-pll.o
7 clk-qcom-y += clk-pll.o
8 clk-qcom-y += clk-rcg.o
9 clk-qcom-y += clk-rcg2.o
10 clk-qcom-y += clk-branch.o
11 clk-qcom-y += clk-regmap-divider.o
[all …]
DKconfig1 # SPDX-License-Identifier: GPL-2.0-only
152 platforms such as apq8016, apq8084, msm8974 etc.
206 CMN PLL consumes the AHB/SYS clocks from GCC and supplies
207 the output clocks to the networking hardware and GCC blocks.
387 tristate "MSM8974 Global Clock Controller"
391 Support for the global clock controller on msm8974 devices.
396 tristate "MSM8974 Multimedia Clock Controller"
401 Support for the multimedia clock controller on msm8974 devices.
1287 Say Y if you want to toggle LPASS-adjacent resets within
1386 tristate "High-Frequency PLL (HFPLL) Clock Controller"
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Dgcc-msm8974.c1 // SPDX-License-Identifier: GPL-2.0-only
13 #include <linux/clk-provider.h>
15 #include <linux/reset-controller.h>
17 #include <dt-bindings/clock/qcom,gcc-msm8974.h>
18 #include <dt-bindings/reset/qcom,gcc-msm8974.h>
21 #include "clk-regmap.h"
22 #include "clk-pll.h"
23 #include "clk-rcg.h"
24 #include "clk-branch.h"
2843 { .compatible = "qcom,gcc-msm8226", .data = &gcc_msm8226_desc },
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/linux-6.14.4/Documentation/devicetree/bindings/mailbox/
Dqcom,apcs-kpss-global.yaml1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/mailbox/qcom,apcs-kpss-global.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
14 - Jassi Brar <[email protected]>
19 - items:
20 - enum:
21 - qcom,ipq5018-apcs-apps-global
22 - qcom,ipq5332-apcs-apps-global
23 - qcom,ipq5424-apcs-apps-global
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/linux-6.14.4/Documentation/devicetree/bindings/nvmem/
Dqcom,qfprom.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Srinivas Kandagatla <[email protected]>
13 - $ref: nvmem.yaml#
14 - $ref: nvmem-deprecated-cells.yaml#
19 - enum:
20 - qcom,apq8064-qfprom
21 - qcom,apq8084-qfprom
22 - qcom,ipq5332-qfprom
[all …]
/linux-6.14.4/Documentation/devicetree/bindings/mmc/
Dsdhci-msm.yaml1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/mmc/sdhci-msm.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Qualcomm SDHCI controller (sdhci-msm)
10 - Bjorn Andersson <[email protected]>
11 - Konrad Dybcio <[email protected]>
20 - enum:
21 - qcom,sdhci-msm-v4
23 - items:
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/linux-6.14.4/arch/arm64/boot/dts/qcom/
Dmsm8994.dtsi1 // SPDX-License-Identifier: GPL-2.0-only
3 * Copyright (c) 2013-2016, The Linux Foundation. All rights reserved.
6 #include <dt-bindings/interrupt-controller/arm-gic.h>
7 #include <dt-bindings/clock/qcom,gcc-msm8994.h>
8 #include <dt-bindings/clock/qcom,mmcc-msm8994.h>
9 #include <dt-bindings/clock/qcom,rpmcc.h>
10 #include <dt-bindings/gpio/gpio.h>
11 #include <dt-bindings/power/qcom-rpmpd.h>
14 interrupt-parent = <&intc>;
16 #address-cells = <2>;
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/linux-6.14.4/drivers/thermal/qcom/
Dtsens.c1 // SPDX-License-Identifier: GPL-2.0
11 #include <linux/nvmem-consumer.h>
26 * struct tsens_irq_data - IRQ status and temperature violations
81 if (priv->num_sensors > MAX_SENSORS) in tsens_read_calibration()
82 return -EINVAL; in tsens_read_calibration()
88 ret = nvmem_cell_read_variable_le_u32(priv->dev, name, &mode); in tsens_read_calibration()
89 if (ret == -ENOENT) in tsens_read_calibration()
90 dev_warn(priv->dev, "Please migrate to separate nvmem cells for calibration data\n"); in tsens_read_calibration()
94 dev_dbg(priv->dev, "calibration mode is %d\n", mode); in tsens_read_calibration()
100 ret = nvmem_cell_read_variable_le_u32(priv->dev, name, &base1); in tsens_read_calibration()
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