Searched +full:gcc +full:- +full:msm8976 (Results 1 – 13 of 13) sorted by relevance
/linux-6.14.4/Documentation/devicetree/bindings/clock/ |
D | qcom,gcc-msm8976.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/clock/qcom,gcc-msm8976.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 7 title: Qualcomm Global Clock & Reset Controller on MSM8976 10 - Stephen Boyd <[email protected]> 11 - Taniya Das <[email protected]> 15 domains on MSM8976. 17 See also:: include/dt-bindings/clock/qcom,gcc-msm8976.h 22 - qcom,gcc-msm8976 [all …]
|
/linux-6.14.4/arch/arm64/boot/dts/qcom/ |
D | msm8976.dtsi | 1 // SPDX-License-Identifier: BSD-3-Clause 3 * Copyright (c) 2016-2022, AngeloGioacchino Del Regno 9 #include <dt-bindings/clock/qcom,gcc-msm8976.h> 10 #include <dt-bindings/clock/qcom,rpmcc.h> 11 #include <dt-bindings/gpio/gpio.h> 12 #include <dt-bindings/interrupt-controller/arm-gic.h> 13 #include <dt-bindings/interrupt-controller/irq.h> 14 #include <dt-bindings/power/qcom-rpmpd.h> 17 interrupt-parent = <&intc>; 18 #address-cells = <2>; [all …]
|
/linux-6.14.4/Documentation/devicetree/bindings/firmware/ |
D | qcom,scm.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 16 - Bjorn Andersson <[email protected]> 17 - Robert Marko <[email protected]> 18 - Guru Das Srinagesh <[email protected]> 23 - enum: 24 - qcom,scm-apq8064 25 - qcom,scm-apq8084 26 - qcom,scm-ipq4019 [all …]
|
/linux-6.14.4/Documentation/devicetree/bindings/display/msm/ |
D | qcom,mdp5.yaml | 1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause 3 --- 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 14 - Dmitry Baryshkov <[email protected]> 15 - Rob Clark <[email protected]> 20 - const: qcom,mdp5 22 - items: 23 - enum: 24 - qcom,apq8084-mdp5 25 - qcom,msm8226-mdp5 [all …]
|
D | dsi-controller-main.yaml | 1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause 3 --- 4 $id: http://devicetree.org/schemas/display/msm/dsi-controller-main.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Krishna Manikandan <[email protected]> 15 - items: 16 - enum: 17 - qcom,apq8064-dsi-ctrl 18 - qcom,msm8226-dsi-ctrl 19 - qcom,msm8916-dsi-ctrl [all …]
|
/linux-6.14.4/Documentation/devicetree/bindings/iommu/ |
D | qcom,iommu.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Konrad Dybcio <[email protected]> 13 Qualcomm "B" family devices which are not compatible with arm-smmu have 16 to non-secure vs secure interrupt line. 21 - items: 22 - enum: 23 - qcom,msm8916-iommu 24 - qcom,msm8917-iommu [all …]
|
/linux-6.14.4/Documentation/devicetree/bindings/nvmem/ |
D | qcom,qfprom.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Srinivas Kandagatla <[email protected]> 13 - $ref: nvmem.yaml# 14 - $ref: nvmem-deprecated-cells.yaml# 19 - enum: 20 - qcom,apq8064-qfprom 21 - qcom,apq8084-qfprom 22 - qcom,ipq5332-qfprom [all …]
|
/linux-6.14.4/Documentation/devicetree/bindings/mailbox/ |
D | qcom,apcs-kpss-global.yaml | 1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/mailbox/qcom,apcs-kpss-global.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 14 - Jassi Brar <[email protected]> 19 - items: 20 - enum: 21 - qcom,ipq5018-apcs-apps-global 22 - qcom,ipq5332-apcs-apps-global 23 - qcom,ipq5424-apcs-apps-global [all …]
|
/linux-6.14.4/drivers/clk/qcom/ |
D | Makefile | 1 # SPDX-License-Identifier: GPL-2.0 2 obj-$(CONFIG_COMMON_CLK_QCOM) += clk-qcom.o 4 clk-qcom-y += common.o 5 clk-qcom-y += clk-regmap.o 6 clk-qcom-y += clk-alpha-pll.o 7 clk-qcom-y += clk-pll.o 8 clk-qcom-y += clk-rcg.o 9 clk-qcom-y += clk-rcg2.o 10 clk-qcom-y += clk-branch.o 11 clk-qcom-y += clk-regmap-divider.o [all …]
|
D | gcc-msm8976.c | 1 // SPDX-License-Identifier: GPL-2.0 5 * Copyright (c) 2016-2021, AngeloGioacchino Del Regno 14 #include <linux/clk-provider.h> 22 #include <dt-bindings/clock/qcom,gcc-msm8976.h> 24 #include "clk-pll.h" 25 #include "clk-branch.h" 26 #include "clk-rcg.h" 4094 { .compatible = "qcom,gcc-msm8976" }, /* Also valid for 8x56 */ 4095 { .compatible = "qcom,gcc-msm8976-v1.1" }, 4105 if (of_device_is_compatible(pdev->dev.of_node, "qcom,gcc-msm8976-v1.1")) { in gcc_msm8976_probe() [all …]
|
/linux-6.14.4/Documentation/devicetree/bindings/mmc/ |
D | sdhci-msm.yaml | 1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/mmc/sdhci-msm.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 7 title: Qualcomm SDHCI controller (sdhci-msm) 10 - Bjorn Andersson <[email protected]> 11 - Konrad Dybcio <[email protected]> 20 - enum: 21 - qcom,sdhci-msm-v4 23 - items: [all …]
|
/linux-6.14.4/drivers/mailbox/ |
D | qcom-apcs-ipc-mailbox.c | 1 // SPDX-License-Identifier: GPL-2.0-only 33 .offset = 8, .clk_name = "qcom,apss-ipq6018-clk" 37 .offset = 8, .clk_name = "qcom-apcs-msm8916-clk" 45 .offset = 16, .clk_name = "qcom-apcs-msm8996-clk" 53 .offset = 0x1008, .clk_name = "qcom-sdx55-acps-clk" 66 struct qcom_apcs_ipc *apcs = container_of(chan->mbox, in qcom_apcs_ipc_send_data() 68 unsigned long idx = (unsigned long)chan->con_priv; in qcom_apcs_ipc_send_data() 70 return regmap_write(apcs->regmap, apcs->offset, BIT(idx)); in qcom_apcs_ipc_send_data() 86 apcs = devm_kzalloc(&pdev->dev, sizeof(*apcs), GFP_KERNEL); in qcom_apcs_ipc_probe() 88 return -ENOMEM; in qcom_apcs_ipc_probe() [all …]
|
/linux-6.14.4/drivers/thermal/qcom/ |
D | tsens.c | 1 // SPDX-License-Identifier: GPL-2.0 11 #include <linux/nvmem-consumer.h> 26 * struct tsens_irq_data - IRQ status and temperature violations 81 if (priv->num_sensors > MAX_SENSORS) in tsens_read_calibration() 82 return -EINVAL; in tsens_read_calibration() 88 ret = nvmem_cell_read_variable_le_u32(priv->dev, name, &mode); in tsens_read_calibration() 89 if (ret == -ENOENT) in tsens_read_calibration() 90 dev_warn(priv->dev, "Please migrate to separate nvmem cells for calibration data\n"); in tsens_read_calibration() 94 dev_dbg(priv->dev, "calibration mode is %d\n", mode); in tsens_read_calibration() 100 ret = nvmem_cell_read_variable_le_u32(priv->dev, name, &base1); in tsens_read_calibration() [all …]
|