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/linux-6.14.4/Documentation/devicetree/bindings/pci/
Dpci-msi.txt2 relationship between PCI devices and MSI controllers.
18 Requester ID. A mechanism is required to associate a device with both the MSI
22 For generic MSI bindings, see
23 Documentation/devicetree/bindings/interrupt-controller/msi.txt.
30 -------------------
32 - msi-map: Maps a Requester ID to an MSI controller and associated
33 msi-specifier data. The property is an arbitrary number of tuples of
34 (rid-base,msi-controller,msi-base,length), where:
36 * rid-base is a single cell describing the first RID matched by the entry.
38 * msi-controller is a single phandle to an MSI controller
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Dbrcm,iproc-pcie.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/pci/brcm,iproc-pcie.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Ray Jui <[email protected]>
11 - Scott Branden <[email protected]>
14 - $ref: /schemas/pci/pci-host-bridge.yaml#
19 - enum:
22 - brcm,iproc-pcie
23 # for the second generation of PAXB-based controllers, used in
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Dxlnx,nwl-pcie.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/pci/xlnx,nwl-pcie.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Thippeswamy Havalige <[email protected]>
13 - $ref: /schemas/pci/pci-host-bridge.yaml#
14 - $ref: /schemas/interrupt-controller/msi-controller.yaml#
18 const: xlnx,nwl-pcie-2.11
22 - description: PCIe bridge registers location.
23 - description: PCIe Controller registers location.
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Dxilinx-versal-cpm.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/pci/xilinx-versal-cpm.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Bharat Kumar Gogada <[email protected]>
13 - $ref: /schemas/pci/pci-host-bridge.yaml#
18 - xlnx,versal-cpm-host-1.00
19 - xlnx,versal-cpm5-host
20 - xlnx,versal-cpm5-host1
24 - description: CPM system level control and status registers.
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Daardvark-pci.txt8 - compatible: Should be "marvell,armada-3700-pcie"
9 - reg: range of registers for the PCIe controller
10 - interrupts: the interrupt line of the PCIe controller
11 - #address-cells: set to <3>
12 - #size-cells: set to <2>
13 - device_type: set to "pci"
14 - ranges: ranges for the PCI memory and I/O regions
15 - #interrupt-cells: set to <1>
16 - msi-controller: indicates that the PCIe controller can itself
17 handle MSI interrupts
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Dapple,pcie.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Mark Kettenis <[email protected]>
22 the standard "reset-gpios" and "max-link-speed" properties appear on
34 - enum:
35 - apple,t8103-pcie
36 - apple,t8112-pcie
37 - apple,t6000-pcie
38 - const: apple,pcie
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Dxgene-pci-msi.txt1 * AppliedMicro X-Gene v1 PCIe MSI controller
5 - compatible: should be "apm,xgene1-msi" to identify
6 X-Gene v1 PCIe MSI controller block.
7 - msi-controller: indicates that this is an X-Gene v1 PCIe MSI controller node
8 - reg: physical base address (0x79000000) and length (0x900000) for controller
9 registers. These registers include the MSI termination address and data
10 registers as well as the MSI interrupt status registers.
11 - reg-names: not required
12 - interrupts: A list of 16 interrupt outputs of the controller, starting from
14 - interrupt-names: not required
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Dbrcm,stb-pcie.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/pci/brcm,stb-pcie.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Jim Quinlan <[email protected]>
15 - enum:
16 - brcm,bcm2711-pcie # The Raspberry Pi 4
17 - brcm,bcm4908-pcie
18 - brcm,bcm7211-pcie # Broadcom STB version of RPi4
19 - brcm,bcm7216-pcie # Broadcom 7216 Arm
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Dplda,xpressrich3-axi-common.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/pci/plda,xpressrich3-axi-common.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Daire McNamara <[email protected]>
11 - Kevin Xie <[email protected]>
17 - $ref: /schemas/pci/pci-host-bridge.yaml#
24 reg-names:
26 - items:
27 - const: cfg
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Dmediatek-pcie-gen3.yaml1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/pci/mediatek-pcie-gen3.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Jianjun Wang <[email protected]>
16 This PCIe controller supports up to 256 MSI vectors, the MSI hardware
19 +-----+
21 +-----+
24 port->irq
26 +-+-+-+-+-+-+-+-+
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/linux-6.14.4/Documentation/devicetree/bindings/misc/
Dfsl,qoriq-mc.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/misc/fsl,qoriq-mc.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Frank Li <[email protected]>
13 The Freescale Management Complex (fsl-mc) is a hardware resource
15 network-oriented packet processing applications. After the fsl-mc
22 For an overview of the DPAA2 architecture and fsl-mc bus see:
26 same hardware "isolation context" and a 10-bit value called an ICID
31 between ICIDs and IOMMUs, so an iommu-map property is used to define
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/linux-6.14.4/drivers/pci/msi/
Dapi.c1 // SPDX-License-Identifier: GPL-2.0
3 * PCI MSI/MSI-X — Exported APIs for device drivers
5 * Copyright (C) 2003-2004 Intel
14 #include "msi.h"
17 * pci_enable_msi() - Enable MSI interrupt mode on device
20 * Legacy device driver API to enable MSI interrupts mode on device and
22 * Linux IRQ will be saved at @dev->irq. The driver must invoke
40 * pci_disable_msi() - Disable MSI interrupt mode on device
43 * Legacy device driver API to disable MSI interrupt mode on device,
45 * The PCI device Linux IRQ (@dev->irq) is restored to its default
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/linux-6.14.4/Documentation/devicetree/bindings/bus/
Dxlnx,versal-net-cdx.yaml1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/bus/xlnx,versal-net-cdx.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
15 on run-time.
18 and a unique device ID (for MSI) corresponding to a requestor ID
20 are used to configure SMMU and GIC-ITS respectively.
22 iommu-map property is used to define the set of stream ids
25 The MSI writes are accompanied by sideband data (Device ID).
26 The msi-map property is used to associate the devices with the
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/linux-6.14.4/drivers/pci/endpoint/
Dpci-epc-core.c1 // SPDX-License-Identifier: GPL-2.0
13 #include <linux/pci-epc.h>
14 #include <linux/pci-epf.h>
15 #include <linux/pci-ep-cfs.h>
36 * pci_epc_put() - release the PCI endpoint controller
46 module_put(epc->ops->owner); in pci_epc_put()
47 put_device(&epc->dev); in pci_epc_put()
52 * pci_epc_get() - get the PCI endpoint controller
60 int ret = -EINVAL; in pci_epc_get()
69 if (try_module_get(epc->ops->owner)) in pci_epc_get()
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/linux-6.14.4/drivers/net/ethernet/intel/ice/
Dice_irq.c1 // SPDX-License-Identifier: GPL-2.0
9 * ice_init_irq_tracker - initialize interrupt tracker
18 pf->irq_tracker.num_entries = max_vectors; in ice_init_irq_tracker()
19 pf->irq_tracker.num_static = num_static; in ice_init_irq_tracker()
20 xa_init_flags(&pf->irq_tracker.entries, XA_FLAGS_ALLOC); in ice_init_irq_tracker()
24 * ice_deinit_irq_tracker - free xarray tracker
29 xa_destroy(&pf->irq_tracker.entries); in ice_deinit_irq_tracker()
33 * ice_free_irq_res - free a block of resources
41 entry = xa_erase(&pf->irq_tracker.entries, index); in ice_free_irq_res()
46 * ice_get_irq_res - get an interrupt resource
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/linux-6.14.4/kernel/irq/
Dmsi.c1 // SPDX-License-Identifier: GPL-2.0
14 #include <linux/msi.h>
25 * struct msi_device_data - MSI per device data
26 * @properties: MSI properties which are interesting to drivers
27 * @mutex: Mutex protecting the MSI descriptor store
28 * @__domains: Internal data for per device MSI domains
39 * struct msi_ctrl - MSI internal management control structure
44 * than the range due to PCI/multi-MSI.
54 #define MSI_XA_MAX_INDEX (ULONG_MAX - 1)
64 * msi_alloc_desc - Allocate an initialized msi_desc
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/linux-6.14.4/drivers/of/
Dirq.c1 // SPDX-License-Identifier: GPL-2.0+
6 * Copyright (C) 1995-1996 Gary Thomas ([email protected])
8 * Copyright (C) 1996-2001 Cort Dougan
32 * irq_of_parse_and_map - Parse and map an interrupt into linux virq space
34 * @index: Index of the interrupt to map
55 * of_irq_find_parent - Given a device node, find its interrupt parent node
70 if (of_property_read_u32(child, "interrupt-parent", &parent)) { in of_irq_find_parent()
80 } while (p && of_get_property(p, "#interrupt-cells", NULL) == NULL); in of_irq_find_parent()
87 * These interrupt controllers abuse interrupt-map for unspeakable
90 * non-sensical interrupt-map that is better left ignored.
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/linux-6.14.4/virt/kvm/
Dirqchip.c1 // SPDX-License-Identifier: GPL-2.0-only
28 irq_rt = srcu_dereference_check(kvm->irq_routing, &kvm->irq_srcu, in kvm_irq_map_gsi()
29 lockdep_is_held(&kvm->irq_lock)); in kvm_irq_map_gsi()
30 if (irq_rt && gsi < irq_rt->nr_rt_entries) { in kvm_irq_map_gsi()
31 hlist_for_each_entry(e, &irq_rt->map[gsi], link) { in kvm_irq_map_gsi()
44 irq_rt = srcu_dereference(kvm->irq_routing, &kvm->irq_srcu); in kvm_irq_map_chip_pin()
45 return irq_rt->chip[irqchip][pin]; in kvm_irq_map_chip_pin()
48 int kvm_send_userspace_msi(struct kvm *kvm, struct kvm_msi *msi) in kvm_send_userspace_msi() argument
52 if (!kvm_arch_irqchip_in_kernel(kvm) || (msi->flags & ~KVM_MSI_VALID_DEVID)) in kvm_send_userspace_msi()
53 return -EINVAL; in kvm_send_userspace_msi()
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/linux-6.14.4/drivers/cdx/
Dcdx_msi.c1 // SPDX-License-Identifier: GPL-2.0
3 * AMD CDX bus driver MSI support
5 * Copyright (C) 2022-2023, Advanced Micro Devices, Inc.
14 #include <linux/msi.h>
22 struct cdx_device *cdx_dev = to_cdx_device(msi_desc->dev); in cdx_msi_write_msg()
27 msi_desc->msg = *msg; in cdx_msi_write_msg()
28 cdx_dev->msi_write_pending = true; in cdx_msi_write_msg()
34 struct cdx_device *cdx_dev = to_cdx_device(msi_desc->dev); in cdx_msi_write_irq_lock()
36 mutex_lock(&cdx_dev->irqchip_lock); in cdx_msi_write_irq_lock()
42 struct cdx_device *cdx_dev = to_cdx_device(msi_desc->dev); in cdx_msi_write_irq_unlock()
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/linux-6.14.4/arch/powerpc/boot/dts/fsl/
Dmpc8641si-post.dtsi1 // SPDX-License-Identifier: GPL-2.0-or-later
5 * Copyright 2016 Elettra-Sincrotrone Trieste S.C.p.A.
9 #address-cells = <2>;
10 #size-cells = <1>;
11 compatible = "fsl,mpc8641-localbus", "simple-bus";
16 #address-cells = <1>;
17 #size-cells = <1>;
19 compatible = "fsl,mpc8641-soc", "simple-bus";
20 bus-frequency = <0>;
22 mcm-law@0 {
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/linux-6.14.4/drivers/pci/controller/plda/
Dpcie-plda-host.c1 // SPDX-License-Identifier: GPL-2.0
15 #include <linux/msi.h>
17 #include <linux/pci-ecam.h>
20 #include "pcie-plda.h"
25 struct plda_pcie_rp *pcie = bus->sysdata; in plda_pcie_map_bus()
27 return pcie->config_base + PCIE_ECAM_OFFSET(bus->number, devfn, where); in plda_pcie_map_bus()
35 struct device *dev = port->dev; in plda_handle_msi()
36 struct plda_msi *msi = &port->msi; in plda_handle_msi() local
37 void __iomem *bridge_base_addr = port->bridge_addr; in plda_handle_msi()
49 for_each_set_bit(bit, &status, msi->num_vectors) { in plda_handle_msi()
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/linux-6.14.4/include/linux/
Dpci-epc.h1 /* SPDX-License-Identifier: GPL-2.0 */
12 #include <linux/pci-epf.h>
17 UNKNOWN_INTERFACE = -1,
36 * struct pci_epc_map - information about EPC memory for mapping a RC PCI
38 * @pci_addr: start address of the RC PCI address range to map
65 * struct pci_epc_ops - set of function pointers for performing EPC operations
70 * into a controller memory window needed to map an RC PCI address
72 * @map_addr: ops to map CPU address to PCI address
74 * @set_msi: ops to set the requested number of MSI interrupts in the MSI
76 * @get_msi: ops to get the number of MSI interrupts allocated by the RC from
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/linux-6.14.4/arch/loongarch/boot/dts/
Dloongson-2k2000.dtsi1 // SPDX-License-Identifier: GPL-2.0
6 /dts-v1/;
8 #include <dt-bindings/interrupt-controller/irq.h>
9 #include <dt-bindings/clock/loongson,ls2k-clk.h>
12 #address-cells = <2>;
13 #size-cells = <2>;
16 #address-cells = <1>;
17 #size-cells = <0>;
34 ref_100m: clock-ref-100m {
35 compatible = "fixed-clock";
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/linux-6.14.4/drivers/pci/controller/mobiveil/
Dpcie-mobiveil-host.c1 // SPDX-License-Identifier: GPL-2.0
6 * Copyright 2019-2020 NXP
19 #include <linux/msi.h>
25 #include "pcie-mobiveil.h"
37 if ((bus->primary == to_pci_host_bridge(bus->bridge)->busnr) && (PCI_SLOT(devfn) > 0)) in mobiveil_pcie_valid_device()
44 * mobiveil_pcie_map_bus - routine to get the configuration base of either
50 struct mobiveil_pcie *pcie = bus->sysdata; in mobiveil_pcie_map_bus()
51 struct mobiveil_root_port *rp = &pcie->rp; in mobiveil_pcie_map_bus()
59 return pcie->csr_axi_slave_base + where; in mobiveil_pcie_map_bus()
67 value = bus->number << PAB_BUS_SHIFT | in mobiveil_pcie_map_bus()
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/linux-6.14.4/drivers/pci/controller/
Dpcie-xilinx-dma-pl.c1 // SPDX-License-Identifier: GPL-2.0-only
13 #include <linux/msi.h>
18 #include "pcie-xilinx-common.h"
46 IMR(MSI) | \
76 /* Number of MSI IRQs */
85 * struct xilinx_pl_dma_variant - PL DMA PCIe variant information
102 * struct pl_dma_pcie - PCIe port information
112 * @msi: MSI information
127 struct xilinx_msi msi; member
135 if (port->variant->version == QDMA) in pcie_read()
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