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/linux-6.14.4/drivers/gpu/drm/msm/dsi/
Ddsi_cfg.c1 // SPDX-License-Identifier: GPL-2.0-only
13 { .supply = "vdda", .init_load_uA = 100000 }, /* 1.2 V */
14 { .supply = "avdd", .init_load_uA = 10000 }, /* 3.0 V */
15 { .supply = "vddio", .init_load_uA = 100000 }, /* 1.8 V */
34 { .supply = "vdd", .init_load_uA = 150000 }, /* 3.0 V */
35 { .supply = "vdda", .init_load_uA = 100000 }, /* 1.2 V */
36 { .supply = "vddio", .init_load_uA = 100000 }, /* 1.8 V */
55 { .supply = "vdda", .init_load_uA = 100000 }, /* 1.2 V */
56 { .supply = "vddio", .init_load_uA = 100000 }, /* 1.8 V */
82 { .supply = "vdda", .init_load_uA = 100000 }, /* 1.25 V */
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/linux-6.14.4/Documentation/devicetree/bindings/display/msm/
Ddsi-controller-main.yaml1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
3 ---
4 $id: http://devicetree.org/schemas/display/msm/dsi-controller-main.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Krishna Manikandan <[email protected]>
15 - items:
16 - enum:
17 - qcom,apq8064-dsi-ctrl
18 - qcom,msm8226-dsi-ctrl
19 - qcom,msm8916-dsi-ctrl
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/linux-6.14.4/Documentation/devicetree/bindings/phy/
Dqcom,qusb2-phy.yaml1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
4 ---
5 $id: http://devicetree.org/schemas/phy/qcom,qusb2-phy.yaml#
6 $schema: http://devicetree.org/meta-schemas/core.yaml#
11 - Wesley Cheng <[email protected]>
19 - items:
20 - enum:
21 - qcom,ipq5424-qusb2-phy
22 - qcom,ipq6018-qusb2-phy
23 - qcom,ipq8074-qusb2-phy
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Dqcom,sc8280xp-qmp-pcie-phy.yaml1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/phy/qcom,sc8280xp-qmp-pcie-phy.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Vinod Koul <[email protected]>
19 - qcom,qcs615-qmp-gen3x1-pcie-phy
20 - qcom,sa8775p-qmp-gen4x2-pcie-phy
21 - qcom,sa8775p-qmp-gen4x4-pcie-phy
22 - qcom,sar2130p-qmp-gen3x2-pcie-phy
23 - qcom,sc8180x-qmp-pcie-phy
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/linux-6.14.4/drivers/gpu/drm/msm/dsi/phy/
Ddsi_phy_7nm.c2 * SPDX-License-Identifier: GPL-2.0
7 #include <linux/clk-provider.h>
15 * DSI PLL 7nm - clock diagram (eg: DSI0): TODO: updated CPHY diagram
20 * +---------+ | +----------+ | +----+
21 * dsi0vco_clk ---| out_div |--o--| divl_3_0 |--o--| /8 |-- dsi0_phy_pll_out_byteclk
22 * +---------+ | +----------+ | +----+
26 * | | +----+ | |\ dsi0_pclk_mux
27 * | |--| /2 |--o--| \ |
28 * | | +----+ | \ | +---------+
29 …* | --------------| |--o--| div_7_4 |-- dsi0_phy_pll_…
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Ddsi_phy_10nm.c2 * SPDX-License-Identifier: GPL-2.0
7 #include <linux/clk-provider.h>
15 * DSI PLL 10nm - clock diagram (eg: DSI0):
20 * +---------+ | +----------+ | +----+
21 * dsi0vco_clk ---| out_div |--o--| divl_3_0 |--o--| /8 |-- dsi0_phy_pll_out_byteclk
22 * +---------+ | +----------+ | +----+
26 * | | +----+ | |\ dsi0_pclk_mux
27 * | |--| /2 |--o--| \ |
28 * | | +----+ | \ | +---------+
29 …* | --------------| |--o--| div_7_4 |-- dsi0_phy_pll_…
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/linux-6.14.4/drivers/regulator/
DKconfig1 # SPDX-License-Identifier: GPL-2.0-only
38 managed regulators and simple non-configurable regulators.
64 the netlink mechanism. User-space applications can subscribe to these events
65 for real-time updates on various regulator events.
75 They provide two I2C-controlled DC/DC step-down converters with
101 tristate "Active-semi act8865 voltage regulator"
106 This driver controls a active-semi act8865 voltage output
110 tristate "Active-semi ACT8945A voltage regulator"
113 This driver controls a active-semi ACT8945A voltage regulator
114 via I2C bus. The ACT8945A features three step-down DC/DC converters
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/linux-6.14.4/arch/arm64/boot/dts/qcom/
Dsm8350.dtsi1 // SPDX-License-Identifier: BSD-3-Clause
6 #include <dt-bindings/interconnect/qcom,sm8350.h>
7 #include <dt-bindings/interrupt-controller/arm-gic.h>
8 #include <dt-bindings/clock/qcom,dispcc-sm8350.h>
9 #include <dt-bindings/clock/qcom,gcc-sm8350.h>
10 #include <dt-bindings/clock/qcom,gpucc-sm8350.h>
11 #include <dt-bindings/clock/qcom,rpmh.h>
12 #include <dt-bindings/dma/qcom-gpi.h>
13 #include <dt-bindings/firmware/qcom,scm.h>
14 #include <dt-bindings/gpio/gpio.h>
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/linux-6.14.4/drivers/phy/qualcomm/
Dphy-qcom-qmp-pcie.c1 // SPDX-License-Identifier: GPL-2.0
7 #include <linux/clk-provider.h>
25 #include <dt-bindings/phy/phy-qcom-qmp.h>
27 #include "phy-qcom-qmp-common.h"
29 #include "phy-qcom-qmp.h"
30 #include "phy-qcom-qmp-pcs-misc-v3.h"
31 #include "phy-qcom-qmp-pcs-pcie-v4.h"
32 #include "phy-qcom-qmp-pcs-pcie-v4_20.h"
33 #include "phy-qcom-qmp-pcs-pcie-v5.h"
34 #include "phy-qcom-qmp-pcs-pcie-v5_20.h"
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