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/linux-6.14.4/drivers/gpu/drm/xe/
Dxe_vm_doc.h1 /* SPDX-License-Identifier: MIT */
15 * Allocate a physical page for root of the page table structure, create default
19 * ------------
25 * VM bind (create GPU mapping for a BO or userptr)
28 * Creates GPU mappings for a BO or userptr within a VM. VM binds uses the same
33 * ----------
35 * DRM_XE_VM_BIND_OP_MAP - Create mapping for a BO
36 * DRM_XE_VM_BIND_OP_UNMAP - Destroy mapping for a BO / userptr
37 * DRM_XE_VM_BIND_OP_MAP_USERPTR - Create mapping for userptr
54 * .. code-block::
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/linux-6.14.4/drivers/gpu/drm/ci/
Dgitlab-ci.yml2 DRM_CI_PROJECT_PATH: &drm-ci-project-path mesa/mesa
3 DRM_CI_COMMIT_SHA: &drm-ci-commit-sha c6a9a9c3bce90923f7700219354e0b6e5a3c9ba6
6 TARGET_BRANCH: drm-next
10 DEQP_RUNNER_GIT_URL: https://gitlab.freedesktop.org/mesa/deqp-runner.git
13 FDO_UPSTREAM_REPO: helen.fornazier/linux # The repo where the git-archive daily runs
14 MESA_TEMPLATES_COMMIT: &ci-templates-commit d5aa3941aa03c2f716595116354fb81eb8012acb
16 CI_PRE_CLONE_SCRIPT: |-
17 set -o xtrace
18 …-L --retry 4 -f --retry-all-errors --retry-delay 60 -s ${DRM_CI_PROJECT_URL}/-/raw/${DRM_CI_COMMIT…
19 bash download-git-cache.sh
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/linux-6.14.4/drivers/gpu/drm/scheduler/
Dsched_main.c16 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
17 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
27 * The GPU scheduler provides entities which allow userspace to push jobs
28 * into software queues which are then scheduled on a hardware run queue.
31 * features among jobs. The driver is supposed to provide callback functions for
32 * backend operations to the scheduler like submitting a job to hardware run queue,
41 * 4. Entities themselves maintain a queue of jobs that will be scheduled on
42 * the hardware.
44 * The jobs in an entity are always scheduled in the order in which they were pushed.
47 * hardware, i.e. the pending queue, the entity must not be referenced anymore
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/linux-6.14.4/Documentation/accounting/
Dpsi.rst4 PSI - Pressure Stall Information
14 either play it safe and under-utilize their hardware resources, or
23 scarcity aids users in sizing workloads to hardware--or provisioning
24 hardware according to workload demand.
27 dynamically using techniques such as load shedding, migrating jobs to
29 priority or restartable batch jobs.
31 This allows maximizing hardware utilization without sacrificing
37 Pressure information for each resource is exported through the
38 respective file in /proc/pressure/ -- cpu, memory, and io.
48 The "full" line indicates the share of time in which all non-idle
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/linux-6.14.4/Documentation/admin-guide/cgroup-v1/
Dcpusets.rst11 - Portions Copyright (c) 2004-2006 Silicon Graphics, Inc.
12 - Modified by Paul Jackson <[email protected]>
13 - Modified by Christoph Lameter <[email protected]>
14 - Modified by Paul Menage <[email protected]>
15 - Modified by Hidetoshi Seto <[email protected]>
41 ----------------------
43 Cpusets provide a mechanism for assigning a set of CPUs and Memory
45 an on-line node that contains memory.
50 hooks, beyond what is already present, required to manage dynamic
54 Documentation/admin-guide/cgroup-v1/cgroups.rst.
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/linux-6.14.4/include/uapi/drm/
Dpvr_drm.h1 /* SPDX-License-Identifier: (GPL-2.0-only WITH Linux-syscall-note) OR MIT */
22 * - All members must be type-aligned.
23 * - The overall struct must be padded to 64-bit alignment.
24 * - Explicit padding is almost always required. This takes the form of
25 * ``_padding_[x]`` members of sufficient size to pad to the next power-of-two
27 * are never used for alignment. Padding fields must be zeroed; this is
29 * - Unions may only appear as the last member of a struct.
30 * - Individual union members may grow in the future. The space between the
41 * struct drm_pvr_obj_array - Container used to pass arrays of objects
56 /** @stride: Stride of object struct. Used for versioning. */
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Dhabanalabs_accel.h1 /* SPDX-License-Identifier: GPL-2.0 WITH Linux-syscall-note
3 * Copyright 2016-2023 HabanaLabs, Ltd.
14 * Defines that are asic-specific but constitutes as ABI between kernel driver
21 * 128 SOBs reserved for collective wait
22 * 16 SOBs reserved for sync stream
27 * 64 monitors reserved for collective wait
28 * 8 monitors reserved for sync stream
189 * 2. F/W mode, where we use F/W to schedule the JOBS to the different queues.
195 * stream id is a running number from 0 up to (N-1), where N is the number
656 * enum hl_goya_dma_direction - Direction of DMA operation inside a LIN_DMA packet that is
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/linux-6.14.4/Documentation/gpu/rfc/
Di915_vm_bind.rst11 issued by the UMD, without user having to provide a list of all required
12 mappings during each submission (as required by older execbuf mode).
14 The VM_BIND/UNBIND calls allow UMDs to request a timeline out fence for
18 User has to opt-in for VM_BIND mode of binding for an address space (VM)
31 * Support for userptr gem objects (no special uapi is required for this).
34 ------------------------
35 The i915 driver flushes the TLB for each submission and when an object's
37 TLB flush. Any VM_BIND mapping added will be in the working set for subsequent
38 submissions on that VM and will not be in the working set for currently running
42 -------------------------------
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/linux-6.14.4/Documentation/driver-api/
Ddma-buf.rst1 Buffer Sharing and Synchronization (dma-buf)
4 The dma-buf subsystem provides the framework for sharing buffers for
5 hardware (DMA) access across multiple device drivers and subsystems, and
6 for synchronizing asynchronous hardware access.
14 interact with the three main primitives offered by dma-buf:
16 - dma-buf, representing a sg_table and exposed to userspace as a file
19 - dma-fence, providing a mechanism to signal when an asynchronous
20 hardware operation has completed; and
21 - dma-resv, which manages a set of dma-fences for a particular dma-buf
22 allowing implicit (kernel-ordered) synchronization of work to
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/linux-6.14.4/drivers/media/platform/st/sti/hva/
Dhva.h1 /* SPDX-License-Identifier: GPL-2.0 */
11 #include <media/v4l2-ctrls.h>
12 #include <media/v4l2-device.h>
13 #include <media/videobuf2-v4l2.h>
14 #include <media/v4l2-mem2mem.h>
18 #define hva_to_dev(h) (h->dev)
20 #define ctx_to_dev(c) (c->hva_dev->dev)
22 #define ctx_to_hdev(c) (c->hva_dev)
24 #define HVA_NAME "st-hva"
25 #define HVA_PREFIX "[---:----]"
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/linux-6.14.4/drivers/gpu/drm/v3d/
Dv3d_sched.c1 // SPDX-License-Identifier: GPL-2.0+
7 * The shared DRM GPU scheduler is used to coordinate submitting jobs
8 * to the hardware. Each DRM fd (roughly a client process) gets its
9 * own scheduler entity, which will process jobs in order. The GPU
12 * For simplicity, and in order to keep latency low for interactive
13 * jobs when bulk background jobs are queued up, we submit a new job
15 * filling up the CT[01]Q FIFOs with jobs. Similarly, we use
17 * and render, instead of having the clients submit jobs using the HW's
80 if (query_info->queries) { in v3d_timestamp_query_info_free()
83 for (i = 0; i < count; i++) in v3d_timestamp_query_info_free()
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/linux-6.14.4/drivers/crypto/caam/
Djr.c1 // SPDX-License-Identifier: GPL-2.0+
6 * Copyright 2008-2012 Freescale Semiconductor, Inc.
42 jrpriv->hwrng = !caam_rng_init(dev); in register_algs()
54 if (--active_devs != 0) in unregister_algs()
72 /* Free the resources of crypto-engine */ in caam_jr_crypto_engine_exit()
73 crypto_engine_exit(jrpriv->engine); in caam_jr_crypto_engine_exit()
87 if (rd_reg32(&jrp->rregs->jrintstatus) & JRINT_ERR_HALT_INPROGRESS) in caam_jr_stop_processing()
91 clrsetbits_32(&jrp->rregs->jrintstatus, JRINT_ERR_HALT_MASK, 0); in caam_jr_stop_processing()
93 /* initiate flush / park (required prior to reset) */ in caam_jr_stop_processing()
94 wr_reg32(&jrp->rregs->jrcommand, jrcr_bits); in caam_jr_stop_processing()
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/linux-6.14.4/Documentation/gpu/
Dtegra.rst8 or blocks amongst themselves, can use syncpoints for synchronization.
11 supports the built-in GPU, comprised of the gr2d and gr3d engines. Starting
18 - A host1x driver that provides infrastructure and access to the host1x
21 - A KMS driver that supports the display controllers as well as a number of
24 - A set of custom userspace IOCTLs that can be used to submit jobs to the
35 tree for matching device nodes, adding the required clients to a list. Drivers
36 for individual clients register with the infrastructure as well and are added
40 device using a driver-provided function which will set up the bits specific to
48 -------------------------------
50 .. kernel-doc:: include/linux/host1x.h
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Ddrm-uapi.rst9 addition, drivers export device-specific interfaces for use by userspace
10 drivers & device-aware applications through ioctls and sysfs files.
16 Cover generic ioctls and sysfs layout here. We only need high-level
22 .. kernel-doc:: drivers/gpu/drm/drm_ioctl.c
31 .. kernel-doc:: drivers/gpu/drm/drm_auth.c
34 .. kernel-doc:: drivers/gpu/drm/drm_auth.c
37 .. kernel-doc:: include/drm/drm_auth.h
46 .. kernel-doc:: drivers/gpu/drm/drm_lease.c
49 Open-Source Userspace Requirements
53 what the userspace side for new uAPI needs to look like. This section here
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/linux-6.14.4/drivers/media/platform/renesas/
Drcar_fdp1.c1 // SPDX-License-Identifier: GPL-2.0+
3 * Renesas R-Car Fine Display Processor
11 * m2m-deinterlace, and vsp1 drivers.
16 #include <linux/dma-mapping.h>
26 #include <media/rcar-fcp.h>
27 #include <media/v4l2-ctrls.h>
28 #include <media/v4l2-device.h>
29 #include <media/v4l2-event.h>
30 #include <media/v4l2-ioctl.h>
31 #include <media/v4l2-mem2mem.h>
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/linux-6.14.4/drivers/dma/
DKconfig1 # SPDX-License-Identifier: GPL-2.0-only
21 This is an option for use by developers; most people should
28 This is an option for use by developers; most people should
65 Enable support for Altera / Intel mSGDMA controller.
86 Enable support for the AMCC PPC440SPe RAID engines.
94 Enable support for Audio DMA Controller found on Apple Silicon SoCs.
112 tristate "Analog Devices AXI-DMAC DMA support"
118 Enable support for the Analog Devices AXI-DMAC peripheral. This DMA
119 controller is often used in Analog Devices' reference designs for FPGA
132 Enable support for Broadcom SBA RAID Engine. The SBA RAID
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Dste_dma40.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * Copyright (C) Ericsson AB 2007-2008
4 * Copyright (C) ST-Ericsson SA 2008-2010
5 * Author: Per Forlin <[email protected]> for ST-Ericsson
6 * Author: Jonas Aaberg <[email protected]> for ST-Ericsson
9 #include <linux/dma-mapping.h>
32 * struct stedma40_platform_data - Configuration struct for the dma device.
34 * @disabled_channels: A vector, ending with -1, that marks physical channels
35 * that are for different reasons not available for the driver.
38 * SoftLLI introduces relink overhead that could impact performance for
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/linux-6.14.4/drivers/gpu/drm/imagination/
Dpvr_device.c1 // SPDX-License-Identifier: GPL-2.0-only OR MIT
21 #include <linux/dma-mapping.h>
33 /* Major number for the supported version of the firmware. */
37 * pvr_device_reg_init() - Initialize kernel access to a PowerVR device's
41 * Sets struct pvr_device->regs.
45 * required).
55 struct platform_device *plat_dev = to_platform_device(drm_dev->dev); in pvr_device_reg_init()
59 pvr_dev->regs_resource = NULL; in pvr_device_reg_init()
60 pvr_dev->regs = NULL; in pvr_device_reg_init()
64 return dev_err_probe(drm_dev->dev, PTR_ERR(regs), in pvr_device_reg_init()
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/linux-6.14.4/include/drm/
Ddrm_modeset_helper_vtables.h3 * Copyright © 2007-2008 Dave Airlie
4 * Copyright © 2007-2008 Intel Corporation
6 * Copyright © 2011-2013 Intel Corporation
22 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
23 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
38 * The DRM mode setting helper functions are common code for drivers to use if
45 * for helper libraries they are by necessity shared among the different
61 * struct drm_crtc_helper_funcs - helper operations for CRTCs
79 * also support using this hook for enabling and disabling a CRTC to
88 * This callback should prepare the CRTC for a subsequent modeset, which
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/linux-6.14.4/drivers/gpu/drm/vc4/
Dvc4_gem.c17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
18 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
30 #include <linux/dma-fence-array.h>
44 mod_timer(&vc4->hangcheck.timer, in vc4_queue_hangcheck()
60 for (i = 0; i < state->user_state.bo_count; i++) in vc4_free_hang_state()
61 drm_gem_object_put(state->bo[i]); in vc4_free_hang_state()
79 if (WARN_ON_ONCE(vc4->gen > VC4_GEN_4)) in vc4_get_hang_state_ioctl()
80 return -ENODEV; in vc4_get_hang_state_ioctl()
82 if (!vc4->v3d) { in vc4_get_hang_state_ioctl()
84 return -ENODEV; in vc4_get_hang_state_ioctl()
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/linux-6.14.4/drivers/gpu/drm/panthor/
Dpanthor_sched.c1 // SPDX-License-Identifier: GPL-2.0 or MIT
15 #include <linux/dma-mapping.h>
16 #include <linux/dma-resv.h>
21 #include <linux/iosys-map.h>
39 * Mali CSF hardware adopts a firmware-assisted scheduling model, where
43 * contains 1 to N queues (N is FW/hardware dependent, and exposed
45 * stream ring buffer, which serves as a way to get jobs submitted to
48 * The firmware can schedule a maximum of M groups (M is FW/hardware
52 * a chance to have his queues scheduled for execution.
54 * The current implementation only supports with kernel-mode queues.
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/linux-6.14.4/include/media/
Dv4l2-mem2mem.h1 /* SPDX-License-Identifier: GPL-2.0-or-later */
3 * Memory-to-memory device framework for Video for Linux 2.
5 * Helper functions for devices that use memory buffers for both source
16 #include <media/videobuf2-v4l2.h>
19 * struct v4l2_m2m_ops - mem-to-mem device driver callbacks
20 * @device_run: required. Begin the actual job (transaction) inside this
30 * that is required for the driver to perform one full transaction.
52 * struct v4l2_m2m_queue_ctx - represents a queue for buffers ready to be
56 * @rdy_queue: List of V4L2 mem-to-mem queues
61 * Queue for buffers ready to be processed as soon as this
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/linux-6.14.4/drivers/gpu/drm/amd/amdgpu/
Damdgpu_device.c18 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
19 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
37 #include <linux/pci-p2pdma.h>
38 #include <linux/apple-gmux.h>
87 #include <asm/intel-family.h>
100 #define AMDGPU_RETRY_SRIOV_RESET(r) ((r) == -EBUSY || (r) == -ETIMEDOUT || (r) == -EINVAL)
148 #define AMDGPU_IP_BLK_MASK_ALL GENMASK(AMD_IP_BLOCK_TYPE_NUM - 1, 0)
166 * is used for cases like reset on initialization where the entire hive needs to
180 return (adev->init_lvl->hwini_ip_block_mask & (1U << block)) != 0; in amdgpu_ip_member_of_hwini()
188 adev->init_lvl = &amdgpu_init_minimal_xgmi; in amdgpu_set_init_level()
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/linux-6.14.4/drivers/accel/habanalabs/common/
Dhabanalabs.h1 /* SPDX-License-Identifier: GPL-2.0
3 * Copyright 2016-2023 HabanaLabs, Ltd.
19 #include <linux/dma-direction.h>
28 #include <linux/io-64-nonatomic-lo-hi.h>
30 #include <linux/dma-buf.h>
45 * bits[63:59] - Encode mmap type
46 * bits[45:0] - mmap offset value
51 #define HL_MMAP_TYPE_SHIFT (59 - PAGE_SHIFT)
64 * In device fini, wait 10 minutes for user processes to be terminated after we kill them.
95 /* Default value for device reset trigger , an invalid value */
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/linux-6.14.4/kernel/trace/
DKconfig1 # SPDX-License-Identifier: GPL-2.0-only
21 API, which will be used by other function-entry hooking
27 See Documentation/trace/ftrace-design.rst
32 See Documentation/trace/ftrace-design.rst
45 See Documentation/trace/ftrace-design.rst
62 This allows for use of ftrace_regs_get_argument() and
80 See Documentation/trace/ftrace-design.rst
85 See Documentation/trace/ftrace-design.rst
90 Arch supports the gcc options -pg with -mfentry
95 Arch supports the gcc options -pg with -mrecord-mcount and -nop-mcount
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