1c6d43980SLemover/*************************************************************************************** 2c6d43980SLemover* Copyright (c) 2020-2021 Institute of Computing Technology, Chinese Academy of Sciences 3f320e0f0SYinan Xu* Copyright (c) 2020-2021 Peng Cheng Laboratory 4c6d43980SLemover* 5c6d43980SLemover* XiangShan is licensed under Mulan PSL v2. 6c6d43980SLemover* You can use this software according to the terms and conditions of the Mulan PSL v2. 7c6d43980SLemover* You may obtain a copy of Mulan PSL v2 at: 8c6d43980SLemover* http://license.coscl.org.cn/MulanPSL2 9c6d43980SLemover* 10c6d43980SLemover* THIS SOFTWARE IS PROVIDED ON AN "AS IS" BASIS, WITHOUT WARRANTIES OF ANY KIND, 11c6d43980SLemover* EITHER EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO NON-INFRINGEMENT, 12c6d43980SLemover* MERCHANTABILITY OR FIT FOR A PARTICULAR PURPOSE. 13c6d43980SLemover* 14c6d43980SLemover* See the Mulan PSL v2 for more details. 15c6d43980SLemover***************************************************************************************/ 16c6d43980SLemover 17718a511dSLinJiaweiimport os.Path 182102afb5SLinJiaweiimport mill._ 19718a511dSLinJiaweiimport scalalib._ 20*72060888SJiawei Linimport publish._ 21c21bff99SJiawei Linimport coursier.maven.MavenRepository 22*72060888SJiawei Linimport $file.`rocket-chip`.common 23*72060888SJiawei Linimport $file.`rocket-chip`.`api-config-chipsalliance`.`build-rules`.mill.build 24*72060888SJiawei Linimport $file.`rocket-chip`.hardfloat.build 252905e463SZihao Yu 26*72060888SJiawei Linobject ivys { 27*72060888SJiawei Lin val sv = "2.12.13" 28*72060888SJiawei Lin val chisel3 = ivy"edu.berkeley.cs::chisel3:3.5.0-RC1" 29*72060888SJiawei Lin val chisel3Plugin = ivy"edu.berkeley.cs:::chisel3-plugin:3.5.0-RC1" 30*72060888SJiawei Lin val chiseltest = ivy"edu.berkeley.cs::chiseltest:0.3.2" 31*72060888SJiawei Lin val scalatest = ivy"org.scalatest::scalatest:3.2.2" 32*72060888SJiawei Lin val macroParadise = ivy"org.scalamacros:::paradise:2.1.1" 33*72060888SJiawei Lin} 34*72060888SJiawei Lin 35*72060888SJiawei Lintrait XSModule extends ScalaModule with PublishModule { 36*72060888SJiawei Lin 37*72060888SJiawei Lin // override this to use chisel from source 38*72060888SJiawei Lin def chiselOpt: Option[PublishModule] = None 39*72060888SJiawei Lin 40*72060888SJiawei Lin override def scalaVersion = ivys.sv 41*72060888SJiawei Lin 42*72060888SJiawei Lin override def compileIvyDeps = Agg(ivys.macroParadise) 43*72060888SJiawei Lin 44*72060888SJiawei Lin override def scalacPluginIvyDeps = Agg(ivys.macroParadise, ivys.chisel3Plugin) 450332e41aSlinjiawei 462102afb5SLinJiawei override def scalacOptions = Seq("-Xsource:2.11") 470332e41aSlinjiawei 48*72060888SJiawei Lin override def ivyDeps = if(chiselOpt.isEmpty) Agg(ivys.chisel3) else Agg.empty[Dep] 490332e41aSlinjiawei 50*72060888SJiawei Lin override def moduleDeps = Seq() ++ chiselOpt 510332e41aSlinjiawei 52*72060888SJiawei Lin def publishVersion = "0.0.1" 53c21bff99SJiawei Lin 54*72060888SJiawei Lin // TODO: fix this 55*72060888SJiawei Lin def pomSettings = PomSettings( 56*72060888SJiawei Lin description = "XiangShan", 57*72060888SJiawei Lin organization = "", 58*72060888SJiawei Lin url = "https://github.com/OpenXiangShan/XiangShan", 59*72060888SJiawei Lin licenses = Seq(License.`Apache-2.0`), 60*72060888SJiawei Lin versionControl = VersionControl.github("OpenXiangShan", "XiangShan"), 61*72060888SJiawei Lin developers = Seq.empty 62c21bff99SJiawei Lin ) 63c21bff99SJiawei Lin} 64c21bff99SJiawei Lin 65*72060888SJiawei Linobject rocketchip extends `rocket-chip`.common.CommonRocketChip { 66*72060888SJiawei Lin 67*72060888SJiawei Lin val rcPath = os.pwd / "rocket-chip" 68*72060888SJiawei Lin 69*72060888SJiawei Lin override def scalaVersion = ivys.sv 70*72060888SJiawei Lin 71*72060888SJiawei Lin override def scalacOptions = Seq("-Xsource:2.11") 72*72060888SJiawei Lin 73*72060888SJiawei Lin override def millSourcePath = rcPath 74*72060888SJiawei Lin 75*72060888SJiawei Lin object configRocket extends `rocket-chip`.`api-config-chipsalliance`.`build-rules`.mill.build.config with PublishModule { 76*72060888SJiawei Lin override def millSourcePath = rcPath / "api-config-chipsalliance" / "design" / "craft" 77*72060888SJiawei Lin 78*72060888SJiawei Lin override def scalaVersion = T { 79*72060888SJiawei Lin rocketchip.scalaVersion() 802905e463SZihao Yu } 812905e463SZihao Yu 82*72060888SJiawei Lin override def pomSettings = T { 83*72060888SJiawei Lin rocketchip.pomSettings() 842102afb5SLinJiawei } 852102afb5SLinJiawei 86*72060888SJiawei Lin override def publishVersion = T { 87*72060888SJiawei Lin rocketchip.publishVersion() 88*72060888SJiawei Lin } 892102afb5SLinJiawei } 902102afb5SLinJiawei 91*72060888SJiawei Lin object hardfloatRocket extends `rocket-chip`.hardfloat.build.hardfloat { 92*72060888SJiawei Lin override def millSourcePath = rcPath / "hardfloat" 93718a511dSLinJiawei 94*72060888SJiawei Lin override def scalaVersion = T { 95*72060888SJiawei Lin rocketchip.scalaVersion() 96*72060888SJiawei Lin } 97718a511dSLinJiawei 98*72060888SJiawei Lin def chisel3IvyDeps = if(chisel3Module.isEmpty) Agg( 99*72060888SJiawei Lin common.getVersion("chisel3") 100*72060888SJiawei Lin ) else Agg.empty[Dep] 101*72060888SJiawei Lin } 102*72060888SJiawei Lin 103*72060888SJiawei Lin def hardfloatModule = hardfloatRocket 104*72060888SJiawei Lin 105*72060888SJiawei Lin def configModule = configRocket 106*72060888SJiawei Lin 107*72060888SJiawei Lin} 108*72060888SJiawei Lin 109*72060888SJiawei Linobject huancun extends XSModule with SbtModule { 110*72060888SJiawei Lin 111*72060888SJiawei Lin override def millSourcePath = os.pwd / "huancun" 112718a511dSLinJiawei 113718a511dSLinJiawei override def moduleDeps = super.moduleDeps ++ Seq( 114*72060888SJiawei Lin rocketchip 115a1ea7f76SJiawei Lin ) 116718a511dSLinJiawei} 117718a511dSLinJiawei 118*72060888SJiawei Linobject difftest extends XSModule with SbtModule { 119a3e87608SWilliam Wang override def millSourcePath = os.pwd / "difftest" 120a3e87608SWilliam Wang} 121718a511dSLinJiawei 122*72060888SJiawei Linobject fudian extends XSModule with SbtModule 123dc597826SJiawei Lin 124*72060888SJiawei Lin// extends this trait to use XiangShan in other projects 125*72060888SJiawei Lintrait CommonXiangShan extends XSModule with SbtModule { m => 126*72060888SJiawei Lin 127*72060888SJiawei Lin // module deps 128*72060888SJiawei Lin def rocketModule: PublishModule 129*72060888SJiawei Lin def difftestModule: PublishModule 130*72060888SJiawei Lin def huancunModule: PublishModule 131*72060888SJiawei Lin def fudianModule: PublishModule 132*72060888SJiawei Lin 133*72060888SJiawei Lin override def millSourcePath = os.pwd 134718a511dSLinJiawei 1358b8e745dSYikeZhou override def forkArgs = Seq("-Xmx64G", "-Xss256m") 136718a511dSLinJiawei 137*72060888SJiawei Lin override def ivyDeps = super.ivyDeps() ++ Seq(ivys.chiseltest) 138*72060888SJiawei Lin 139c5f31b5bSLinJiawei override def moduleDeps = super.moduleDeps ++ Seq( 140*72060888SJiawei Lin rocketModule, 141*72060888SJiawei Lin difftestModule, 142*72060888SJiawei Lin huancunModule, 143*72060888SJiawei Lin fudianModule 144c5f31b5bSLinJiawei ) 1452905e463SZihao Yu 146*72060888SJiawei Lin object test extends Tests with TestModule.ScalaTest { 1476f021e01SJiawei Lin 148*72060888SJiawei Lin override def forkArgs = m.forkArgs 1496f021e01SJiawei Lin 150718a511dSLinJiawei override def ivyDeps = super.ivyDeps() ++ Agg( 151*72060888SJiawei Lin ivys.scalatest 1526aea7ec5SLinJiawei ) 153718a511dSLinJiawei 154fc85214eSLinJiawei } 155718a511dSLinJiawei 1562905e463SZihao Yu} 157*72060888SJiawei Lin 158*72060888SJiawei Linobject XiangShan extends CommonXiangShan { 159*72060888SJiawei Lin override def rocketModule = rocketchip 160*72060888SJiawei Lin override def difftestModule = difftest 161*72060888SJiawei Lin override def huancunModule = huancun 162*72060888SJiawei Lin override def fudianModule = fudian 163*72060888SJiawei Lin} 164