xref: /XiangShan/scripts/top-down/configs.py (revision 37626c8b1a64da9ec42137e966605dd4b3f69203) 
1stats_dir = ''
2
3CSV_PATH = 'results/results.csv'
4JSON_FILE = 'resources/spec06_rv64gcb_o2_20m.json'
5OUT_CSV = 'results/results-weighted.csv'
6INT_ONLY = False
7FP_ONLY = False
8
9xs_coarse_rename_map = {
10    'OverrideBubble': 'MergeFrontend',
11    'FtqFullStall': 'MergeFrontend',
12    'FtqUpdateBubble': 'MergeBadSpec',
13    'TAGEMissBubble': 'MergeBadSpec',
14    'SCMissBubble': 'MergeBadSpec',
15    'ITTAGEMissBubble': 'MergeBadSpec',
16    'RASMissBubble': 'MergeBadSpec',
17    'ICacheMissBubble': 'MergeFrontend',
18    'ITLBMissBubble': 'MergeFrontend',
19    'BTBMissBubble': 'MergeBadSpec',
20    'FetchFragBubble': 'MergeFrontend',
21
22    'DivStall': 'MergeCore',
23    'IntNotReadyStall': 'MergeCore',
24    'FPNotReadyStall': 'MergeCore',
25
26    'MemNotReadyStall': 'MergeLoad',
27
28    'IntFlStall': 'MergeFreelistStall',
29    'FpFlStall': 'MergeFreelistStall',
30    'VecFlStall': 'MergeFreelistStall',
31    'V0FlStall': 'MergeFreelistStall',
32    'VlFlStall': 'MergeFreelistStall',
33    'MultiFlStall': 'MergeFreelistStall',
34
35    'LoadTLBStall': 'MergeLoad',
36    'LoadL1Stall': 'MergeLoad',
37    'LoadL2Stall': 'MergeLoad',
38    'LoadL3Stall': 'MergeLoad',
39    'LoadMemStall': 'MergeLoad',
40    'StoreStall': 'MergeStore',
41
42    'AtomicStall': 'MergeMisc',
43
44    'FlushedInsts': 'MergeBadSpecInst',
45    'LoadVioReplayStall': 'MergeBadSpec',
46
47    'LoadMSHRReplayStall': 'MergeLoad',
48
49    'ControlRecoveryStall': 'MergeBadSpec',
50    'MemVioRecoveryStall': 'MergeBadSpec',
51    'OtherRecoveryStall': 'MergeBadSpec',
52
53    'OtherCoreStall': 'MergeCoreOther',
54    'NoStall': 'MergeBase',
55
56    'MemVioRedirectBubble': 'MergeBadSpec',
57    'OtherRedirectBubble': 'MergeMisc',
58
59    'commitInstr': 'Insts',
60    'total_cycles': 'Cycles',
61}
62
63xs_fine_grain_rename_map = {
64    'OverrideBubble': 'MergeOtherFrontend',
65    'FtqFullStall': 'MergeOtherFrontend',
66    'FtqUpdateBubble': 'MergeBadSpecBubble',
67    'TAGEMissBubble': 'MergeBadSpecBubble',
68    'SCMissBubble': 'MergeBadSpecBubble',
69    'ITTAGEMissBubble': 'MergeBadSpecBubble',
70    'RASMissBubble': 'MergeBadSpecBubble',
71    'ICacheMissBubble': 'ICacheBubble',
72    'ITLBMissBubble': 'ITlbBubble',
73    'BTBMissBubble': 'MergeBadSpecBubble',
74    'FetchFragBubble': 'FragmentBubble',
75
76    'DivStall': 'LongExecute',
77    'IntNotReadyStall': 'MergeInstNotReady',
78    'FPNotReadyStall': 'MergeInstNotReady',
79
80    'MemNotReadyStall': 'MemNotReady',
81
82    'IntFlStall': 'MergeFreelistStall',
83    'FpFlStall': 'MergeFreelistStall',
84
85    'LoadTLBStall': 'DTlbStall',
86    'LoadL1Stall': 'LoadL1Bound',
87    'LoadL2Stall': 'LoadL2Bound',
88    'LoadL3Stall': 'LoadL3Bound',
89    'LoadMemStall': 'LoadMemBound',
90    'StoreStall': 'MergeStoreBound',
91
92    'AtomicStall': 'SerializeStall',
93
94    'FlushedInsts': 'BadSpecInst',
95    'LoadVioReplayStall': None,
96
97    'LoadMSHRReplayStall': None,
98
99    'ControlRecoveryStall': 'MergeBadSpecWalking',
100    'MemVioRecoveryStall': 'MergeBadSpecWalking',
101    'OtherRecoveryStall': 'MergeBadSpecWalking',
102
103    'OtherCoreStall': 'MergeMisc',
104    'NoStall': None,
105
106    'MemVioRedirectBubble': 'MergeBadSpecBubble',
107    'OtherRedirectBubble': 'MergeMisc',
108
109    'commitInstr': 'Insts',
110    'total_cycles': 'Cycles',
111}
112
113XS_CORE_PREFIX = r'\[PERF \]\[time=\s+\d+\] SimTop\.l_soc\.core_with_l2\.core'
114
115targets = {
116    'NoStall': fr'{XS_CORE_PREFIX}.backend.inner\.ctrlBlock\.dispatch: NoStall,\s+(\d+)',
117
118    'OverrideBubble': fr'{XS_CORE_PREFIX}.backend.inner\.ctrlBlock\.dispatch: OverrideBubble,\s+(\d+)',
119    'FtqUpdateBubble': fr'{XS_CORE_PREFIX}.backend.inner\.ctrlBlock\.dispatch: FtqUpdateBubble,\s+(\d+)',
120    'TAGEMissBubble': fr'{XS_CORE_PREFIX}.backend.inner\.ctrlBlock\.dispatch: TAGEMissBubble,\s+(\d+)',
121    'SCMissBubble': fr'{XS_CORE_PREFIX}.backend.inner\.ctrlBlock\.dispatch: SCMissBubble,\s+(\d+)',
122    'ITTAGEMissBubble': fr'{XS_CORE_PREFIX}.backend.inner\.ctrlBlock\.dispatch: ITTAGEMissBubble,\s+(\d+)',
123    'RASMissBubble': fr'{XS_CORE_PREFIX}.backend.inner\.ctrlBlock\.dispatch: RASMissBubble,\s+(\d+)',
124    'MemVioRedirectBubble': fr'{XS_CORE_PREFIX}.backend.inner\.ctrlBlock\.dispatch: MemVioRedirectBubble,\s+(\d+)',
125    'OtherRedirectBubble': fr'{XS_CORE_PREFIX}.backend.inner\.ctrlBlock\.dispatch: OtherRedirectBubble,\s+(\d+)',
126    'FtqFullStall': fr'{XS_CORE_PREFIX}.backend.inner\.ctrlBlock\.dispatch: FtqFullStall,\s+(\d+)',
127
128    'ICacheMissBubble': fr'{XS_CORE_PREFIX}.backend.inner\.ctrlBlock\.dispatch: ICacheMissBubble,\s+(\d+)',
129    'ITLBMissBubble': fr'{XS_CORE_PREFIX}.backend.inner\.ctrlBlock\.dispatch: ITLBMissBubble,\s+(\d+)',
130    'BTBMissBubble': fr'{XS_CORE_PREFIX}.backend.inner\.ctrlBlock\.dispatch: BTBMissBubble,\s+(\d+)',
131    'FetchFragBubble': fr'{XS_CORE_PREFIX}.backend.inner\.ctrlBlock\.dispatch: FetchFragBubble,\s+(\d+)',
132
133    'DivStall': fr'{XS_CORE_PREFIX}.backend.inner\.ctrlBlock\.dispatch: DivStall,\s+(\d+)',
134    'IntNotReadyStall': fr'{XS_CORE_PREFIX}.backend.inner\.ctrlBlock\.dispatch: IntNotReadyStall,\s+(\d+)',
135    'FPNotReadyStall': fr'{XS_CORE_PREFIX}.backend.inner\.ctrlBlock\.dispatch: FPNotReadyStall,\s+(\d+)',
136    'MemNotReadyStall': fr'{XS_CORE_PREFIX}.backend.inner\.ctrlBlock\.dispatch: MemNotReadyStall,\s+(\d+)',
137
138    'IntFlStall': fr'{XS_CORE_PREFIX}.backend.inner\.ctrlBlock\.dispatch: IntFlStall,\s+(\d+)',
139    'FpFlStall': fr'{XS_CORE_PREFIX}.backend.inner\.ctrlBlock\.dispatch: FpFlStall,\s+(\d+)',
140    'VecFlStall': fr'{XS_CORE_PREFIX}.backend.inner\.ctrlBlock\.dispatch: VecFlStall,\s+(\d+)',
141    'V0FlStall': fr'{XS_CORE_PREFIX}.backend.inner\.ctrlBlock\.dispatch: V0FlStall,\s+(\d+)',
142    'VlFlStall': fr'{XS_CORE_PREFIX}.backend.inner\.ctrlBlock\.dispatch: VlFlStall,\s+(\d+)',
143    'MultiFlStall': fr'{XS_CORE_PREFIX}.backend.inner\.ctrlBlock\.dispatch: MultiFlStall,\s+(\d+)',
144
145    'LoadTLBStall': fr'{XS_CORE_PREFIX}.backend.inner\.ctrlBlock\.dispatch: LoadTLBStall,\s+(\d+)',
146    'LoadL1Stall': fr'{XS_CORE_PREFIX}.backend.inner\.ctrlBlock\.dispatch: LoadL1Stall,\s+(\d+)',
147    'LoadL2Stall': fr'{XS_CORE_PREFIX}.backend.inner\.ctrlBlock\.dispatch: LoadL2Stall,\s+(\d+)',
148    'LoadL3Stall': fr'{XS_CORE_PREFIX}.backend.inner\.ctrlBlock\.dispatch: LoadL3Stall,\s+(\d+)',
149    'LoadMemStall': fr'{XS_CORE_PREFIX}.backend.inner\.ctrlBlock\.dispatch: LoadMemStall,\s+(\d+)',
150    'StoreStall': fr'{XS_CORE_PREFIX}.backend.inner\.ctrlBlock\.dispatch: StoreStall,\s+(\d+)',
151    'AtomicStall': fr'{XS_CORE_PREFIX}.backend.inner\.ctrlBlock\.dispatch: AtomicStall,\s+(\d+)',
152
153    'LoadVioReplayStall': fr'{XS_CORE_PREFIX}.backend.inner\.ctrlBlock\.dispatch: LoadVioReplayStall,\s+(\d+)',
154    'LoadMSHRReplayStall': fr'{XS_CORE_PREFIX}.backend.inner\.ctrlBlock\.dispatch: LoadMSHRReplayStall,\s+(\d+)',
155
156    'ControlRecoveryStall': fr'{XS_CORE_PREFIX}.backend.inner\.ctrlBlock\.dispatch: ControlRecoveryStall,\s+(\d+)',
157    'MemVioRecoveryStall': fr'{XS_CORE_PREFIX}.backend.inner\.ctrlBlock\.dispatch: MemVioRecoveryStall,\s+(\d+)',
158    'OtherRecoveryStall': fr'{XS_CORE_PREFIX}.backend.inner\.ctrlBlock\.dispatch: OtherRecoveryStall,\s+(\d+)',
159
160    'FlushedInsts': fr'{XS_CORE_PREFIX}.backend.inner\.ctrlBlock\.dispatch: FlushedInsts,\s+(\d+)',
161    'OtherCoreStall': fr'{XS_CORE_PREFIX}.backend.inner\.ctrlBlock\.dispatch: OtherCoreStall,\s+(\d+)',
162
163    "commitInstr": r"\[PERF \]\[time=\s+\d+\] SimTop.l_soc.core_with_l2.core.backend.inner\.ctrlBlock.rob: commitInstr,\s+(\d+)",
164    "total_cycles": r"\[PERF \]\[time=\s+\d+\] SimTop.l_soc.core_with_l2.core.backend.inner\.ctrlBlock.rob: clock_cycle,\s+(\d+)",
165}
166
167
168spec_bmks = {
169    '06': {
170        'int': [
171            'perlbench',
172            'bzip2',
173            'gcc',
174            'mcf',
175            'gobmk',
176            'hmmer',
177            'sjeng',
178            'libquantum',
179            'h264ref',
180            'omnetpp',
181            'astar',
182            'xalancbmk',
183        ],
184        'float': [
185            'bwaves', 'gamess', 'milc', 'zeusmp', 'gromacs',
186            'cactusADM', 'leslie3d', 'namd', 'dealII', 'soplex',
187            'povray', 'calculix', 'GemsFDTD', 'tonto', 'lbm',
188            'wrf', 'sphinx3',
189        ],
190        'high_squash': ['astar', 'bzip2', 'gobmk', 'sjeng'],
191    },
192    '17': {},
193}
194