1/*************************************************************************************** 2* Copyright (c) 2020-2021 Institute of Computing Technology, Chinese Academy of Sciences 3* Copyright (c) 2020-2021 Peng Cheng Laboratory 4* 5* XiangShan is licensed under Mulan PSL v2. 6* You can use this software according to the terms and conditions of the Mulan PSL v2. 7* You may obtain a copy of Mulan PSL v2 at: 8* http://license.coscl.org.cn/MulanPSL2 9* 10* THIS SOFTWARE IS PROVIDED ON AN "AS IS" BASIS, WITHOUT WARRANTIES OF ANY KIND, 11* EITHER EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO NON-INFRINGEMENT, 12* MERCHANTABILITY OR FIT FOR A PARTICULAR PURPOSE. 13* 14* See the Mulan PSL v2 for more details. 15***************************************************************************************/ 16 17package device 18 19import org.chipsalliance.cde.config.Parameters 20import chisel3._ 21import chisel3.util._ 22import difftest.common.DifftestSDCard 23import freechips.rocketchip.diplomacy.AddressSet 24import utility._ 25 26trait HasSDConst { 27 def MemorySize = 4L * 1024 * 1024 * 1024 // 4GB 28 def READ_BL_LEN = 15 29 30 def BlockLen = (1 << READ_BL_LEN) 31 32 def NrBlock = MemorySize / BlockLen 33 34 def C_SIZE_MULT = 7 // only 3 bits 35 def MULT = (1 << (C_SIZE_MULT + 2)) 36 37 def C_SIZE = NrBlock / MULT - 1 38} 39 40class AXI4DummySD 41( 42 address: Seq[AddressSet] 43)(implicit p: Parameters) 44 extends AXI4SlaveModule(address, executable = false) with HasSDConst 45{ 46 override lazy val module = new AXI4SlaveModuleImp[Null](this) { 47 val range = List.range(0, 21) 48 val sdcmd :: sdarg :: sdtout :: sdcdiv :: sdrsp0 :: sdrsp1 :: sdrsp2 :: sdrsp3 :: sdhsts :: __pad0 :: __pad1 :: __pad2 :: sdvdd :: sdedm :: sdhcfg :: sdhbct :: sddata :: __pad10 :: __pad11 :: __pad12 :: sdhblc :: Nil = range 49 50 val regs = List.fill(range.size)(RegInit(0.U(32.W))) 51 val edmConst = (8 << 4).U(32.W) // number of data in fifo 52 53 val MMC_SEND_OP_COND = 1 54 val MMC_ALL_SEND_CID = 2 55 val MMC_SEND_CSD = 9 56 val MMC_SEND_STATUS = 13 57 val MMC_READ_MULTIPLE_BLOCK = 18 58 59 val setAddr = WireInit(false.B) 60 61 def cmdWfn(wdata: UInt) = { 62 val cmd = wdata(5, 0) 63 switch(cmd) { 64 is(MMC_SEND_OP_COND.U) { 65 regs(sdrsp0) := "h80ff8000".U 66 } 67 is(MMC_ALL_SEND_CID.U) { 68 regs(sdrsp0) := "h00000001".U 69 regs(sdrsp1) := "h00000000".U 70 regs(sdrsp2) := "h00000000".U 71 regs(sdrsp3) := "h15000000".U 72 } 73 is(MMC_SEND_CSD.U) { 74 regs(sdrsp0) := "h92404001".U 75 regs(sdrsp1) := "h124b97e3".U | (C_SIZE.U(1, 0) << 30) 76 regs(sdrsp2) := "h0f508000".U | C_SIZE.U(11, 2) | (READ_BL_LEN.U << 16) 77 regs(sdrsp3) := "h8c26012a".U 78 } 79 is(MMC_SEND_STATUS.U) { 80 regs(sdrsp0) := 0.U 81 regs(sdrsp1) := 0.U 82 regs(sdrsp2) := 0.U 83 regs(sdrsp3) := 0.U 84 } 85 is(MMC_READ_MULTIPLE_BLOCK.U) { 86 setAddr := true.B 87 } 88 } 89 wdata 90 } 91 92 val sdHelper = DifftestSDCard() 93 sdHelper.ren := (getOffset(raddr) === 0x40.U && in.ar.fire) 94 sdHelper.setAddr := setAddr 95 sdHelper.addr := regs(sdarg) 96 97 def sdRead = sdHelper.data 98 99 val mapping = Map( 100 RegMap(0x00, regs(sdcmd), cmdWfn), 101 RegMap(0x04, regs(sdarg)), 102 RegMap(0x10, regs(sdrsp0), RegMap.Unwritable), 103 RegMap(0x14, regs(sdrsp1), RegMap.Unwritable), 104 RegMap(0x18, regs(sdrsp2), RegMap.Unwritable), 105 RegMap(0x1c, regs(sdrsp3), RegMap.Unwritable), 106 RegMap(0x20, regs(sdhsts)), 107 RegMap(0x34, edmConst, RegMap.Unwritable), 108 RegMap(0x38, regs(sdhcfg)), 109 RegMap(0x38, regs(sdhbct)), 110 RegMap(0x40, sdRead, RegMap.Unwritable), 111 RegMap(0x50, regs(sdhblc)) 112 ) 113 114 def getOffset(addr: UInt) = addr(12, 0) 115 116 val strb = Mux(waddr(2), in.w.bits.strb(7, 4), in.w.bits.strb(3, 0)) 117 val rdata = Wire(UInt(32.W)) 118 RegMap.generate(mapping, getOffset(raddr), rdata, 119 getOffset(waddr), in.w.fire, in.w.bits.data(31, 0), MaskExpand(strb)) 120 121 in.r.bits.data := Fill(2, rdata) 122 } 123} 124