1package device 2 3import freechips.rocketchip.diplomacy.{AddressSet, LazyModule, LazyModuleImp, SimpleDevice} 4import org.chipsalliance.cde.config.Parameters 5import chisel3._ 6import chisel3.util._ 7import xiangshan._ 8import utils._ 9import utility._ 10import freechips.rocketchip.regmapper.RegFieldGroup 11import freechips.rocketchip.tilelink.TLRegisterNode 12import xiangshan.backend.fu.{MMPMAMethod, PMAConst, PMPChecker, PMPReqBundle, PMPRespBundle} 13 14class TLPMAIO(implicit val p: Parameters) extends Bundle with PMAConst { 15 val req = Vec(mmpma.num, Flipped(Valid(new PMPReqBundle(mmpma.lgMaxSize)))) 16 val resp = Vec(mmpma.num, new PMPRespBundle()) 17} 18 19class TLPMA(implicit p: Parameters) extends LazyModule with PMAConst with MMPMAMethod{ 20 val node = TLRegisterNode( 21 address = Seq(AddressSet(mmpma.address/*pmaParam.address*/, mmpma.mask)), 22 device = new SimpleDevice("mmpma", Nil), 23 concurrency = 1, 24 beatBytes = 8 25 ) 26 27 class TLPMAImp(wrapper: LazyModule) extends LazyModuleImp(wrapper) { 28 29 val io = IO(new TLPMAIO) 30 val req = io.req 31 val resp = io.resp 32 33 val (cfg_map, addr_map, pma) = gen_mmpma_mapping(NumPMA) 34 node.regmap( 35 0x0000 -> RegFieldGroup( 36 "MMPMA_Config_Register", desc = Some("MMPMA configuation register"), 37 regs = cfg_map 38 ), 39 // still blank space here, fix it 40 0x0100 -> RegFieldGroup( 41 "MMPMA_Address_Register", desc = Some("MMPMA Address register"), 42 regs = addr_map 43 ) 44 ) 45 46 val pma_check = VecInit(Seq.fill(mmpma.num)( 47 Module(new PMPChecker( 48 mmpma.lgMaxSize/*pmaParam.lgMaxSize*/, 49 mmpma.sameCycle/* pmaParam.sameCycle*/, 50 false)).io 51 )) 52 pma_check.map(_.check_env.apply(mmpma.lgMaxSize.U, pma/*placeHolder*/, pma)) 53 for (i <- 0 until mmpma.num) { 54 pma_check(i).req_apply(req(i).valid, req(i).bits.addr) 55 resp(i) := pma_check(i).resp 56 } 57 } 58 59 lazy val module = new TLPMAImp(this) 60} 61