1c6d43980SLemover/*************************************************************************************** 2e3da8badSTang Haojin* Copyright (c) 2024 Beijing Institute of Open Source Chip (BOSC) 3e3da8badSTang Haojin* Copyright (c) 2020-2024 Institute of Computing Technology, Chinese Academy of Sciences 4f320e0f0SYinan Xu* Copyright (c) 2020-2021 Peng Cheng Laboratory 5c6d43980SLemover* 6c6d43980SLemover* XiangShan is licensed under Mulan PSL v2. 7c6d43980SLemover* You can use this software according to the terms and conditions of the Mulan PSL v2. 8c6d43980SLemover* You may obtain a copy of Mulan PSL v2 at: 9c6d43980SLemover* http://license.coscl.org.cn/MulanPSL2 10c6d43980SLemover* 11c6d43980SLemover* THIS SOFTWARE IS PROVIDED ON AN "AS IS" BASIS, WITHOUT WARRANTIES OF ANY KIND, 12c6d43980SLemover* EITHER EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO NON-INFRINGEMENT, 13c6d43980SLemover* MERCHANTABILITY OR FIT FOR A PARTICULAR PURPOSE. 14c6d43980SLemover* 15c6d43980SLemover* See the Mulan PSL v2 for more details. 16c6d43980SLemover***************************************************************************************/ 17c6d43980SLemover 1845c767e3SLinJiaweipackage top 1945c767e3SLinJiawei 208891a219SYinan Xuimport org.chipsalliance.cde.config.{Config, Parameters} 2145c767e3SLinJiaweiimport system.SoCParamsKey 2234ab1ae9SJiawei Linimport xiangshan.{DebugOptionsKey, XSTileKey} 2319fbeaf4STang Haojinimport freechips.rocketchip.tile.MaxHartIdBits 24321934c7SKunlin Youimport difftest.DifftestModule 2545c767e3SLinJiawei 2645c767e3SLinJiaweiimport scala.annotation.tailrec 2745c767e3SLinJiaweiimport scala.sys.exit 2819fbeaf4STang Haojinimport chisel3.util.log2Up 29bb2f3f51STang Haojinimport utility._ 3045c767e3SLinJiawei 3145c767e3SLinJiaweiobject ArgParser { 3245c767e3SLinJiawei // TODO: add more explainations 3345c767e3SLinJiawei val usage = 3445c767e3SLinJiawei """ 3545c767e3SLinJiawei |XiangShan Options 3645c767e3SLinJiawei |--xs-help print this help message 37*ce34d21eSJiuyue Ma |--version print version info 3845c767e3SLinJiawei |--config <ConfigClassName> 3945c767e3SLinJiawei |--num-cores <Int> 40b628978eSTang Haojin |--hartidbits <Int> 4145c767e3SLinJiawei |--with-dramsim3 421545277aSYinan Xu |--fpga-platform 439eee369fSKamimiao |--reset-gen 441545277aSYinan Xu |--enable-difftest 451545277aSYinan Xu |--enable-log 46839e5512SZifei Zhang |--with-chiseldb 47839e5512SZifei Zhang |--with-rollingdb 4845c767e3SLinJiawei |--disable-perf 4937b8fdeeSKamimiao |--disable-alwaysdb 5045c767e3SLinJiawei |""".stripMargin 5145c767e3SLinJiawei 5245c767e3SLinJiawei def getConfigByName(confString: String): Parameters = { 5345c767e3SLinJiawei var prefix = "top." // default package is 'top' 5445c767e3SLinJiawei if(confString.contains('.')){ // already a full name 5545c767e3SLinJiawei prefix = "" 5645c767e3SLinJiawei } 5745c767e3SLinJiawei val c = Class.forName(prefix + confString).getConstructor(Integer.TYPE) 5845c767e3SLinJiawei c.newInstance(1.asInstanceOf[Object]).asInstanceOf[Parameters] 5945c767e3SLinJiawei } 6051e45dbbSTang Haojin def parse(args: Array[String]): (Parameters, Array[String], Array[String]) = { 6145c767e3SLinJiawei val default = new DefaultConfig(1) 6245c767e3SLinJiawei var firrtlOpts = Array[String]() 63b665b650STang Haojin var firtoolOpts = Array[String]() 6445c767e3SLinJiawei @tailrec 6545c767e3SLinJiawei def nextOption(config: Parameters, list: List[String]): Parameters = { 6645c767e3SLinJiawei list match { 6745c767e3SLinJiawei case Nil => config 6845c767e3SLinJiawei case "--xs-help" :: tail => 6945c767e3SLinJiawei println(usage) 7045c767e3SLinJiawei if(tail == Nil) exit(0) 7145c767e3SLinJiawei nextOption(config, tail) 72*ce34d21eSJiuyue Ma case "--version" :: tail => 73*ce34d21eSJiuyue Ma println(os.read(os.resource / "publishVersion")) 74*ce34d21eSJiuyue Ma if(tail == Nil) exit(0) 75*ce34d21eSJiuyue Ma nextOption(config, tail) 7645c767e3SLinJiawei case "--config" :: confString :: tail => 7745c767e3SLinJiawei nextOption(getConfigByName(confString), tail) 781fc8b877Szhanglinjuan case "--issue" :: issueString :: tail => 791fc8b877Szhanglinjuan nextOption(config.alter((site, here, up) => { 801fc8b877Szhanglinjuan case coupledL2.tl2chi.CHIIssue => issueString 811fc8b877Szhanglinjuan }), tail) 8245c767e3SLinJiawei case "--num-cores" :: value :: tail => 8345c767e3SLinJiawei nextOption(config.alter((site, here, up) => { 8434ab1ae9SJiawei Lin case XSTileKey => (0 until value.toInt) map { i => 8534ab1ae9SJiawei Lin up(XSTileKey).head.copy(HartId = i) 8634ab1ae9SJiawei Lin } 8719fbeaf4STang Haojin case MaxHartIdBits => 88b628978eSTang Haojin log2Up(value.toInt) max up(MaxHartIdBits) 89b628978eSTang Haojin }), tail) 90b628978eSTang Haojin case "--hartidbits" :: hartidbits :: tail => 91b628978eSTang Haojin nextOption(config.alter((site, here, up) => { 92b628978eSTang Haojin case MaxHartIdBits => hartidbits 9345c767e3SLinJiawei }), tail) 9445c767e3SLinJiawei case "--with-dramsim3" :: tail => 9545c767e3SLinJiawei nextOption(config.alter((site, here, up) => { 9645c767e3SLinJiawei case DebugOptionsKey => up(DebugOptionsKey).copy(UseDRAMSim = true) 9745c767e3SLinJiawei }), tail) 98b8890d17SZifei Zhang case "--with-chiseldb" :: tail => 99b8890d17SZifei Zhang nextOption(config.alter((site, here, up) => { 100b8890d17SZifei Zhang case DebugOptionsKey => up(DebugOptionsKey).copy(EnableChiselDB = true) 101b8890d17SZifei Zhang }), tail) 102839e5512SZifei Zhang case "--with-rollingdb" :: tail => 103839e5512SZifei Zhang nextOption(config.alter((site, here, up) => { 104839e5512SZifei Zhang case DebugOptionsKey => up(DebugOptionsKey).copy(EnableRollingDB = true) 105839e5512SZifei Zhang }), tail) 106047e34f9SMaxpicca-Li case "--with-constantin" :: tail => 107047e34f9SMaxpicca-Li nextOption(config.alter((site, here, up) => { 108047e34f9SMaxpicca-Li case DebugOptionsKey => up(DebugOptionsKey).copy(EnableConstantin = true) 109047e34f9SMaxpicca-Li }), tail) 1101545277aSYinan Xu case "--fpga-platform" :: tail => 11145c767e3SLinJiawei nextOption(config.alter((site, here, up) => { 1121545277aSYinan Xu case DebugOptionsKey => up(DebugOptionsKey).copy(FPGAPlatform = true) 1131545277aSYinan Xu }), tail) 1149eee369fSKamimiao case "--reset-gen" :: tail => 1159eee369fSKamimiao nextOption(config.alter((site, here, up) => { 1169eee369fSKamimiao case DebugOptionsKey => up(DebugOptionsKey).copy(ResetGen = true) 1179eee369fSKamimiao }), tail) 1181545277aSYinan Xu case "--enable-difftest" :: tail => 1191545277aSYinan Xu nextOption(config.alter((site, here, up) => { 1201545277aSYinan Xu case DebugOptionsKey => up(DebugOptionsKey).copy(EnableDifftest = true) 1211545277aSYinan Xu }), tail) 122b7d9e8d5Sxiaofeibao-xjtu case "--disable-always-basic-diff" :: tail => 123b7d9e8d5Sxiaofeibao-xjtu nextOption(config.alter((site, here, up) => { 124b7d9e8d5Sxiaofeibao-xjtu case DebugOptionsKey => up(DebugOptionsKey).copy(AlwaysBasicDiff = false) 125b7d9e8d5Sxiaofeibao-xjtu }), tail) 1261545277aSYinan Xu case "--enable-log" :: tail => 1271545277aSYinan Xu nextOption(config.alter((site, here, up) => { 1281545277aSYinan Xu case DebugOptionsKey => up(DebugOptionsKey).copy(EnableDebug = true) 12945c767e3SLinJiawei }), tail) 13045c767e3SLinJiawei case "--disable-perf" :: tail => 13145c767e3SLinJiawei nextOption(config.alter((site, here, up) => { 13245c767e3SLinJiawei case DebugOptionsKey => up(DebugOptionsKey).copy(EnablePerfDebug = false) 13345c767e3SLinJiawei }), tail) 13437b8fdeeSKamimiao case "--disable-alwaysdb" :: tail => 13537b8fdeeSKamimiao nextOption(config.alter((site, here, up) => { 13637b8fdeeSKamimiao case DebugOptionsKey => up(DebugOptionsKey).copy(AlwaysBasicDB = false) 13737b8fdeeSKamimiao }), tail) 138e3da8badSTang Haojin case "--xstop-prefix" :: value :: tail => 139a5b77de4STang Haojin nextOption(config.alter((site, here, up) => { 140a5b77de4STang Haojin case SoCParamsKey => up(SoCParamsKey).copy(XSTopPrefix = Some(value)) 141a5b77de4STang Haojin }), tail) 142720dd621STang Haojin case "--imsic-use-tl" :: tail => 143720dd621STang Haojin nextOption(config.alter((site, here, up) => { 144720dd621STang Haojin case SoCParamsKey => up(SoCParamsKey).copy(IMSICUseTL = true) 145720dd621STang Haojin }), tail) 146b665b650STang Haojin case "--firtool-opt" :: option :: tail => 14751e45dbbSTang Haojin firtoolOpts ++= option.split(" ").filter(_.nonEmpty) 148b665b650STang Haojin nextOption(config, tail) 14945c767e3SLinJiawei case option :: tail => 15045c767e3SLinJiawei // unknown option, maybe a firrtl option, skip 15145c767e3SLinJiawei firrtlOpts :+= option 15245c767e3SLinJiawei nextOption(config, tail) 15345c767e3SLinJiawei } 15445c767e3SLinJiawei } 155321934c7SKunlin You val newArgs = DifftestModule.parseArgs(args) 156bb2f3f51STang Haojin val config = nextOption(default, newArgs.toList).alter((site, here, up) => { 157bb2f3f51STang Haojin case LogUtilsOptionsKey => LogUtilsOptions( 158bb2f3f51STang Haojin here(DebugOptionsKey).EnableDebug, 159bb2f3f51STang Haojin here(DebugOptionsKey).EnablePerfDebug, 160bb2f3f51STang Haojin here(DebugOptionsKey).FPGAPlatform 161bb2f3f51STang Haojin ) 162bb2f3f51STang Haojin case PerfCounterOptionsKey => PerfCounterOptions( 163bb2f3f51STang Haojin here(DebugOptionsKey).EnablePerfDebug && !here(DebugOptionsKey).FPGAPlatform, 164bb2f3f51STang Haojin here(DebugOptionsKey).EnableRollingDB && !here(DebugOptionsKey).FPGAPlatform, 165bb2f3f51STang Haojin 0 166bb2f3f51STang Haojin ) 167bb2f3f51STang Haojin }) 16851e45dbbSTang Haojin (config, firrtlOpts, firtoolOpts) 16945c767e3SLinJiawei } 17045c767e3SLinJiawei} 171