xref: /XiangShan/src/main/scala/xiangshan/transforms/PrintModuleName.scala (revision 12c5a998999e2fe717535076b2c4cc859fe9304f)
1/***************************************************************************************
2* Copyright (c) 2024 Beijing Institute of Open Source Chip (BOSC)
3* Copyright (c) 2020-2024 Institute of Computing Technology, Chinese Academy of Sciences
4* Copyright (c) 2020-2021 Peng Cheng Laboratory
5*
6* XiangShan is licensed under Mulan PSL v2.
7* You can use this software according to the terms and conditions of the Mulan PSL v2.
8* You may obtain a copy of Mulan PSL v2 at:
9*          http://license.coscl.org.cn/MulanPSL2
10*
11* THIS SOFTWARE IS PROVIDED ON AN "AS IS" BASIS, WITHOUT WARRANTIES OF ANY KIND,
12* EITHER EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO NON-INFRINGEMENT,
13* MERCHANTABILITY OR FIT FOR A PARTICULAR PURPOSE.
14*
15* See the Mulan PSL v2 for more details.
16***************************************************************************************/
17
18package xiangshan.transforms
19
20import utility.XSLog
21
22class PrintModuleName extends firrtl.options.Phase {
23
24  override def invalidates(a: firrtl.options.Phase) = false
25
26  override def transform(annotations: firrtl.AnnotationSeq): firrtl.AnnotationSeq = {
27
28    import xiangshan.transforms.Helpers._
29
30    val (Seq(circuitAnno: firrtl.stage.FirrtlCircuitAnnotation), otherAnnos) = annotations.partition {
31      case _: firrtl.stage.FirrtlCircuitAnnotation => true
32      case _ => false
33    }
34    val c = circuitAnno.circuit
35
36    def onStmt(s: firrtl.ir.Statement): firrtl.ir.Statement = s match {
37      case firrtl.ir.Print(info, firrtl.ir.StringLit(string), args, clk, en) =>
38        firrtl.ir.Print(info, firrtl.ir.StringLit(XSLog.replaceFIRStr(string)), args, clk, en)
39      case other: firrtl.ir.Statement =>
40        other.mapStmt(onStmt)
41    }
42
43    firrtl.stage.FirrtlCircuitAnnotation(c.mapModule(m => m.mapStmt(onStmt))) +: otherAnnos
44  }
45}
46