1 /*
2 * Copyright (C) 2014 The Android Open Source Project
3 *
4 * Licensed under the Apache License, Version 2.0 (the "License");
5 * you may not use this file except in compliance with the License.
6 * You may obtain a copy of the License at
7 *
8 * http://www.apache.org/licenses/LICENSE-2.0
9 *
10 * Unless required by applicable law or agreed to in writing, software
11 * distributed under the License is distributed on an "AS IS" BASIS,
12 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
13 * See the License for the specific language governing permissions and
14 * limitations under the License.
15 */
16
17 #include <stdint.h>
18
19 #include "context_arm64.h"
20
21 #include "base/bit_utils.h"
22 #include "base/bit_utils_iterator.h"
23 #include "quick/quick_method_frame_info.h"
24 #include "thread-current-inl.h"
25
26
27 #if defined(__aarch64__) && defined(__BIONIC__)
28 #include <bionic/malloc.h>
29 #endif
30
31 extern "C" __attribute__((weak)) void __hwasan_handle_longjmp(const void* sp_dst);
32
33 namespace art HIDDEN {
34 namespace arm64 {
35
36 static constexpr uint64_t gZero = 0;
37
Reset()38 void Arm64Context::Reset() {
39 std::fill_n(gprs_, arraysize(gprs_), nullptr);
40 std::fill_n(fprs_, arraysize(fprs_), nullptr);
41 gprs_[SP] = &sp_;
42 gprs_[kPC] = &pc_;
43 gprs_[X0] = &arg0_;
44 // Initialize registers with easy to spot debug values.
45 sp_ = kBadGprBase + SP;
46 pc_ = kBadGprBase + kPC;
47 arg0_ = 0;
48 }
49
FillCalleeSaves(uint8_t * frame,const QuickMethodFrameInfo & frame_info)50 void Arm64Context::FillCalleeSaves(uint8_t* frame, const QuickMethodFrameInfo& frame_info) {
51 const size_t frame_size = frame_info.FrameSizeInBytes();
52 int spill_pos = 0;
53
54 // Core registers come first, from the highest down to the lowest.
55 for (uint32_t core_reg : HighToLowBits(frame_info.CoreSpillMask())) {
56 gprs_[core_reg] = CalleeSaveAddress<InstructionSet::kArm64>(frame, spill_pos, frame_size);
57 ++spill_pos;
58 }
59 DCHECK_EQ(spill_pos, POPCOUNT(frame_info.CoreSpillMask()));
60
61 // FP registers come second, from the highest down to the lowest.
62 for (uint32_t fp_reg : HighToLowBits(frame_info.FpSpillMask())) {
63 fprs_[fp_reg] = CalleeSaveAddress<InstructionSet::kArm64>(frame, spill_pos, frame_size);
64 ++spill_pos;
65 }
66 DCHECK_EQ(spill_pos, POPCOUNT(frame_info.CoreSpillMask()) + POPCOUNT(frame_info.FpSpillMask()));
67 }
68
SetGPR(uint32_t reg,uintptr_t value)69 void Arm64Context::SetGPR(uint32_t reg, uintptr_t value) {
70 DCHECK_LT(reg, arraysize(gprs_));
71 // Note: we use kPC == XZR, so do not ensure that reg != XZR.
72 DCHECK(IsAccessibleGPR(reg));
73 DCHECK_NE(gprs_[reg], &gZero); // Can't overwrite this static value since they are never reset.
74 *gprs_[reg] = value;
75 }
76
SetFPR(uint32_t reg,uintptr_t value)77 void Arm64Context::SetFPR(uint32_t reg, uintptr_t value) {
78 DCHECK_LT(reg, static_cast<uint32_t>(kNumberOfDRegisters));
79 DCHECK(IsAccessibleFPR(reg));
80 DCHECK_NE(fprs_[reg], &gZero); // Can't overwrite this static value since they are never reset.
81 *fprs_[reg] = value;
82 }
83
SmashCallerSaves()84 void Arm64Context::SmashCallerSaves() {
85 // This needs to be 0 because we want a null/zero return value.
86 gprs_[X0] = const_cast<uint64_t*>(&gZero);
87 gprs_[X1] = nullptr;
88 gprs_[X2] = nullptr;
89 gprs_[X3] = nullptr;
90 gprs_[X4] = nullptr;
91 gprs_[X5] = nullptr;
92 gprs_[X6] = nullptr;
93 gprs_[X7] = nullptr;
94 gprs_[X8] = nullptr;
95 gprs_[X9] = nullptr;
96 gprs_[X10] = nullptr;
97 gprs_[X11] = nullptr;
98 gprs_[X12] = nullptr;
99 gprs_[X13] = nullptr;
100 gprs_[X14] = nullptr;
101 gprs_[X15] = nullptr;
102 gprs_[X18] = nullptr;
103
104 // d0-d7, d16-d31 are caller-saved; d8-d15 are callee-saved.
105
106 fprs_[D0] = nullptr;
107 fprs_[D1] = nullptr;
108 fprs_[D2] = nullptr;
109 fprs_[D3] = nullptr;
110 fprs_[D4] = nullptr;
111 fprs_[D5] = nullptr;
112 fprs_[D6] = nullptr;
113 fprs_[D7] = nullptr;
114
115 fprs_[D16] = nullptr;
116 fprs_[D17] = nullptr;
117 fprs_[D18] = nullptr;
118 fprs_[D19] = nullptr;
119 fprs_[D20] = nullptr;
120 fprs_[D21] = nullptr;
121 fprs_[D22] = nullptr;
122 fprs_[D23] = nullptr;
123 fprs_[D24] = nullptr;
124 fprs_[D25] = nullptr;
125 fprs_[D26] = nullptr;
126 fprs_[D27] = nullptr;
127 fprs_[D28] = nullptr;
128 fprs_[D29] = nullptr;
129 fprs_[D30] = nullptr;
130 fprs_[D31] = nullptr;
131 }
132
133 #if defined(__aarch64__) && defined(__BIONIC__) && defined(M_MEMTAG_STACK_IS_ON)
untag_memory(void * from,void * to)134 static inline __attribute__((no_sanitize("memtag"))) void untag_memory(void* from, void* to) {
135 __asm__ __volatile__(
136 ".arch_extension mte\n"
137 "1:\n"
138 "stg %[Ptr], [%[Ptr]], #16\n"
139 "cmp %[Ptr], %[End]\n"
140 "b.lt 1b\n"
141 : [Ptr] "+&r"(from)
142 : [End] "r"(to)
143 : "memory");
144 }
145 #endif
146
CopyContextTo(uintptr_t * gprs,uintptr_t * fprs)147 void Arm64Context::CopyContextTo(uintptr_t* gprs, uintptr_t* fprs) {
148 // The long jump routine called below expects to find the value for SP at index 31.
149 DCHECK_EQ(SP, 31);
150
151 for (size_t i = 0; i < arraysize(gprs_); ++i) {
152 gprs[i] = gprs_[i] != nullptr ? *gprs_[i] : kBadGprBase + i;
153 }
154 for (size_t i = 0; i < kNumberOfDRegisters; ++i) {
155 fprs[i] = fprs_[i] != nullptr ? *fprs_[i] : kBadFprBase + i;
156 }
157 // Ensure the Thread Register contains the address of the current thread.
158 DCHECK_EQ(reinterpret_cast<uintptr_t>(Thread::Current()), gprs[TR]);
159 #if defined(__aarch64__) && defined(__BIONIC__) && defined(M_MEMTAG_STACK_IS_ON)
160 bool memtag_stack;
161 // This works fine because versions of Android that did not support M_MEMTAG_STACK_ON did not
162 // support stack tagging either.
163 if (android_mallopt(M_MEMTAG_STACK_IS_ON, &memtag_stack, sizeof(memtag_stack)) && memtag_stack)
164 untag_memory(__builtin_frame_address(0), reinterpret_cast<void*>(gprs[SP]));
165 #endif
166 // Tell HWASan about the new stack top.
167 if (__hwasan_handle_longjmp != nullptr)
168 __hwasan_handle_longjmp(reinterpret_cast<void*>(gprs[SP]));
169 // The Marking Register will be updated after return by art_quick_do_long_jump.
170 }
171
172 } // namespace arm64
173 } // namespace art
174